Abstract: To more precisely output signals of optical recording media, a semiconductor laser element is mounted in a concave portion on the surface of a semiconductor substrate so that the optical axis of signal detecting light emitted from the semiconductor laser element is substantially parallel to the surface of the semiconductor substrate, and the light emitted from the semiconductor laser element is reflected at the side surface of the concave portion that is opposed to the signal detecting light emitting side of the semiconductor laser element in a direction substantially perpendicular to the surface of the semiconductor substrate. A light receiving portion for signal detection is provided in an area outside the concave portion on the surface of the semiconductor substrate where the semiconductor laser element is mounted.

Abstract: In a chamber, there are provided a sample stage on which a semiconductor substrate is placed, a gas inlet port for introducing etching gas, and a gas outlet port for exhausting the gas. A slide valve having a valve element which rotates relative to a valve seat is provided between the sample stage and the gas outlet port to adjust the amount of gas exhausted from the gas outlet port with the rotation of the valve element. A spiral coil for generating a high-frequency induction field and thereby changing the etching gas into a plasma is rotatably provided over the chamber. Rotative driving means rotates the spiral coil in response to the rotation of the valve element of the slide valve such that the higher-voltage region of the spiral coil approximately coincides with the exhaust-side region of the slide valve.

Abstract: The invention provides a bias circuit for suppressing change with temperature of an idle current of a power transistor and a semiconductor device including the bias circuit. The bias circuit includes a first bipolar transistor having an emitter, a base and a collector, and at least one Schottky diode connected to the base of the first bipolar transistor, and the at least one Schottky diode is provided for supplying a base potential for suppressing a collector current of the first bipolar transistor from changing in accordance with temperature change.

Abstract: A method for introducing an impurity includes the steps of: introducing an impurity having charges into a target to be processed, such as a semiconductor substrate and a film formed on a substrate; and supplying electrons from a filament into the target to neutralize the charges of the impurity. The step of supplying electrons includes a step of controlling the maximum energy of the electrons supplied at a predetermined energy or less.

Abstract: After forming a processed film onto the underlying film formed on the substrate, the processed film is dry etched using a mask pattern so as to form an etched pattern. After the reaction product deposited on a wall of the etched pattern is removed by using the first cleaning solution having relatively low power to etch the processed film and the second cleaning solution having relatively high power to etch the processed film in that order, the etched pattern or its vicinity is rinsed with water.

Abstract: After forming a barrier film on a silicon-containing film including silicon as a main component, a high-melting-point metal film is deposited on the barrier film, so as to form a laminated structure including the silicon-containing film, the barrier film and the high-melting-point metal film. The laminated structure is subjected to a heat treatment at a temperature of 750° C. or more. The barrier film is formed by forming a first metal film of a nitride of a metal on the silicon-containing film; forming, on the first metal film, a second metal film of the metal or the nitride of the metal with a smaller nitrogen content than the first metal film; and forming, on the second metal film, a third metal film of the nitride of the metal with a larger nitrogen content than the second metal film.

Abstract: A semiconductor memory includes plural lower electrodes formed on a semiconductor substrate; a capacitor dielectric film of an insulating metal oxide continuously formed over the plural lower electrodes; plural upper electrodes formed on the capacitor dielectric film in positions respectively corresponding to the plural lower electrodes; and plural transistors formed on the semiconductor substrate. The plural lower electrodes are respectively connected with source regions of the plural transistors.

Abstract: Under application of a voltage V3 to a cell plate line PC, a voltage difference appearing on a bit line BL and an inverted bit line /BL in accordance with a polarized state of a memory cell capacitor and a line capacitance is amplified by a sense amplifier, thereby reading data. A read time for this read operation is tR, which is substantially the same as a write time tWL of L data and a write time tWH of H data. Also, the same voltage is used in a write operation and a read operation. Specifically, the operations are conducted with a write energy larger than a read energy. As a result, a read error can be avoided. Furthermore, since an energy not saturating polarization of a ferroelectric film is used in a write operation, there is no need to provide a voltage increasing circuit, and a high operation can be realized.

Abstract: A semiconductor device includes: a first-surface-channel-type MOSFET having a first threshold voltage; and a second-surface-channel-type MOSFET with a second threshold voltage having an absolute value greater than an absolute value of said first threshold voltage. The first-surface-channel-type MOSFET includes: a first gate insulating film formed on a semiconductor substrate; and a first gate electrode, which has been formed out of a poly-silicon film over the first gate insulating film. The second-surface-channel-type MOSFET includes: a second gate insulating film formed on the semiconductor substrate; and a second gate electrode, which has been formed out of a refractory metal film over the second gate insulating film. The refractory metal film is made of a refractory metal or a compound thereof.

Abstract: An optoelectronic apparatus includes an optoelectronic device, a mounting portion, a frame member surrounding a periphery of the mounting portion, and an optical component. The optical component is placed on an optical component placement portion. The frame member includes a pair of first side walls and a pair of second side walls. Each of the pair of second side walls has a recessed portion and a protruded portion. The optical component is disposed between the protruded portions, and is fixed with an adhesive filled in the recessed portions.

Abstract: A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

Abstract: To provide a method for evaluating chargeup damage caused in the practical fabrication process. Evaluation is carried out based on the electric current flowing between the source and the drain of a MOS transistor of a semiconductor element (1—1) having a wiring layer provided with an antenna effect by installing the semiconductor element (1—1) in the periphery of a practical device installed in a semiconductor substrate and measuring the electric current without attaching a probe to the gate of the semiconductor element (1—1).

Abstract: In a semiconductor memory device in which a ferroelectric capacitor is connected to the gate of a field effect transistor (FET), a gate charge at the threshold voltage (Vti) of the FET is represented as Qti. In a polarization-voltage characteristic exhibited by the ferroelectric capacitor where a voltage applied thereto starts to be increased on the supposition that a polarization of 0 C/cm2 initially exists in the capacitor, a voltage, associated with a polarization value corresponding to Qti, is represented as Vtf. In a read operation, the intersection between the gate charge-gate voltage characteristic of the FET and the polarization-voltage characteristic of the ferroelectric capacitor is the operating point where a worst-case polarization of 0 C/cm2 exists in the capacitor after data has been retained in the capacitor. By applying a voltage Vtf+ Vti to the control electrode, the data can be read out correctly until the polarization decreases to reach 0 C/cm2.

Abstract: A semiconductor device of the present invention includes an electrode, which is formed over a substrate and contains ruthenium. Crystal grains of ruthenium in the electrode have stepped surfaces.

Abstract: After a gate electrode has been formed over a semiconductor region with a gate insulating film interposed therebetween, an amorphous layer is formed in the semiconductor region by implanting heavy ions with a large mass into the semiconductor region using the gate electrode as a mask. Then, ions of a first dopant are implanted into the semiconductor region using the gate electrode as a mask. Next, a first annealing process is conducted on the semiconductor region at a temperature between 400° C. and 550° C., thereby making the amorphous layer recover into a crystalline layer. Subsequently, a second annealing process is conducted on the semiconductor region, thereby forming an extended high-concentration dopant diffused layer of a first conductivity type and a pocket dopant diffused layer of a second conductivity type.

Abstract: The present invention provides a printed wiring board, an IC card module including the printed wiring board, and a method for fabricating the IC card module, for improving reliability of IC cards. The printed wiring board and the IC card module of the invention include: a base having a resin sealing region, clamped regions in a periphery zone of the resin sealing region clamped with a sealing mold, and non-clamped regions in the periphery zone; and terminals for external connection formed on the top surface of the base. The terminals are formed in a region other than any of the resin sealing region, the clamped regions, and the non-claimed regions.

Abstract: A field oxide surrounding an active region, an N-type doped layer formed in the active region, and an electrode formed on the field oxide in the vicinity of the active region are provided on a P-type semiconductor substrate. During the operation as a constant voltage device, a desired voltage is applied to the electrode. Then, trapping of carriers in the interface between the field oxide and the semiconductor region can be suppressed, although such trapping is ordinarily caused by a reverse breakdown phenomenon at the pn junction between the doped layer and the P-type semiconductor substrate. Accordingly, the variation in strength of the electric field between the doped layer and the semiconductor substrate can be suppressed. As a result, it is possible to suppress a variation in reverse withstand voltage, which is usually caused by a reverse breakdown voltage at a pn junction, for a semiconductor device functioning as a constant voltage device.

Abstract: A plurality of liquids, the flow of each controlled by a volumetric flowrate controller, are mixed in a mixer to form a final precursor that is misted and then deposited on a substrate. A physical property of precursor liquid is adjusted by adjusting the volumetric flowrate controllers, so that when precursor is applied to substrate and treated, the resulting thin film of solid material has a smooth and planar surface. Typically the physical property is the viscosity of the precursor, which is selected to be relatively low, in the range of 1-2 centipoise.

Abstract: A polishing pad is fixed on a polishing platen mounted to be rotatable. An abrasive supply tube supplies an abrasive onto the polishing pad. A substrate holder is mounted to be rotatable above the polishing pad, holds a substrate to be polished and presses the substrate against the polishing pad, thereby polishing the substrate. A dresser is mounted to be rotatable above the polishing pad, and dresses the polishing pad. A torque detector detects the rotation torque of the polishing platen or the rotation torque of the substrate holder. A dresser controller makes the dresser dress the polishing pad if the rotation torque detected by the torque detector is equal to or smaller than a predetermined value.

Abstract: An apparatus for plasma etching comprises a chamber, a gas inlet port provided in the chamber to introduce etching gas into the chamber, a gas outlet port provided in a side portion of the chamber to exhaust the gas from said chamber, a sample stage provided within the chamber, and a spiral coil disposed externally of the chamber and in opposing relation with the sample stage to generate a plasma composed of the etching gas with a high-frequency induction field. The higher-voltage region of the spiral coil and the exhaust-side region of the sample stage are positioned on substantially the same side relative to the center axis of the chamber.