Abstract: An asynchronous successive approximation register analog-to-digital converter (SAR ADC), which utilizes one or more overlapping redundant bits in each digital-to-analog converter (DAC) code word, is operable to generate an indication signal that indicates completion of each comparison step and indicates that an output decision for each comparison step is valid. A timer may be initiated based on the generated indication signal. A timeout signal may be generated that preempts the indication signal and forces a preemptive decision, where the preemptive decision sets one or more remaining bits up to, but not including, the one or more overlapping redundant bits in a corresponding digital-to-analog converter code word for a current comparison step to a particular value. For example, the one or more remaining bits may be set to a value that is derived from a value of a bit that was determined in an immediately preceding decision.

Abstract: One or more circuits may comprise at least one first-type analog-to-digital converter (ADC) and at least one second-type ADC. The circuit(s) may be operable to receive a plurality of signals, each of which may comprise a plurality of channels. The circuit(s) may be operable to digitize a selected one or more of the channels. Which, if any, of the selected channels are digitized via the at least one first-type ADC and which, if any, of the selected channels are digitized via the at least one second-type ADC, may be based on which of the plurality of channels are the selected channels and/or based on power consumption of the circuit(s). A bandwidth of each first-type ADC may be on the order of the bandwidth of one of the received signals. A bandwidth of each second-type ADC may be on the order of the bandwidth of one of the plurality of channels.

Abstract: A monolithic integrated circuit for use in a microwave backhaul system may comprise a plurality of microwave transceivers and outdoor-unit to indoor-unit (ODU/IDU) interface circuitry. The monolithic integrated circuit may be configurable into an all-outdoor configuration in which the ODU/IDU interface circuitry is disabled. The monolithic integrated circuit may be configurable into a split-indoor-and-outdoor configuration in which the ODU/IDU interface circuitry is enabled to communicate signals between an outdoor unit of the microwave backhaul system and an indoor unit of the microwave backhaul system. While the monolithic integrated circuit is configured in the split-indoor-and-outdoor configuration, the ODU/IDU interface circuitry may be configurable to operate in at least a non-stacking mode and a stacking mode.

Abstract: Systems and methods are disclosed for securing a network, for admitting new nodes into an existing network, and/or for securely forming a new network. As a non-limiting example, an existing node may be triggered by a user, in response to which the existing node communicates with a network coordinator node. Thereafter, if a new node attempts to enter the network, and also for example has been triggered by a user, the network coordinator may determine, based at least in part on parameters within the new node and the network coordinator, whether the new node can enter the network.

Abstract: Systems and methods are provided for managing dynamic element matching (DEM) in digital-to-analog converters (DACs). One or more parameters associated with the DAC and/or a signal being converted via the DAC; and based on the one or more parameters, conditions affecting dynamic element matching in the DAC may be assessed. Based on the assessing of the conditions, one or more adjustments may be determined and dynamically applied to the dynamic element matching in the DAC.

Abstract: Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logice modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.

Abstract: Systems and methods for adjusting timing in a communication system, such as an OFDM system are described. In one implementation an error signal is generated to adjust the timing of a variable rate interpolator so as to adjust FFT timing. The error signal may be based on detection of significant peaks in an estimate of the impulse response of the channel, with the peak locations being tracked over subsequent symbols and the system timing adjusted in response to changes in the peaks.

Abstract: An array based communications system may comprise a plurality of element processors. Each element processor may comprise a combining circuit, a crest factor circuit, and a phase shifter circuit. The combining circuit may produce a weighted sum of a plurality of digital datastreams. The crest factor circuit may be operable to determine whether the weighted sum has a power above or below a power threshold. If the power is above the power threshold, the crest factor circuit is operable to reduce the power. If the power is below the power threshold, the crest factor circuit is operable to increase the power. The phase shifter circuit may introduce a phase shift to out-of-band components of the weighted sum according to the power increase or the power decrease by the crest factor circuit.

Abstract: A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.

Abstract: A transceiver comprises local oscillator circuitry, phase noise determination circuitry, mixing circuitry, and digital signal processing circuitry. The local oscillator circuitry is operable to generate a local oscillator signal. The phase noise determination circuitry is operable to introduce a frequency-dependent phase shift to the local oscillator signal to generate a phase-shifted version of the local oscillator signal. The mixing circuitry is operable to mix the local oscillator signal and the phase-shifted version of the local oscillator to generate a baseband signal having an amplitude proportional to a phase difference between the local oscillator signal and the phase-shifted version of the local oscillator signal. The digital signal processing circuitry is operable to process the baseband signal to determine a phase error of the local oscillator signal, and perform signal compensation based on the determined phase error.

Abstract: Systems and methods are provided for adaptive control of pre-distortion during signal transmissions. While applying pre-distortion during processing of an input signal for transmission, feedback data may be generated based on a plurality of feedback signals, and adjustments to the pre-distortion may be applied to the pre-distortion based on the feedback data. Each of feedback signals corresponds to a particular processing stage performed during the processing of the input signal. Generating the feedback data comprises applying adjustments to the plurality of feedback signals based on a type and/or a source of at least one feedback signal, with the adjustments comprising one or more of: applying a gain to one of the plurality of feedback signals; applying a delay to one of the plurality of feedback signals; and modifying a first one of the plurality of feedback signals based on a second one of the plurality of feedback signals.

Abstract: Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA includes first and second differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may include: a first inductor with a first terminal capacitively-coupled to a gate terminal of the first differential pair transistor and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first differential pair transistor, the fourth inductor may be coupled to a source terminal of the second differential pair transistor, and the third inductor may be capacitively-coupled to a gate terminal of the second differential pair transistor and also to ground. The second inductor may be embedded within the first inductor.

Abstract: A satellite reception assembly may comprise a housing configured to support receipt and handling of a plurality of satellite signals. The housing may comprise circuitry incorporating integrated stacking architecture for supporting and/or providing channel and/or band stacking whereby particular channels or bands, from multiple satellite signals that are received via the satellite reception assembly, may be combined onto a single output signal that may be communicated from the satellite reception assembly to a gateway device for concurrent distribution thereby to a plurality of client devices serviced by the gateway device.

Abstract: Systems and methods are provided for clocking scheme to reduce nonlinear distortion. An example system may comprise at least two processing paths, each comprising at least one circuit exhibiting nonlinear behavior. Nonlinearity may be managed during processing of signals, such as by assessing effects of the nonlinear behavior during the processing of signals, and controlling clocking applied via at least one path based on the assessed effects, to reduce the effects of the nonlinear behavior during the processing of signals, eliminating the need for post-processing corrections. The controlling of clocking may comprise adjusting timing of a clock applied in the at least path, such as by introducing a timing-delay adjustment to a clock when the clock is applied to a circuit after the circuit exhibiting nonlinear behavior. A timing-advancement may be applied to signals processed via the at least one path, particularly before the circuit exhibiting nonlinear behavior.

Abstract: A system comprises a microwave backhaul outdoor unit having a first resonant circuit, phase error determination circuitry, and phase error compensation circuitry. The first resonant circuit is operable to generate a first signal characterized by a first amount of phase noise and a first amount of temperature stability. The phase error determination circuitry is operable to generate a phase error signal indicative of phase error between the first signal and a second signal, wherein the second signal is characterized by a second amount of phase noise that is greater than the first amount of phase noise, and the second signal is characterized by a second amount of temperature instability that is less than the first amount of temperature instability. The phase error compensation circuitry is operable to adjust the phase of a data signal based on the phase error signal, the adjustment resulting in a phase compensated signal.

Abstract: Methods and systems for a configurable low-noise amplifier with programmable band-selection filters may comprise a receiver with a low-noise amplifier (LNA) with first and second input terminals and differential output terminals; a low pass filter operably coupled to the LNA; a high pass filter operably coupled to the second input terminal of the LNA; and a signal source input coupled to the low pass filter and the high pass filter. The LNA may be operable to receive signals in a pass band of the high pass filter and a pass band of the low pass filter. The receiver may be operable to amplify input signals in the pass band of a first filter but not signals in the pass band of the second filter by operably coupling the second to ground.

Abstract: Systems and methods are provided for powering Multimedia over Coax Alliance (MoCA) devices. An electronic device that is configured for use in a multimedia over coax alliance (MoCA) network may include a communication circuit operable to communicate multimedia over coax alliance (MoCA) based signals over coax cabling in the MoCA network, and one or more power circuits operable to support supplying and/or drawing power over the coax cabling in the MoCA network, to enable powering the electronic device and/or one or more other electronic devices in the MoCA network. The power circuits may include one or more of: a power regulator circuit that draws power from the coax cabling and/or regulates use of the power, a power source circuit that supplies power into the coax cabling, and a power management circuit that manages power related operations in the electronic device and/or in the MoCA network.

Abstract: A method and system for impairment shifting is disclosed and may include receiving one or more radio frequency (RF) analog television signals in a receiver of a communication device, downconverting the received one or more received RF analog television signals to baseband frequencies, synchronizing the receiver to the one or more received RF analog television signals, and adjusting a frequency of one or more local oscillators in the receiver to configure in-phase/quadrature (I/Q) mismatch of a picture carrier signal to fall near a sound carrier signal in the received RF analog television signals. The frequency of the one or more local oscillators may be adjusted to configure a DC offset impairment to fall between luminance and chrominance harmonics at baseband in the analog television signals. I/Q imbalanced impairments may be configured with about 300 kHz separation from the sound carrier signal.

Abstract: First transmitter circuitry communicates, via bus interface circuitry, on a data bus to detect whether any second transmitter circuitry is coupled to the data bus. In instances that no second transmitter circuitry is detected as being coupled to the data bus, the first transmitter circuitry transmits beamformed signals via a first plurality of antenna elements using beamforming coefficients. In instances that second transmitter circuitry is detected as being coupled to the data bus, the first transmitter circuitry determines a phase offset between clock generation circuitry of the first transmitter circuitry and clock generation circuitry of the detected second transmitter circuitry. The first transmitter circuitry compensates the beamforming coefficients based on the determined phase offset. The first transmitter circuitry use the compensated beamforming coefficients for transmitting signals that are phase coherent with signals transmitted by the second transmitter circuitry.

Abstract: A network device may receive a signal from a headend, wherein a bandwidth of the received signal spans from a low frequency to a high frequency and encompasses a plurality of sub-bands. The network device may determine, based on communication with the headend, whether one of more of the sub-bands residing above a threshold frequency are available for carrying downstream data from the headend to the circuitry. The network device may digitize the signal using an ADC operating at a sampling frequency. The sampling frequency may be configured based on a result of the determining. When the sub-band(s) are available for carrying downstream data from the headend to the network device, the sampling frequency may be set to a relatively high frequency. When the sub-band(s) are not available for carrying downstream data from the headend to the network device, the sampling frequency may be set to a relatively low frequency.