Abstract: Methods and systems are provided for adaptive guard interval (GI) combining. When a signal carrying at least one symbol that is preceded by a guard interval that comprises a portion of the symbol is received, a portion of the guard interval that is free from inter-symbol interference (ISI) may be determined, and only a part of the ISI-free portion of the guard interval may be extracted. The part of the ISI-free portion of the guard interval may be selected based on timing adjustment, relative to start of the symbol, that is applied to a function used in extracting the symbol. The extracted part of the ISI-free portion of the guard interval may then be combined with a corresponding portion of the symbol. The extracting and/or combining may be performed after a determination that a delay spread is smaller than a predetermined channel delay.

Abstract: A receiver is configured to be coupled to a television and data service provider headend via a hybrid fiber coaxial (HFC) network. The receiver comprises front-end circuitry operable to receive a signal that carries a plurality of television and/or data channels, and digitize the received signal to generate a digitized signal. The receiver comprises channelizer circuitry operable to select a first portion of the digitized signal, and select a second portion of the digitized signal. The receiver comprises processing circuitry operable to process the selected second portion of the digitized signal to recover information carried in the plurality of channels. The receiver comprises monitoring circuitry operable to analyze the selected first portion of the digitized signal to measure a characteristic of the received signal; and control the transmission of network management messages back to the headend based on the measured characteristic of the received signal.

Abstract: Methods and systems are provided for adaptive management of local networks (e.g., in-premises networks, which may access or be connected to cable or satellite networks). A network device (e.g., a gateway device) may be configured to function as a network manager in a local network, to manage internal connections and/or communications within the local network. The managing may comprise assessing effects of the internal connections and/or communications on external connections and/or communications with one or more devices and/or networks external the local network; and setting and/or adjusting based on the assessed effects, one or more communication parameters associated with each one of the internal connections and/or communications.

Abstract: A charging device includes an integrated broadband transceiver that is operable to communicate wireless signals at a power level that is below a spurious emissions mask. The wireless signals are communicated over a designated frequency spectrum band via one or more antennas. The wireless signals convey data between the charging device and a communication device via one or more usable channels within the frequency spectrum band utilized by the integrated broadband transceiver. Concurrent with the communicating, charging of the communication device occurs. One or more usable channels within the frequency spectrum band utilized by the integrated broadband transceiver may be detected. The charging and the communication of the wireless signals occurs currently on the same ones or different ones of the one or more antennas. The detected one or more usable channels may be aggregated and utilized for the communication by the integrated broadband transceiver.

Abstract: Aspects of a method and system for feedback during optical communications are provided. In one embodiment, a system for optical communications comprises a digital-to-analog converter (DAC), a driver, and a transmit optical subsystem. The DAC is operable to receive a digital code of a plurality of digital codes and output an analog current signal having an analog current level of a plurality of analog current levels. The driver is operable to condition the analog current signal output from the digital-to-analog converter. The transmit optical subsystem is operable to generate an optical signal from the conditioned analog current signal. A digital modification of an input digital signal is dynamically controlled by a feedback path according to one or more characteristics of the optical signal. The one or more characteristics comprise a nonlinearity that may be temperature dependent.

Abstract: Methods and systems for reliable bootstrapping switches may comprise sampling a received signal with a bootstrapping switch, where the bootstrapping switch comprises a switching metal-oxide semiconductor (MOS) transistor having a pull-down path coupled to a gate terminal of the switching MOS transistor, wherein: source terminals of both a diode-connected transistor and a second MOS transistor are coupled to the gate terminal of the switching MOS transistor; drain terminals of both the diode-connected transistor and the second MOS transistor are coupled to a source terminal of a third MOS transistor, the third MOS transistor coupled in series with a fourth MOS transistor; and a drain terminal of the fourth MOS transistor is coupled to ground. The third and fourth MOS transistors may be in series with the second MOS transistor. A gate terminal of the fourth transistor may be switched from ground to a supply voltage to activate the pull-down path.

Abstract: A satellite reception assembly that provides satellite television and/or radio service to a customer premises may comprise a wireless interface via which it can communicate with other satellite reception assemblies. Wireless connections between satellite reception assemblies may be utilized for providing satellite content between different satellite customer premises. Wireless connections between satellite reception assemblies may be utilized for offloading traffic from other network connections.

Abstract: Methods and systems for precise temperature and timebase ppm error estimation using multiple timebases may comprise measuring a temperature corresponding to the plurality of timebases. The frequencies of the timebases may be compared to generate error functions for the timebases, and generating a more accurate reading of the temperature based, at least in part, on the measured temperature and the error functions for the timebases. The timebases may be calibrated utilizing the generated more accurate reading. The plurality of timebases may comprise different order temperature dependencies. The models of temperature dependencies of each of the plurality of timebases may be updated based, at least in part, on the fine reading of the temperature corresponding to the plurality of timebases. A global navigation satellite system (GNSS) clock signal may be utilized periodically to improve the accuracy of the calibration of the plurality of timebases.

Abstract: Methods and systems for improved matching for on-chip capacitors may comprise in a semiconductor die comprising an on-chip capacitor with one or more metal layers: electrically coupling a first set of metal fingers, electrically coupling a second set of metal fingers that are interdigitated with the first set of metal fingers, wherein the first set of metal fingers and the second set of metal fingers are arranged symmetrically in the semiconductor die, and configuring the on-chip capacitor in a plurality of symmetric sections, wherein a boundary between each of the plurality of sections is configured in a zig-zag pattern. The first set of metal fingers and the second set of metal fingers may be arranged with radial symmetry. A first set of metal fingers in a first metal layer may be electrically coupled to a set of metal fingers in a second metal layer.

Abstract: Systems and methods are disclosed for securing a network, for admitting new nodes into an existing network, and/or for securely forming a new network. As a non-limiting example, an existing node may be triggered by a user, in response to which the existing node communicates with a network coordinator node. Thereafter, if a new node attempts to enter the network, and also for example has been triggered by a user, the network coordinator may determine, based at least in part on parameters within the new node and the network coordinator, whether the new node can enter the network.

Abstract: Systems and methods are provided for jitter improvement in serializer-deserializer (SerDes) transmitters. One or more adjustments may be applied in SerDes transmitter circuitry to reduce jitter in a serial output of the SerDes transmitter circuitry, which may occur as a result of processing of input data. Applying the one or more adjustments may comprise use of dummy data. The dummy data may be configured to generate corresponding dummy current pulses which may in turn be used in controlling supply variations occurring during processing of the input data and/or generation of the serial output. The dummy data may be configured to generate the dummy current pulses such that they are applied along with current pulses corresponding to the input data. The dummy data may be adaptively set or adjusted based on the input data. The use of the dummy data may be selectively turned on or off.

Abstract: Methods and systems for an analog-to-digital converter with near-constant common mode voltage may comprise, in an analog-to-digital converter (ADC) having sampling switches on each of two input lines to the ADC, N double-sided and M single-sided switched capacitors on each input line: sampling an input voltage by closing the sampling switches, opening the sampling switches and comparing voltage levels between the input lines, iteratively switching the double-sided switched capacitors between a reference voltage (Vref) and ground, and iteratively switching the single-sided switched capacitors between ground and voltages that may equal Vref/2x where x ranges from 0 to m?1 and m is a number of single-sided switched capacitors per input line. A common mode offset of the ADC may be less than VADC_fs/128+VADC_fs/256+VADC_fs/512+VADC_fs/1024 when m equals 4 and where VADC_fs is the full-scale voltage of the ADC.

Abstract: An asynchronous successive approximation register analog-to-digital converter (SAR ADC), which utilizes one or more overlapping redundant bits in each digital-to-analog converter (DAC) code word, is operable to generate an indication signal that indicates completion of each comparison step and indicates that an output decision for each comparison step is valid. A timer may be initiated based on the generated indication signal. A timeout signal may be generated that preempts the indication signal and forces a preemptive decision, where the preemptive decision sets one or more remaining bits up to, but not including, the one or more overlapping redundant bits in a corresponding digital-to-analog converter code word for a current comparison step to a particular value. For example, the one or more remaining bits may be set to a value that is derived from a value of a bit that was determined in an immediately preceding decision.

Abstract: Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.

Abstract: Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.

Abstract: Methods and systems for a mixed-mode MoCA network, substantially as illustrated by and/or described in connection with at least one of the figures, as set forth more completely in the claims. For example and without limitation, various aspects of the present disclosure provide methods and systems for controlling communication bandwidth allocation in a mixed-mode mixed-band shared cable network.

Abstract: Systems and methods are provided for adaptive configuration and control of digital-to-analog converters (DACs). Performance of a plurality of conversion elements in a digital-to-analog converter (DAC) may be assessed based on particular input conditions associated with a digital input to the DAC, and the DAC may be configured based on the assessing of performance. Each conversion element of the plurality of conversion elements handles a particular bit in the digital input. The configuring may comprise selecting a subset of the plurality of conversion elements, and setting only the subset of the plurality of conversion elements to apply a particular type of operations. The particular type of operations pertains to applying digital-to-analog conversions via the DAC, and the particular type of operations relates to or affects performance. The particular input conditions may comprise signal backoff.

Abstract: A receiver may receive a signal and process each of a plurality of sub-bands of the received signal via a respective one of a plurality of first-type receive chains. The receiver may utilize a signal output by a first one of the plurality of the first-type receive chains to remove undesired signals from a signal output by a second one of the plurality of the first-type receive chains. The undesired signals may comprise aliases and/or harmonics of one or more signals that fall within a sub-band of the first one of the plurality of the first-type receive chains. The receiver may downconvert, filter, and digitize each of the plurality of sub-bands via a corresponding one of the plurality of the first type receive chains. The received signal may encompass the cable television band, and each of the plurality of sub-bands may comprise a plurality of cable television channels.

Abstract: A system and method for low-power digital signal processing, for example, comprising adjusting a digital representation of an input signal.

Abstract: A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules.