Abstract: A phase locked loop may be operable to generate, utilizing a frequency doubler, a reference clock signal whose frequency is twice a frequency of a crystal clock signal and is keyed on both rising and falling edges of the crystal clock signal. A sampled loop filter (SLPF) in the phase locked loop may capture charge from a charge pump (CHP) in the phase locked loop and the charge is captured at a frequency corresponding to the frequency of the reference clock signal. Opening a switch of the SLPF may hold the captured charge during a phase comparison and closing the switch may release the captured charge. The switch is controlled utilizing a control signal. By utilizing the SLPF in the phase locked loop, the phase locked loop may eliminate, at an output of the CHP, disturbance which is associated with duty cycle errors of the crystal clock signal.

Abstract: In an example implementation of this disclosure, a message passing low density parity check (LDPC) decoder may, during decoding of a first group of bits, lock a first variable node upon a bit-value probability of the first variable node reaching a determined threshold, and lock a first check node upon all variable nodes connected to the first check node being locked. The LDPC decoder may cease decoding the first group of bits upon all variable nodes of the LDPC decoder being locked, all check nodes of the LDPC decoder being locked, reaching a maximum number of iterations, or reaching a timeout. During a particular iteration of the decoding of the first group of bits in which the first variable node is locked, the LDPC decoder may refrain from generating a bit-value probability for the locked first variable node.

Abstract: Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may include receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal utilizing a decorrelation algorithm on frequencies within a desired frequency bandwidth. The decorrelation algorithm may comprise a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals.

Abstract: A communication system may include a first broadband device and a second broadband device. Signals may be wirelessly communicated from the first broadband device to the second broadband device at a power level that is below a spurious emissions mask. The communicated signals may be transmitted over a designated frequency band. A barrier separates the first broadband device from the second broadband device. The first broadband device may be paired with the second broadband device, and the signals may be wirelessly communicated from the first to the second broadband device. The signals may be communicated using signal emitting/receiving components, which may be jointly configured to optimize near-field communication while nullifying or substantially reducing signaling in other ranges, particularly far-field or intermediate-field ranges.

Abstract: Aspects of methods and systems for transceiver array synchronization are provided. An array based communications system comprises a plurality of transceiver circuits and an array coordinator. Each transceiver circuit of the plurality of transceiver circuits comprises a plurality of wireless transmitters and a local oscillator generator. Each wireless transmitter of the plurality of wireless transmitters is able to modulate a local oscillator signal from the local oscillator generator based on a weighted sum of a plurality of digital datastreams. The array coordinator is able to adjust a phase of a first local oscillator signal based on a phase difference between the first local oscillator signal and a second local oscillator signal. The first local oscillator signal is generated by a first local oscillator generator of a first transceiver circuit. The second local oscillator signal is generated by a second local oscillator generator of a second transceiver circuit.

Abstract: A receiver is configured to be coupled to a television and data service provider headend via a hybrid fiber coaxial (HFC) network. The receiver comprises front-end circuitry operable to receive a signal that carries a plurality of television and/or data channels, and digitize the received signal to generate a digitized signal. The receiver comprises channelizer circuitry operable to select a first portion of the digitized signal, and select a second portion of the digitized signal. The receiver comprises processing circuitry operable to process the selected second portion of the digitized signal to recover information carried in the plurality of channels. The receiver comprises monitoring circuitry operable to analyze the selected first portion of the digitized signal to measure a characteristic of the received signal; and control the transmission of network management messages back to the headend based on the measured characteristic of the received signal.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA comprises differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may comprise: a first inductor with a first terminal capacitively-coupled to a gate terminal of a first transistor of the differential pair transistors and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first transistor of the differential pair transistors, the fourth inductor may be coupled to a source terminal of the second transistor of the differential pair transistors, and the third inductor may be capacitively-coupled to a gate terminal of the second transistor of the differential pair transistors and also to ground. The second inductor may be embedded within the first inductor.

Abstract: Systems and methods are disclosed for securing a network, for admitting new nodes into an existing network, and/or for securely forming a new network. As a non-limiting example, an existing node may be triggered by a user, in response to which the existing node communicates with a network coordinator node. Thereafter, if a new node attempts to enter the network, and also for example has been triggered by a user, the network coordinator may determine, based at least in part on parameters within the new node and the network coordinator, whether the new node can enter the network.

Abstract: One or more circuits for use in a transceiver that is collocated with a satellite dish, may receive a satellite signal carrying media content, and remove content protection from the received media content. After removing the first content protection, the one or more circuits may apply second content protection to the media content. The content protection applied by the one or more circuits may adhere to a different protocol, utilize different keys, and/or otherwise be distinguishable from the content protection that was removed. After applying the content protection, the one or more circuits may transmit the media content onto one or more links between the satellite dish and one or more client devices. The removal of the content protection may comprise descrambling and/or decrypting the media content. The application of the content protection may comprise scrambling and/or encrypting the media content.

Abstract: Methods and systems for reliable bootstrapping switches may comprise sampling a received signal with a bootstrapping switch, where the bootstrapping switch comprises a switching metal-oxide semiconductor (MOS) transistor having a pull-down path coupled to a gate terminal of the switching MOS transistor, wherein: source terminals of both a diode-connected transistor and a second MOS transistor are coupled to the gate terminal of the switching MOS transistor; drain terminals of both the diode-connected transistor and the second MOS transistor are coupled to a source terminal of a third MOS transistor, the third MOS transistor coupled in series with a fourth MOS transistor; and a drain terminal of the fourth MOS transistor is coupled to ground. The third and fourth MOS transistors may be in series with the second MOS transistor. A gate terminal of the fourth transistor may be switched from ground to a supply voltage to activate the pull-down path.

Abstract: Systems and methods for efficiently establishing beacon transmission power, for example in networks in which beacon transmission responsibility can be passed between nodes. As a non-limiting example, various aspects of the present disclosure provide systems and methods for establishing beacon transmission power in a node that has received beacon transmission responsibility in a network, for example by hand-off, failover, etc.

Abstract: A first network device may measure one or more values of one or more parameters corresponding to a plurality of links and/or devices of the network. The first network device may compare the measured one or more values of the one or more parameters to an expected one or more values of the one or more parameters. The first network device may determine whether to transmit data onto a network path between the first device and one of the plurality of devices based on a result of the comparison, wherein at least one of the plurality of links and/or devices are not part of the network path. The first network device may be operable to utilize the discovered parameter values to generate a security key which may be utilized to encrypt and/or scramble content prior to transmitting the content onto the network.

Abstract: An Internet protocol low noise block downconverter (IP LNB) assembly, which is within a satellite dish assembly, may be operable to determine one or more baseline settings of the satellite dish assembly. The IP LNB assembly may monitor, periodically or aperiodically, one or more current settings that may correspond to the determined one or more baseline settings to identify deviations of the one or more current settings from the baseline settings. The results of the monitoring may be communicated to a satellite service provider. The satellite service provider may provide maintenance and/or service management for the satellite dish assembly based on the communicated results of the monitoring. The IP LNB assembly may determine a location setting via a GNSS module and determine an alignment setting via a directional sensor in the IP LNB assembly. The IP LNB assembly may determine a received signal strength based on a RSSI.

Abstract: A first mobile consumer electronic device comprises a broadband near-field communications (BNC) transceiver and is configured to operate as a main processing unit for a second mobile consumer electronic device that is configured as a thin-client. The first mobile consumer electronic device may capture, via the BNC transceiver, a signal over a range of frequencies that spans multiple frequency bands which are licensed by a regulatory authority. The first mobile consumer electronic device may process the captured signal to determine which of the multiple frequency bands are not currently in use by other devices. The first mobile consumer electronic device may select a plurality of the frequency bands. The first mobile consumer electronic device may transmit, via the BNC transceiver, a signal over the selected plurality of frequency bands at a determined strength, where the signal carries video data destined for the second mobile consumer electronic device.

Abstract: Systems and methods are provided for digital-to-analog converter (DAC) with partial constant switching. A digital-to-analog converter (DAC) comprising a plurality of conversion elements may be configured to apply constant switching in only some of the conversion elements. Only conversion elements applying constant switching may incorporate circuitry for providing such the constant switching. Alternatively, each conversion element may incorporate constant switching circuitry and functionality, and the constant switching may then be turned on or off for each conversion element adaptively, such as based on input conditions.

Abstract: Methods and apparatus for processing multichannel signals in a multichannel receiver are described. In one implementation, a plurality of demodulator circuits may provide a plurality of outputs to a processing module, with the processing module then simultaneously estimating noise characteristics based on the plurality of outputs and generating a common noise estimate based on the plurality of outputs. This common noise estimate may then be provided back the demodulators and used to adjust the demodulation of signals in the plurality of demodulators to improve phase noise performance.

Abstract: An asynchronous successive approximation register analog-to-digital converter (SAR ADC), which utilizes one or more overlapping redundant bits in each digital-to-analog converter (DAC) code word, is operable to generate an indication signal that indicates completion of each comparison step and indicates that an output decision for each comparison step is valid. A timer may be initiated based on the generated indication signal. A timeout signal may be generated that preempts the indication signal and forces a preemptive decision, where the preemptive decision sets one or more remaining bits up to, but not including, the one or more overlapping redundant bits in a corresponding digital-to-analog converter code word for a current comparison step to a particular value. For example, the one or more remaining bits may be set to a value that is derived from a value of a bit that was determined in an immediately preceding decision.

Abstract: Methods and systems for repurposing of a global navigation satellite system receiver for receiving low-earth orbit (LEO) communication satellite timing signals may comprise receiving a medium Earth orbit (MEO) satellite signal and/or a LEO signal in a receiver of the communication device. The MEO or LEO signal may be down-converted, and a position of the communication device may be calculated utilizing the down-converted signal. The signal may be down-converted utilizing a local oscillator signal generated by a phase locked loop (PLL), which may be delta-sigma modulated via a fractional-N divider. A clock signal may be communicated to the PLL utilizing a temperature-compensated crystal oscillator. The signal may be down-converted to an intermediate frequency or down-converted directly to baseband frequencies. The signal may be processed utilizing surface acoustic wave (SAW) filters. In-phase and quadrature signals may be processed in the RF path utilizing a two-stage polyphase filter.

Abstract: Aspects of a method and system for high-speed, low-power optical communications are provided. In one embodiment, a system for optical communications comprises a digital-to-analog converter (DAC), a driver, and a transmit optical subsystem. The DAC is operable to receive a digital code of a plurality of digital codes and output an analog current signal having an analog current level of a plurality of analog current levels. The driver is operable to condition the analog current signal output from the digital-to-analog converter. The transmit optical subsystem is operable to generate an optical power signal from the conditioned analog current signal. A mapping between the plurality of digital codes and the plurality of analog current levels is dynamically controlled according to one or more characteristics of the optical power signal. The one or more characteristics comprise or a symbol amplitude sensitivity and/or a nonlinearity that may be temperature dependent.