Abstract: A computer-implemented method and device for determining a user position, implemented in a user handheld computing device programmed to perform the method. The method includes solving for the position of a user based on ranges, which are computed by estimating power loss between a user and a number of Wi-Fi Access Points. Embodiments of the present invention includes a method that is designed to accommodate the non-linear nature of solving a position solution using power estimates. This method includes solving a two-dimensional solution grid of position residuals, or magnitudes of error between true and computed ranges, using signal strength measurements from multiple Wi-Fi access points in order to determine local minima of the position residuals indicating a user position. Standard approaches in the area such as a Least Squares Solution overly simplify the non-linear components resulting in poor performance.

Abstract: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.

Abstract: The present invention provides a method and device using CMOS and MEMS fabrication techniques for making an integrated microneedle device with integrated circuits. Merely by way of example, the technology can be applied to bio and chemical sensing, and other bioMEMS applications. In some embodiments, the integrated circuits are completed using standard IC processes. For example, an array of microneedles are fabricated on top of the IC substrate followed by formation of micro fluidic channels in the substrate. On-chip integrated circuits enable real-time sensing and intelligent drug delivery.

Abstract: A method for providing acceleration data with reduced substrate-displacement bias includes receiving in an accelerometer an external acceleration, determining the acceleration data with reduced substrate displacement bias in a compensation portion in response to a first and a second displacement indicators from a MEMS transducer, and, in response to substrate compensation factors from a MEMS compensation portion, outputting the acceleration data with reduced substrate displacement bias, wherein the first displacement indicator and the second displacement indicator are determined by the MEMS transducer relative to a substrate in response to the external acceleration and to a substrate displacement, and wherein the substrate compensation factors are determined by the MEMS compensation portion relative to the substrate in response to the substrate displacement.

Abstract: A method and structure for a three-axis magnetic field sensing device is provided. The device includes a substrate, an IC layer, and preferably three magnetic field sensors coupled to the IC layer. A nickel-iron magnetic field concentrator is also provided.

Abstract: A method and structure for fabricating sensor(s) or electronic device(s) using vertical mounting is presented. The method includes providing a substrate having a surface region and forming sensor(s) or electronic device(s) on a first region overlying the surface region. At least one bond pad structure can be formed from at least one trench structure. The resulting device can then be singulated within a vicinity of the bond pad structure(s) to form at least one integrated sensor or electronic devices having at least one vertical bond pad. At least one singulated device(s) can be coupled to a package, having a package surface region, such that the vertical bond pad(s) are configured horizontally, and at least one interconnection can be formed between the vertical bond pad(s) and at least one portion of the package surface region.

Abstract: A method and structure for fabricating sensor(s) or electronic device(s) using vertical mounting with interconnections. The method includes providing a resulting device including at least one sensor or electronic device, formed on a die member, having contact region(s) with one or more conductive materials formed thereon. The resulting device can then be singulated within a vicinity of the contact region(s) to form one or more singulated dies, each having a singulated surface region. The singulated die(s) can be coupled to a substrate member, having a first surface region, such that the singulated surface region(s) of the singulated die(s) are coupled to a portion of the first surface region. Interconnections can be formed between the die(s) and the substrate member with conductive adhesives, solder processes, or other conductive bonding processes.

Abstract: An improved MEMS transducer apparatus and method is provided. The apparatus has a movable base structure including an outer surface region and at least one portion removed to form at least one inner surface region. At least one intermediate anchor structure is disposed within the inner surface region. The apparatus includes an intermediate spring structure operably coupled to the central anchor structure, and at least one portion of the inner surface region. A capacitor element is disposed within the inner surface region.

Abstract: A monolithic integrated electronic device includes a substrate having a surface region and one or more integrated micro electro-mechanical systems and electronic devices provided on a first region overlying the surface region. Each of the integrated micro electro-mechanical systems and electronic devices has one or more contact regions. The first region has a first surface region. One or more trench structures are disposed within one or more portions of the first region. A passivation material overlies the first region and the one or more trench structures. A conduction material overlies the passivation material, the one or more trench structures, and one or more of the contact regions. The device also has one or more edge bond pad structures within a vicinity of the one or more bond pad structures, which are formed by a singulation process within a vicinity of the one or more bond pad structures.

Abstract: The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.

Abstract: A method and structure for fabricating a monolithic integrated CMOS and MEMS device. The method includes providing a first semiconductor substrate having a first surface region and forming one or more CMOS IC devices on a CMOS IC device region overlying the first surface region. The CMOS IC device region can also have a CMOS surface region. A bonding material can be formed overlying the CMOS surface region to form an interface by which a second semiconductor substrate can be joined to the CMOS surface region. The second semiconductor substrate having a second surface region to the CMOS surface region by bonding the second surface region to the bonding material, the second semiconductor substrate comprising one or more first air dielectric regions. One or more free standing MEMS structures can be formed within one or more portions of the processed first substrate.

Abstract: A plurality of integrated electronic compasses and circuit system. The system includes a semiconductor substrate and one or more CMOS integrated circuits formed on one or more portions of the semiconductor substrate. The system has a plurality of electronic compass devices operably coupled to the one or more CMOS integrated circuits. The plurality of electronic compass devices can be integrated with one or more sensors, MEMS, or other devices.

Abstract: Embodiments of the present invention can provide an integrated electronic compass and circuit system having a semiconductor substrate and one or more CMOS integrated circuits formed on one or more portions of the semiconductor substrate. The system can have an electronic compass device operably coupled to the one or more CMOS integrated circuits. The system can also have a plurality of electronic compass devices configured in a parallel arrangement in a hub and spoke configuration.

Abstract: A method of fabricating ESD suppression device includes forming conductive pillars dispersed in a dielectric material. The gaps formed between each pillar in the device behave like spark gaps when a high voltage ESD pulse occurs. When the voltage of the pulse reaches the “trigger voltage” these gaps spark over, creating a very low resistance path. In normal operation, the leakage current and the capacitance is very low, due to the physical gaps between the conductive pillars. The proposed method for fabricating an ESD suppression device includes micromachining techniques to be on-chip with device ICs.

Abstract: An apparatus for packaging MEMS and ICs can include a semiconductor substrate, one or more MEMS devices, an enclosure, and one or more bonding structures. The semiconductor substrate can be bonded to a portion of the surface region. The semiconductor substrate can include one or more integrated circuits. Also, the semiconductor substrate can have an upper surface region. The one or more MEMS devise can overlie an inner region of the upper surface region formed by the semiconductor substrate. The enclosure can house the one or more MEMS devices. The enclosure can overlie a first outer region of the upper surface region. Also, the enclosure can have an upper cover region. The one or more bonding structures can be provided within a second outer region of the supper surface region.

Abstract: A method for fabricating a monolithic integrated electronic device using edge bond pads as well as the resulting device. The method includes providing a substrate having a surface region and forming one or more integrated micro electro-mechanical systems and electronic devices on a first region overlying the surface region. One or more trench structures can be formed within one or more portions of the first region. A passivation material and a conduction material can be formed overlying the first region and the one or more trench structures. The passivation material and the conduction material can be etched to form one or more bonding pad structure. The resulting device can then be singulated within a vicinity of the one or more bond pad structures to form two or more integrated micro electro-mechanical systems and electronic devices having edge bond pads.

Abstract: In a specific embodiment, the present invention provides an integrated circuit device. The device includes a base substrate having a surface region and an interlayer dielectric material overlying the surface region. The device also has a thickness of single crystal silicon material overlying the interlayer dielectric material. In one or more embodiments, the thickness of single crystal silicon material has a front region and a backside region. The front region faces the interlayer dielectric material. In a preferred embodiment, the device has a plurality of transistor devices spatially arranged in the thickness of silicon crystal silicon material. Each of the transistor devices has a gate structure within a region of the interlayer dielectric material. The device also has an enclosure housing configured to form a cavity between the backside region of the thickness of silicon material and an upper inside region of the enclosure housing.

Abstract: The present invention is related shielding integrated devices using CMOS fabrication techniques to form an encapsulation with cavity. The integrated circuits are completed first using standard IC processes. A wafer-level hermetic encapsulation is applied to form a cavity above the sensitive portion of the circuits using IC-foundry compatible processes. The encapsulation and cavity provide a hermetic inert environment that shields the sensitive circuits from EM interference, noise, moisture, gas, and corrosion from the outside environment.

Abstract: The present invention relates to integrating an inertial mechanical device on top of a CMOS substrate monolithically using IC-foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A thick silicon layer is added on top of the CMOS. A subsequent patterning step defines a mechanical structure for inertial sensing. Finally, the mechanical device is encapsulated by a thick insulating layer at the wafer level. Comparing to the incumbent bulk or surface micromachined MEMS inertial sensors, the vertically monolithically integrated inertial sensors have smaller chip size, lower parasitics, higher sensitivity, lower power, and lower cost.

Abstract: A handheld device for capturing magnetic credit card data includes a MEMS magnetic field sensor disposed within the housing, wherein the MEMS magnetic field sensor is configured to determine a plurality of magnetic data stored on a magnetic stripe of a user provided media when the user disposes a user provided media proximate to the housing, and a processor disposed within the housing and coupled to the MEMS magnetic field sensor, wherein the processor is programmed to receive the plurality of user data stored on the user provided media, wherein the processor is configured to execute an application program, and wherein the processor is programmed to provide at least a subset of the plurality of user data to the application program.