Patents Assigned to Mellanox Technologies TLV Ltd.
  • Patent number: 10389646
    Abstract: A network switch includes switching circuitry and multiple ports. The multiple ports are connected to a communication network. The switching circuitry is configured to receive via the ports packets that are assigned respective Virtual Lanes (VLs), and forward each packet for transmission via a respective selected port, to queue the packets pending for transmission via a given port in multiple VL-dedicated queues, in accordance with the VLs assigned to the packets, to mark an outbound packet, pending for transmission via the given port, with multiple congestion indications that are indicative of respective congestion states of the multiple VL-dedicated queues of the given port, and to transmit the marked outbound packet via the given port.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: August 20, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Vladimir Zdornov, Eitan Zahavi
  • Patent number: 10387074
    Abstract: Communication apparatus includes multiple ports configured to serve as ingress ports and egress ports for connection to a packet data network. A memory is coupled to the ports and configured to contain both respective input buffers allocated to the ingress ports and a shared buffer holding data packets for transmission in multiple queues via the egress ports. Control logic is configured to monitor an overall occupancy level of the memory, and when a data packet is received through an ingress port having an input buffer that is fully occupied while the overall occupancy level of the memory is below a specified maximum, to allocate additional space in the memory to the input buffer and to accept the received data packet into the additional space.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: August 20, 2019
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Roy Kriss, Barak Gafni, George Elias, Eran Rubinstein, Shachar Bar Tikva
  • Patent number: 10320952
    Abstract: A network device includes multiple ports, for communicating over a communication network, and packet processing circuitry. The packet processing circuitry is configured to receive via the ports packets belonging to a plurality of multicast flows, to receive, for each of the multicast flows, (i) a first configuration that specifies clients that are to receive the multicast flow prior to a specified switch-over time, and (ii) a second configuration that specifies the clients that are to receive the multicast flow after the specified switch-over time, to forward the multicast flows via the ports in accordance with the first configuration, to extract from a field in at least one of the packets a value that is indicative of the switch-over time, and, based on the extracted value, to switch-over forwarding of the multicast flows from the first configuration to the second configuration simultaneously at the switch-over time.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: June 11, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Aviad Raveh, Gil Bloch, Richard Mark Hastie, Asaf Wachtel
  • Patent number: 10298500
    Abstract: ECMP routing is carried out in fabric of network entities by representing valid destinations and invalid destinations in a group of the entities by a member vector. The order of the elements in the member vector is permuted. A portion of the elements in the permuted vector is pseudo-randomly masked. A flow of packets is transmitted to the first valid destination in the masked member vector.
    Type: Grant
    Filed: November 12, 2017
    Date of Patent: May 21, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Liron Mula, Gil Levy, Aviv Kfir
  • Patent number: 10284465
    Abstract: A switch includes multiple physical ports and forwarding circuitry. The physical ports are configured to receive and send packets over a network. The forwarding circuitry is configured to assign first port numbers to the physical ports, and second port numbers to temporary ports defined in addition to the physical ports, to receive a packet having a destination address via a physical port, to select, based on the destination address, an egress port number for the packet from among the first and second port numbers, to forward the packet to a physical port corresponding to the egress port number if the egress port number is one of the first port numbers, and, if the egress port number is one of the second port numbers, to map a temporary port associated with the egress port number to a mapped physical port and to forward the packet to the mapped physical port.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: May 7, 2019
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Zachy Haramaty, Eitan Zahavi, Itamar Rabenstein
  • Patent number: 10250530
    Abstract: Communication apparatus includes multiple interfaces configured to be connected to a packet data network for receiving and forwarding of data packets of multiple types. A memory is coupled to the interfaces and configured as a buffer to contain packets received through the ingress interfaces while awaiting transmission to the network via the egress interfaces. Packet processing logic is configured to maintain multiple transmit queues, which are associated with respective ones of the egress interfaces, and to place both first and second queue entries, corresponding to first and second data packets of the first and second types, respectively, in a common transmit queue for transmission through a given egress interface, while allocating respective spaces in the buffer to store the first and second data packets against separate, first and second buffer allocations, which are respectively assigned to the first and second types of the data packets.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: April 2, 2019
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Niv Aibester, Amir Roitshtein, Barak Gafni, George Elias, Itamar Rabenstein
  • Patent number: 10250489
    Abstract: A stacked switch packet communication system is connected to a Multi-Chassis Link Aggregation Group (MLAG). Devices in the system include a designated device for receiving packets that are destined for the MLAG. A new MLAG device is enabled while continuing packet communication by identifying an address of a single port in the new MLAG device. In first updates of the devices the single port is established in the forwarding databases of the devices and the packets transmitted through the devices to the single port. Thereafter, in second updates the single port is replaced in the forwarding databases by another port of the new MLAG device. Upon completion of respective second updates, the packets are transmitted through the devices to the other port in the MLAG.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: April 2, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Matty Kadosh, Gil Levy, Aviv Kfir
  • Patent number: 10237156
    Abstract: A network element includes multiple interfaces and circuitry. The interfaces are configured to connect to a communication system. The circuitry is configured to receive via an ingress interface a packet that includes an Error Detection Code (EDC) field including an input EDC value, to determine an input timestamp indicative of a time-of-arrival of the received packet at the network element, and overwrite at least part of the input EDC value in the EDC field of the packet with the input timestamp, to estimate for the packet a traversal latency between reception at the ingress interface and transmission via a selected egress interface, based at least on the input timestamp, and to produce a deliverable version of the packet by writing an output EDC value to the EDC field, and send the deliverable version of the packet via the selected egress interface.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: March 19, 2019
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Oded Belfer, George Elias, Gil Levy
  • Patent number: 10237204
    Abstract: A method for communication includes providing multiple chassis. Each chassis includes a plurality of slots, which are arranged in at least an outer tier and a middle tier, and which are configured for insertion therein of respective switches. In at least a first chassis among the multiple chassis, first internal interconnects are connected between the slots in the middle tier and the slots in the outer tier, so as to connect each of the slots in the middle tier to multiple slots in the outer tier. In at least a second chassis among the multiple chassis, second internal interconnects are connected directly between the slots in the outer tier. External interconnects are connected between at least some of the slots in the outer tier of the first chassis and at least some of the slots in the outer tier of the second chassis in order to define a network.
    Type: Grant
    Filed: December 20, 2015
    Date of Patent: March 19, 2019
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Barak Gafni, Eitan Zahavi, Benny Koren
  • Patent number: 10230652
    Abstract: A communication system includes a transmit (TX) device and a receive (RX) device. The TX device is configured to transmit data over a communication link. The RX device is configured to receive the data transmitted by the TX device over the communication link, to buffer the received data in an RX buffer, to assess a fill level of the RX buffer, to select, depending on the fill level of the RX buffer, either a pause-resume flow-control scheme or a credit-based flow-control scheme, and to apply the selected flow-control scheme in coordination with the TX device.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: March 12, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Zachy Haramaty, Barak Gafni, Aviv Kfir
  • Patent number: 10218642
    Abstract: A network switch includes circuitry and multiple ports, including multiple input ports and at least one output port, configured to connect to a communication network. The circuitry includes multiple distinct-flow counters, which are each associated with a respective input port and with the output port, and which are configured to estimate respective distinct-flow counts of distinct data flows received via the respective input ports and destined to the output port. The circuitry is configured to store packets that are destined to the output port and were received via the multiple input ports in multiple queues, to determine a transmission schedule for the packets stored in the queues, based on the estimated distinct-flow counts, and to transmit the packets via the output port in accordance with the determined transmission schedule.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: February 26, 2019
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Liron Mula, Sagi Kuks, George Elias, Eyal Srebro, Ofir Merdler, Amiad Marelli, Lion Levi, Oded Zemer, Yoav Benros
  • Patent number: 10205683
    Abstract: Communication apparatus includes a memory, which is configured to hold data packets, having respective packet sizes, for transmission over a data link, and a transmitter, which is configured to transmit the data packets over the data link at a bit rate determined by a wire speed of the data link. A shaper is coupled to throttle transmission of the data packets by the transmitter responsively to the respective packet sizes, whereby some of the data packets are transmitted over the data link at a transmission rate that is less than the bit rate.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: February 12, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: George Elias, Barak Gafni, Ran Ravid, Ido Bukspan, Zachy Haramaty
  • Patent number: 10200294
    Abstract: A method for network communication includes receiving in a network element a packet for forwarding to a destination node. The destination node is reachable via two or more candidate ports of the network element that are connected to respective next-hop network elements. Link-level flow-control credit notifications are received in the network element from the next-hop network elements via the respective candidate ports. An egress port is selected for the packet, from among the candidate ports, based at least on the received link-level flow-control credit notifications. The packet is forwarded toward the destination node over the selected egress port.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: February 5, 2019
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Alex Shpiner, Vladimir Zdornov, Zachy Haramaty, Eitan Zahavi
  • Patent number: 10182017
    Abstract: A network switch includes circuitry, multiple ports and multiple hardware-implemented distinct-flow counters. The multiple ports are configured to receive packets from a communication network. Each of the multiple hardware-implemented distinct-flow counters is configured to receive (i) a respective count definition specifying one or more packet-header fields and (ii) a respective subset of the received packets, and to estimate a respective number of distinct flows that are present in the subset, by evaluating, over the packets in the subset, a number of distinct values in the packet-header fields belonging to the count definition. The circuitry is configured to provide each of the distinct-flow counters with the respective subset of the received packets, including providing a given packet to a plurality of the distinct-flow counters, and to identify an event-of-interest based on numbers of distinct flows estimated by the distinct-flow counters.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: January 15, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: David Mozes, Liron Mula, Benny Koren
  • Patent number: 10178029
    Abstract: Communication apparatus includes multiple interfaces configured to be connected to respective links in a packet data network. Switching circuitry in the apparatus is coupled between the interfaces and is configured to receive, via a first interface among the multiple interfaces, an adaptive routing notification (ARN) requesting that a specified flow of packets from a given source to a given destination in the network be rerouted. The switching circuitry is configured, upon verifying that the first interface serves as an egress interface for the packets in the specified flow, to reroute the specified flow through a different, second interface among the multiple interfaces when there is an alternative route available in the network from the second interface to the given destination, and after finding that there is no alternative route available from any of the interfaces to the given destination, to forward the ARN to a plurality of the interfaces.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: January 8, 2019
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Gil Levy, Alex Shpiner
  • Patent number: 10153962
    Abstract: Communication apparatus includes multiple interfaces connected to a packet data network, and a memory coupled to the interfaces and configured as a buffer to contain packets received through ingress interfaces while awaiting transmission to the network via respective egress interfaces. Packet processing logic is configured, upon receipt of a test packet through an ingress interface of the apparatus, to allocate a space in the buffer for storage of a single copy of the test packet, to replicate and transmit sequentially multiple copies of the stored copy of the test packet through a designated egress interface, to receive an indication of a number of copies of the test packet that are to be transmitted, and responsively to the indication, to terminate replication of the test packet and release the allocated space in the buffer.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: December 11, 2018
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Amiad Marelli, George Elias, Itamar Rabenstein, Miriam Menes, Ido Bukspan
  • Patent number: 10148571
    Abstract: A routing table is represented as a binary search tree ordered by prefix lengths. Markers are placed to guide accessing nodes in designated subtrees to search for a longest prefix match with destination addresses of data packet. Destination descendant nodes in remote hierarchical levels of the tree are associated with the markers. The traversal of the binary search tree is conducted by accessing the respective destination descendant nodes while avoiding accessing nodes in intermediate hierarchical levels. The packet is processed using the longest prefix match.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: December 4, 2018
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Aviv Kfir, Pedro Reviriego, Salvatore Pontarelli, Gil Levy
  • Patent number: 10084716
    Abstract: Communication apparatus includes multiple interfaces configured to be connected to a packet data network and a memory, coupled to the interfaces and configured as a buffer to contain the data packets received through the ingress interfaces in multiple queues while awaiting transmission to the network via the egress interfaces. Congestion control logic includes a packet discard machine, which is configured to drop a first fraction of the data packets from at least a first queue in the buffer in response to a status of the queues, and a packet marking machine, which is configured to apply a congestion notification to a second fraction of the data packets from at least a second queue in the buffer in response to the status of the queues. Machine control circuitry is coupled to selectively enable and disable at least the packet discard machine.
    Type: Grant
    Filed: March 20, 2016
    Date of Patent: September 25, 2018
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventor: Barak Gafni
  • Patent number: 10079782
    Abstract: Apparatuses and methods are described that provide for credit based flow control in a network in which a public buffer is supported at a receiver node, where a transmitter node can control the use of the public buffer. In particular, the transmitter node determines a buffer credit value (TCRi) for each virtual lane of the transmitter node. The buffer credit value (TCRi) is negative (e.g., less than 0) in an instance in which a respective virtual lane private buffer is fully used and thus reflects a loan of credits from the public buffer. In addition, the transmitter node knows the needed buffer size per virtual lane for transmitting a packet in advance based on the round trip time (RTT) and maximum transmission unit (MTU) for the packet and is precluded from consuming more space on the public buffer than required to meet RTT.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: September 18, 2018
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Zachy Haramaty, Ran Ravid, Oded Wertheim
  • Patent number: 10069748
    Abstract: Communication apparatus includes multiple interfaces for connection to a packet data network and a memory configured to contain packets awaiting transmission to the network in multiple queues, which are assigned respective transmission priorities. Control logic assigns to the queues respective weighting factors, which vary inversely with the respective transmission priorities, and calculates for each egress interface a respective interface congestion level. The control logic calculates effective congestion levels for the queues as a weighted function of the respective queue lengths and the respective interface congestion level, weighted by the respective weighting factors, and applies congestion control to the queues responsively to the effective congestion levels.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: September 4, 2018
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Alex Shpiner, Gil Levy