Patents Assigned to Memory Technologies LLC
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Publication number: 20240176505Abstract: A storage module includes a set of memories. Each of the memories in the set of memories may be divided into a set of portions. A controller is configured to transfer data between the set of memories and a host connected through an interface. A set of channels connects the set of memories to the controller. The controller is also configured to select: a memory from the set of memories, a portion from the set of portions for the selected memory, and/or a channel from the set of channels, e.g., connected to the selected memory, based upon an identification (ID) associated with the data. The ID may be separate from the data and a write address of the data, and the selected memory, the selected portion, and the selected channel may be used to store the data.Type: ApplicationFiled: November 1, 2023Publication date: May 30, 2024Applicant: Memory Technologies LLCInventor: Kimmo Juhani Mylly
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Publication number: 20240168635Abstract: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.Type: ApplicationFiled: November 27, 2023Publication date: May 23, 2024Applicant: Memory Technologies LLCInventors: JANI HYVONEN, KIMMO J. MYLLY, JUSSI HAKKINEN, YEVGEN GYL
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Publication number: 20240152274Abstract: A method includes, in one non-limiting embodiment, receiving a command originating from an initiator at a controller associated with a non-volatile mass memory coupled with a host device, the command being a command to write data that is currently resident in a memory of the host device to the non-volatile mass memory; moving the data that is currently resident in the memory of the host device from an original location to a portion of the memory allocated for use at least by the non-volatile mass memory; and acknowledging to the initiator that the command to write the data to the non-volatile mass memory has been executed. An apparatus configured to perform the method is also described.Type: ApplicationFiled: October 13, 2023Publication date: May 9, 2024Applicant: Memory Technologies LLCInventors: Kimmo J. Mylly, Jani J. Klint, Jani Hyvonen, Tapio Hill, Jukka-Pekka Vihmalo, Matti Floman
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Patent number: 11907538Abstract: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.Type: GrantFiled: October 7, 2022Date of Patent: February 20, 2024Assignee: Memory Technologies LLCInventors: Jani Hyvonen, Kimmo J. Mylly, Jussi Hakkinen, Yevgen Gyl
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Publication number: 20240020008Abstract: A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.Type: ApplicationFiled: July 12, 2023Publication date: January 18, 2024Applicant: Memory Technologies LLCInventors: Olli Luukkainen, Kimmo J. Mylly, Jani Hyvonen
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Publication number: 20230418523Abstract: The specification and drawings present a new apparatus and method for managing/configuring by the memory module controller storing operational state data for operating the memory module controller into an extended random access memory comprised in a memory module and in a host system memory of a host device during various operational modes/conditions of the memory module and the host system memory. Essentially, the memory module controller operated as a master for the data transfers as described herein. The operational state data typically comprises state information, a logical to physical (L2P) mapping table and register settings.Type: ApplicationFiled: September 11, 2023Publication date: December 28, 2023Applicant: Memory Technologies LLCInventor: Kimmo J. Mylly
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Patent number: 11829601Abstract: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.Type: GrantFiled: January 9, 2023Date of Patent: November 28, 2023Assignee: Memory Technologies LLCInventors: Jani Hyvonen, Kimmo J. Mylly, Jussi Hakkinen, Yevgen Gyl
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Patent number: 11809718Abstract: A storage module includes a set of memories. Each of the memories in the set of memories may be divided into a set of portions. A controller is configured to transfer data between the set of memories and a host connected through an interface. A set of channels connects the set of memories to the controller. The controller is also configured to select: a memory from the set of memories, a portion from the set of portions for the selected memory, and/or a channel from the set of channels, e.g., connected to the selected memory, based upon an identification (ID) associated with the data. The ID may be separate from the data and a write address of the data, and the selected memory, the selected portion, and the selected channel may be used to store the data.Type: GrantFiled: May 21, 2021Date of Patent: November 7, 2023Assignee: Memory Technologies LLCInventor: Kimmo Juhani Mylly
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Patent number: 11797180Abstract: A method includes, in one non-limiting embodiment, receiving a command originating from an initiator at a controller associated with a non-volatile mass memory coupled with a host device, the command being a command to write data that is currently resident in a memory of the host device to the non-volatile mass memory; moving the data that is currently resident in the memory of the host device from an original location to a portion of the memory allocated for use at least by the non-volatile mass memory; and acknowledging to the initiator that the command to write the data to the non-volatile mass memory has been executed. An apparatus configured to perform the method is also described.Type: GrantFiled: December 23, 2020Date of Patent: October 24, 2023Assignee: Memory Technologies LLCInventors: Kimmo J. Mylly, Jani J. Klint, Jani Hyvonen, Tapio Hill, Jukka-Pekka Vihmalo, Matti Floman
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Patent number: 11789796Abstract: This disclosure relates to selectively performing a read with increased accuracy, such as a self-reference read, from a memory. In one aspect, data is read from memory cells, such as magnetoresistive random access memory (MRAM) cells, of a memory array. In response to detecting a condition associated with reading from the memory cells, a self-reference read can be performed from at least one of the memory cells. For instance, the condition can indicate that data read from the memory cells is uncorrectable via decoding of error correction codes (ECC). Selectively performing self-reference reads can reduce power consumption and/or latency associated with reading from the memory compared to always performing self-reference reads.Type: GrantFiled: June 17, 2022Date of Patent: October 17, 2023Assignee: Ovonyx Memory Technology, LLCInventors: Wayne Kinney, Gurtej S. Sandhu
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Patent number: 11782647Abstract: The specification and drawings present a new apparatus and method for managing/configuring by the memory module controller storing operational state data for operating the memory module controller into an extended random access memory comprised in a memory module and in a host system memory of a host device during various operational modes/conditions of the memory module and the host system memory. Essentially, the memory module controller operated as a master for the data transfers as described herein. The operational state data typically comprises state information, a logical to physical (L2P) mapping table and register settings.Type: GrantFiled: December 29, 2021Date of Patent: October 10, 2023Assignee: Memory Technologies LLCInventor: Kimmo J. Mylly
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Patent number: 11775173Abstract: A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.Type: GrantFiled: March 17, 2021Date of Patent: October 3, 2023Assignee: Memory Technologies LLCInventors: Olli Luukkainen, Kimmo J. Mylly, Jani Hyvonen
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Patent number: 11763885Abstract: A variable resistance memory array, programming a variable resistance memory element and methods of forming the array. A variable resistance memory array is formed with a plurality of word line transistors surrounding each phase change memory element. To program a selected variable resistance memory element, all of the bitlines are grounded or biased at the same voltage. A top electrode select line that is in contact with the selected variable resistance memory element is selected. The word line having the word line transistors surrounding the selected variable resistance memory element are turned on to supply programming current to the element. Current flows from the selected top electrode select line through the variable resistance memory element into the common source/drain region of the surrounding word line transistors, across the transistors to the nearest bitline contacts. The word lines are patterned in various lattice configurations.Type: GrantFiled: June 15, 2021Date of Patent: September 19, 2023Assignee: Ovonyx Memory Technology, LLCInventor: Jun Liu
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Patent number: 11742307Abstract: A front-end method of fabricating nickel plated caps over copper bond pads used in a memory device. The method provides protection of the bond pads from an oxidizing atmosphere without exposing sensitive structures in the memory device to the copper during fabrication.Type: GrantFiled: February 1, 2022Date of Patent: August 29, 2023Assignee: Ovonyx Memory Technology, LLCInventors: John Moore, Joseph F. Brooks
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Patent number: 11733869Abstract: A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.Type: GrantFiled: October 4, 2022Date of Patent: August 22, 2023Assignee: Memory Technologies LLCInventors: Olli Luukkainen, Kimmo J. Mylly, Jani Hyvonen
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Patent number: 11670343Abstract: An apparatus, such as a nonvolatile solid-state memory device, may, in some implementations, include access line bias circuitry to set a bias level associated with a deselected access line(s) of a memory core in response to mode information. In one approach, access line bias circuitry may use linear down regulation to change a voltage level on deselected access lines of a memory core. A memory access device, such as a host processor, may be provided that is capable of dynamically setting a mode of operation of a memory core of a memory device in order to manage power consumption of the memory. Other apparatuses and methods are also provided.Type: GrantFiled: September 1, 2021Date of Patent: June 6, 2023Assignee: Ovonyx Memory Technology, LLCInventors: Gerald Barkley, Nicholas Hendrickson
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Publication number: 20230068142Abstract: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.Type: ApplicationFiled: October 7, 2022Publication date: March 2, 2023Applicant: Memory Technologies LLCInventors: Jani Hyvonen, Kimmo J. Mylly, Jussi Hakkinen, Yevgen Gyl
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Publication number: 20230027240Abstract: A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.Type: ApplicationFiled: October 4, 2022Publication date: January 26, 2023Applicant: Memory Technologies LLCInventors: Olli Luukkainen, Kimmo J. Mylly, Jani Hyvonen
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Patent number: 11550476Abstract: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.Type: GrantFiled: October 10, 2019Date of Patent: January 10, 2023Assignee: Memory Technologies LLCInventors: Jani Hyvonen, Kimmo J. Mylly, Jussi Hakkinen, Yevgen Gyl
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Patent number: 11494080Abstract: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.Type: GrantFiled: August 24, 2021Date of Patent: November 8, 2022Assignee: Memory Technologies LLCInventors: Jani Hyvonen, Kimmo J. Mylly, Jussi Hakkinen, Yevgen Gyl