Abstract: An obstacle detection system, particularly for assisting car parking that comprises a control unit and a plurality of sensors, which comprise emitters-receivers for emitting an ultrasonic signal and for receiving an echo signal reflected by at least one obstacle and an evaluator for the parametric evaluation of the received echo signals, the evaluator comprising a polling module suitable to determine, for each sensing, the number of times for which the received signals are repeated and to reject the signals that are repeated for a number of times that is lower than a preset number.

Abstract: An obstacle detection method and system, particularly for car parking systems comprising emitting ultrasound signals at a plurality of sensors, receiving echo signals returned by at least one obstacle, performing a parametric evaluation of the received signals, determining, for each sensor, the distance between the sensor and an obstacle detected by it, associating with each sensor a value of the distance from the obstacle detected by it; determining a value corresponding to the minimum detected distance and replacing it with the sum value between a minimum distance and a priority threshold value; assigning to the sensor that detected the minimum distance a priority status; and defining a sensor polling cycle that polls more frequently a priority status sensor than non-prioritized sensors.

Abstract: A continuity device for electric cables includes a container (6) having an upper surface (21) provided with current taps (20) located on the upper surface (21); and an arranging device (1) for gathering and containing the excess lengths of the electric feeding cables (7) positioned and tied above the upper surface (21); the electric feeding cables (7) being provided at the free end with plugs (9′) that can be inserted in the current taps (20).

Abstract: A RISC architecture computer configured for emulating the instruction set of a target computer to execute software written for the target computer, e.g., an Intel 80X86, a Motorola 680X0 or a MIPS R3000. The apparatus is integrated with a core RISC computer to form a RISC computer that executes an expanded RISC instruction. The expanded RISC instruction contains data fields which designate indirect registers that point to emulation registers that correspond to registers in the target computer. The width of the emulation registers is at least the width of those in the target computer. However, a field in the expanded RISC instruction restricts the emulated width to that required by a particular emulated instruction. Additionally, the expanded RISC instruction contains a field which designates the emulation mode for condition codes and selects logic to match the condition codes of the target computer.

Abstract: A transmission system develops a binary encoded data train having a message and a header preceding the message. The data train is applied to a carrier frequency to modulate the carrier using FSK techniques. The header includes synch signals, one or more address signals, a message length signal and control signals separating the above signals. One or more personal receivers receive the message if responsive to one of the address signals in the header. An address signal may address a unique personal receiver, a selected group of or all such personal receivers. Each receiver is sequentially activated and deactivated, being activated to detect a synch signal. If synch signals are detected, the receiver remains activated to determine if an address signal identifies such receiver to receive the message. A received message is stored digitally and may be selectively displayed in alphanumeric characters when convenient for the recipient.