Abstract: An amalgam and a method of preparing an amalgam for bonding two articles together, which includes mixing a composition of a liquid metal and a metal powder to thoroughly wet the metal powder with the liquid metal, and thereafter mixing a composition with a pestle element for mechanically amalgamating the composition. Other additives may be provided such as ductile metals, additives containing oxides, ceramics, or other non-metallic compounds, and volatile constituents. The amalgamated composition can then wet surfaces to be bonded and harden at or near room temperature.

Abstract: A method and apparatus for selectively electroplating a metallic coating, such as solder, onto a plurality of small and closely spaced electrical contacts. The method includes sealingly enclosing the contacts in an electroplating cell having an anode, a cathode and a chamber, forming an electrical connection between the cathode and the contacts and electroplating the contacts.

Abstract: A multilayered electrical interconnect circuit whereby interconnect lines, placed in channel regions throughout a rerouting substrate, function to reroute densely packaged electrical components via geometrically uniform spot links placed upon only the surface layer within each channel region. The interconnect circuit has closely spaced parallel X-and Y-lines orthogonal to one another, each X- and Y-line placed within horizontal and vertical channel regions, respectively, such that electrical connections between closely spaced large-scale integrated circuits or discrete electrical components can be rerouted with a combination of one or more X- and/or Y-lines.

Abstract: A customizable interconnect circuit wherein a universal substrate of minimum layers is completely customized by programmable conductive links placed only on the top layer of the substrate. The customizable circuit having high density of orthogonally placed X- and Y-conductors capable of interconnecting closely spaced large-scale integrated circuits or discrete electrical components. By utilizing a plurality of interconnect cells regularly spaced throughout a universal, fixed substrate, interconnect routing from overlying electrical components or integrated circuits can be more directly routed to target areas.

Abstract: Trenching techniques for forming a channel partially through and a via completely through the insulating layer of a substrate are disclosed. With additional steps the channel can form an electrically conductive line, an electrode of an integrated capacitor, or an optical waveguide.

Abstract: Removing welded outer lead bonds of TAB tape leads to contacts on a substrate. The method includes separating the electrical leads adjacent the weld bonds leaving a remnant, engaging the remnant with a shear tool, and moving the tool and bond relative to each other shearing the remnant. In some cases the tool is ultrasonically vibrated in a direction transversely to the relative movement of the tool and bond.

Abstract: The excise and lead form of TAB leads bonded to an integrated circuit chip. Leads extending beyond a sidewall are clamped between a first clamp and a form anvil at a first portion spaced from the chip. The leads are also clamped between an excise/form tool and a second clamp at a second portion spaced further from the chip than the first portion. An excise blade cuts the leads outside the second portion. Then the excise/form tool, second clamp and excise blade move downwards in a curved path toward the chip to form a first lead corner against the form anvil and a second lead corner against the excise/form tool without splaying or galling the leads.

Abstract: A field emitter device comprising a conductive metal and a diamond emission tip with negative electron affinity in ohmic contact with and protruding above the metal. The device is fabricated by coating a substrate with an insulating diamond film having negative electron affinity and a top surface with spikes and valleys, depositing a conductive metal on the diamond film, and applying an etch to expose the spikes without exposing the valleys, thereby forming diamond emission tips which protrude a height above the conductive metal less than the mean free path of electrons in the diamond film.

Abstract: A method of applying a compound of a metal and a reactive gas onto a surface by depositing a metal from a liquid metal cluster ion source onto said surface in the presence of a gas on the surface to combine with the deposited metal while isolating the gas from the source of the metal cluster ions.

Abstract: A method of electrically testing an electrical component containing a plurality of networks with at least one node. The method uses segmented, charge limiting testing to charge the nodes and detect shorted or disconnected nodes while preventing accumulated charges in the networks from making uncharged nodes appear charged. The method is well suited for voltage contrast electron beam testing of unpopulated high density multichip modules and interconnect substrates.

Abstract: A dielectric substrate is coated with a protective layer and a catalyst film is formed in a laser irradiated predetermined pattern on the protective layer so that during electroless deposition a metal is plated on the catalyst film in the predetermined pattern whether or not the dielectric has unwanted catalytic sites. The protective layer is not removed by the electroless plating bath or prior etch steps but can subsequently be stripped by a separate etch without removing the plated metal or the dielectric from the substrate.

Abstract: A method of manufacturing a multiple element circuit interconnect substrate is provided which provides an optimized routing plan. The routing plan is based upon a multi-dimensional binary data structure having nodes representing each terminal interconnect requirement which is preprocessed to order the required interconnects according to density.

Abstract: A high density, high performance circuit fabricated with a copper/epoxy structure. The circuit is well suited for an integrated circuit interconnect device. Fluorene-containing epoxy resins may be used to obtain certain material and processing advantages over copper/polyimide structures. The circuit structure resides on a substrate which may be ceramic, a semiconductor such as silicon, or, advantageously, a cured epoxy resin.

Abstract: A system for depositing a film on a substrate includes a sputtering system and means for causing the substrate to move through the sputtering system. Embodiments of the present invention employ a cylindrical hollow cathode magnetron sputtering system, which causes the overall film deposition system to be ideally suited for coating elongate cylindrical substrates such as wires and fibers and the like.

Abstract: Channels extending partially through and vias extending completely through an insulating layer in an electrical interconnect such as a substrate or integrated circuit can be formed in a relatively few steps with low cost etching and patterning techniques. The channels and vias can then be filled with an electrical conductor in a relatively few steps. In one embodiment a non-erodible hard mask exposing the vias and channels is placed over a polyimide layer, an erodible soft mask exposing the vias but covering the channels is placed over the hard mask, and a plasma etch is applied. The via regions are etched until the soft mask completely erodes and then both the via and channel regions are etched to provide partially etched channels and fully etched vias. Thereafter a seed layer is deposited over the interconnect, and an electrically conductive layer is electrolytically deposited over the seed layer substantially filling the channels and vias.

Abstract: A testing and burn in socket compatible with the high density test pads located at small pitches devices on a TAB tape. A TAB tape carrier for supporting the TAB tape and a test circuit board having contact pads for electrical communication with the test pads. An alignment fixture positioned between the tape carrier and circuit board and including an opening in alignment between the test pads and the contact pads. A metal in elastomer matrix is positioned in the opening for providing electrical communication between the test pads and the contact pads. A block may be positoned in the openings and contain a plurality of straight parallel electrically conductive pins aligned with the matrix for high frequency tests.

Abstract: A thermally and electrically conductive paste for making a detachable and compliant connection between two surfaces. The paste comprises an equilibrium mixture of an electrically conductive liquid metal and particulate solid constituents, wherein at the temperature of the paste during connection the proportions of liquid metal and particulate solid constituents remain between the ultimate liquidus and the ultimate solidus of the phase diagram of the mixture and the paste remains non-solidified. in cryogenic and low temperature environments the paste forms a hardened bond with a TCE matched to a contacted surface.

Abstract: A method for electrolessly plating an overcoat metal on a metal conductor disposed on a dielectric surface of a substrate. The method includes removing carbonized film from the dielectric surface by applying a plasma discharge, acid treating the metal conductor by dipping the substrate in a first acid solution in order to clean the surface of the metal conductor, activating the metal conductor to allow electroless plating thereon by dipping the substrate in a metal activator solution, deactivating the dielectric surface to prevent electroless plating thereon without deactivating the metal conductor by dipping the substrate in a second acid solution, and plating an overcoat metal on the metal conductor by dipping the substrate in an electroless plating solution so that the overcoat metal plates on and coats the metal conductor without plating on the dielectric surface.

Abstract: A customizable circuit using a programmable interconnect and a compatible TAB chip bonding design. The programmable interconnect comprises layers of wire segments forming programmable junctions rather than continuous wires. This segmentation is performed with an offset from line to line in each layer such that the ends of the segments in each layer form along diagonal lines having a pitch determined by the basic wire segment length. The terminal ends of each of these segments are positioned in a plane such that the segments may be connected by short lengths to form the desired interconnect. The links which join the line segments represent the customization of the otherwise undedicated interconnect. The TAB chip bonding design uses a carrier tape to bond the integrated circuit chips to the programmable interconnect. Also disclosed are methods for forming the interconnect and the TAB chip bonding design.

Abstract: A diffusion barrier which reduces the diffusion of a copper feature into an oxygen containing polymer is provided by a copper metal alloy. The diffusion barrier is fabricated by coating a metal on a copper feature, heating the metal and copper feature to form an alloy of the copper feature and the metal, etching the non-alloyed metal which covers the alloy, and depositing an oxygen containing polymer on the alloy. Preferably the metal is aluminum and a copper aluminum alloy diffusion barrier is at least 300 angstroms thick and contains at least 8 percent aluminum on the surface in contact with the polymer.