Patents Assigned to Microelectronics and Computer Technology Corporation
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Patent number: 4930216Abstract: Integrated circuit dies, while still in wafer form, are prepared for surface mounting direct to a substrate without requiring packaging. Holes are made through a wafer having a plurality of integrated circuit dies and are placed between the dies and adjacent the die pads. A layer of insulating material is placed on the wafer and in the outer periphery of the holes. An electrically conductive connection is made between the top of each pad and the inside of the insulating material in an adjacent hole. The dies are separated from each other and may be surface mounted to a substrate by soldering.Type: GrantFiled: March 10, 1989Date of Patent: June 5, 1990Assignee: Microelectronics and Computer Technology CorporationInventor: Bradley H. Nelson
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Patent number: 4926241Abstract: A substrate for attaching electrical devices having an interconnect wiring structure and a support for the interconnect, the support having a number of vias, or throughholes, extending therethrough and electrically connected to the interconnect. The substrate allows for attachment of the electrical devices on the side of the support opposite the interconnect at the vias, rather than on the interconnect itself. By so doing, the chips can be packed more densely since the area between the chips normally reserved for engineering change pads, test pads and the like is not required, these functions being performed on the interconnect on the opposite side of the substrate.Type: GrantFiled: February 19, 1988Date of Patent: May 15, 1990Assignee: Microelectronics and Computer Technology CorporationInventor: David H. Carey
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Patent number: 4923000Abstract: A fluid heat exchanger for cooling an electronic component including a housing having a fluid inlet and fluid outlet. Piezoelectric means are connected to a plurality of flexible blades for pumping fluid from the inlet to the outlet. A heat conductive structure is connected to the housing base for conducting heat to the fluid. The heat conductive structure may include the flexible blades and/or fixed metal fins.Type: GrantFiled: March 3, 1989Date of Patent: May 8, 1990Assignee: Microelectronics and Computer Technology CorporationInventor: Richard D. Nelson
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Patent number: 4922323Abstract: A method for producing miniature, planar, hermetically sealed, electrical feedthrus having multiple layers of molybdenum conductors separated by aluminum which is anodized and selectively etched for providing supports for the multilayer. The exposed molybdenum is cleaned and oxidized and sealed with glass to provide a hermetic seal. Contact portions of the molybdenum are cleaned and plated whereby the contacts will accept a contact seal.Type: GrantFiled: February 1, 1988Date of Patent: May 1, 1990Assignee: Microelectronics and Computer Technology CorporationInventor: Curtis N. Potter
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Patent number: 4920639Abstract: A method of building a multilevel electrical interconnect supported by metal pillars with air as a dielectric. The metal conductors and metal support pillars are formed using a photo-imagible polymer which serves the function of patterning and also provides a temporary support during construction.Type: GrantFiled: August 4, 1989Date of Patent: May 1, 1990Assignee: Microelectronics and Computer Technology CorporationInventor: Ian Y. K. Yee
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Patent number: 4909315Abstract: A high performance fluid heat exchanger for cooling an electronic component which includes a housing having a base heat transfer member, a plurality of parallel fins in the housing and center fed concentric inlet and outlet tubes connected to the housing opposite the base for supplying cooling fluid towards the base and to the ends of the fins.Type: GrantFiled: September 30, 1988Date of Patent: March 20, 1990Assignee: Microelectronics and Computer Technology CorporationInventors: Richard D. Nelson, Omkarnath R. Gupta, Dennis J. Herrell
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Patent number: 4904340Abstract: A process for laser-assisted liquid phase etching of copper conductors which includes the use of a solution of sulfuric acid and hydrogen peroxide in contact with an integrated circuit substrate and the provision of a laser beam to select substrate areas having copper conductors to be etched. Also disclosed is an apparatus for the laser-assisted etching.Type: GrantFiled: October 31, 1988Date of Patent: February 27, 1990Assignee: Microelectronics and Computer Technology CorporationInventors: Robert F. Miracky, Kantesh Doss, Bryan Seppala
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Patent number: 4899439Abstract: A high density electrical interconnect having a plurality of metallic conductors supported from metallic pillars which are electrically isolated from the ground plane by openings. The interconnect can be fabricated using a temporary support dielectric, which may be removed after completion to provide an air dielectric or be replaced with a more suitable permanent dielectric. The removal of the temporary support allows the conductors to be coated with protective layers or with a layer of a higher conductivity.Type: GrantFiled: June 15, 1989Date of Patent: February 13, 1990Assignee: Microelectronics and Computer Technology CorporationInventors: Curtis N. Potter, Lawrence N. Smith, Harry Kroger
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Patent number: 4890192Abstract: A thin film capacitor having a top, middle and bottom plate forming two capacitors in series in which the middle plate is a plurality of isolated plates thereby forming a structure of a plurality of two capacitors in series which are all connected in parallel. The capacitor may be integrated into an electronic substrate. The capacitor may be formed by depositing films of the metal conductors and dielectrics and may be formed as an integral part of a semiconductor chip or interconnect substrate.Type: GrantFiled: April 9, 1987Date of Patent: December 26, 1989Assignee: Microelectronics and Computer Technology CorporationInventor: Lawrence N. Smith
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Patent number: 4888665Abstract: A customizable circuit using a programmable interconnect and a compatible tape design for tape automated bonding of chips to the circuitry. The programmable interconnect comprises layers of wires, with one layer of wires forming overlap regions with the adjacent layer of wires. The wires can be selectively linked later to form the desired interconnect. The selective linkage represents the customization of an otherwise undedicated interconnect. The TAB chip bonding design uses a carrier tape to bond the integrated circuit chips to the programmable interconnect. Also disclosed is a method for forming the interconnect.Type: GrantFiled: February 19, 1988Date of Patent: December 19, 1989Assignee: Microelectronics and Computer Technology CorporationInventor: Lawrence N. Smith
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Patent number: 4886461Abstract: A zero insertion force electrical connector for electrically connecting two electrical members. A plurality of first electrical contacts on a first member engage a plurality of second electrical on a second member. An isostratic medium is retained against the second member and a pressure generator acts on the isostatic medium for providing a uniform force forcing the first and second contact into engagement. One of the first and second contacts may be positioned in recesses and the other of the first and second contacts are outwardly extending for providing self-alignment between the first and second members. The second member may be a three-layer tape having a first metal signal layer, a middle dielectric layer and a second ground layer for interconnection to a third electrical member.Type: GrantFiled: October 17, 1988Date of Patent: December 12, 1989Assignee: Microelectronics and Computer Technology CorporationInventor: Robert T. Smith
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Patent number: 4884630Abstract: A body having a bottom and first and second ends and a cavity therein. A plurality of substantially parallel spaced fins are positioned in the cavity. A liquid inlet is centrally positioned in the first end of the body and a liquid outlet is centrally positioned in the second end of the body where flowing cooling liquid between the fins from the first end to the second end with higher fluid flow between the fins in the center for preferentially cooling the center of the heat exchanger. A cross-sectional area of the liquid path in the body minimizes pressure drops and avoids abrupt direction changes and cross-sectional changes. The width, height and spacing of the fins may be varied to control the temperature of the areas in the bottom.Type: GrantFiled: July 14, 1988Date of Patent: December 5, 1989Assignee: Microelectronics and Computer Technology CorporationInventors: Richard D. Nelson, Omkarnath R. Gupta
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Patent number: 4882654Abstract: A fluid heat exchanger for mating with an electronic component is supported from a fixed support. A connection between the fixed support and the heat exchanger is initially flexible for adjusting the position of the heat exchanger to accommodate variations in the height or attitude of the electronic component for providing a good thermal interface. Thereafter, the connection changes to a rigid connection to provide good structural suppport for the heat exchanger which allows the support to withstand vibration or shock without overloading the electronic component. The flexibility of the connection may be reversible for later readjusting the position of the heat exchanger relative to the electronic component.Type: GrantFiled: December 22, 1988Date of Patent: November 21, 1989Assignee: Microelectronics and Computer Technology CorporationInventors: Richard D. Nelson, Omkarnath R. Gupta, Dennis J. Herrell
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Patent number: 4874493Abstract: A process for filling cavities in a flat surface on a substrate by metal deposition which includes depositing a film of metal onto the flat surface and cavities in a substantially perpendicular direction to the surface, and simultaneously re-sputtering and deposited film on the flat surface by ion beam milling at an angle to the surface of the substrate for achieving the deposition of metal into the cavities and filling the cavities without leaving any film on the flat surface.Type: GrantFiled: March 28, 1988Date of Patent: October 17, 1989Assignee: Microelectronics and Computer Technology CorporationInventor: Ju-Don T. Pan
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Patent number: 4871316Abstract: A high density, high performance and high fidelity connector system that can connect between electronic circuit planes having different wiring densities. The connector has a modular structure that avoids tolerance build-up for large (long) connections between two substrates, or between a substrate and a board. The connector design can accommodate differential temperature coefficients of expansion between the connector materials and the materials of the substrates being connected. The connector can be formed from low cost printed circuit board technology, or its equivalent, and can be configured to have controlled impedance, low crosstalk and wide bandwidth. The angle between surfaces being interconnected can vary from 0 to 360 degrees.Type: GrantFiled: October 17, 1988Date of Patent: October 3, 1989Assignee: Microelectronics and Computer Technology CorporationInventors: Dennis J. Herrell, Omkarnath R. Gupta
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Patent number: 4862588Abstract: A method of making a flexible interconnect for connection between stacks of electronic components. The method includes punching a plurality of holes through a flexible insulating material, plating copper studs into the holes extending out of at least one side and preferably both sides of the flexible material, and electrically interconnecting some of the plated studs by interconnects supported by the flexible material. The interconnects may be supported from the outside of the flexible material or embedded therein. Dummy studs may be provided in the flexible material extending to the outside and aligned with studs extending on the other side of the insulating material which are connected to the electrical interconnects.Type: GrantFiled: July 21, 1988Date of Patent: September 5, 1989Assignee: Microelectronics and Computer Technology CorporationInventor: Colin A. MacKay
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Patent number: 4860444Abstract: A package for enclosing, protecting and cooling semiconductor integrated circuit chips. The package includes a generally planar substrate with the chips positioned thereon. Signal connections are provided between at least some of the chips. A heat sink is positioned in contact with the chips and includes microchannels through which a cooling fluid flows for purposes of transferring heat generated by the chips to such fluid. Manifolds are provided to direct the fluid to and from the microchannels, and microcapillary slots may be formed on the heat sink surface adjacent the chips to receive liquid to generate attractive forces between the heat sink and chips to facilitate heat transfer. Circuitry is provided to distribute power through the package and to the chips.Type: GrantFiled: March 31, 1988Date of Patent: August 29, 1989Assignee: Microelectronics and Computer Technology CorporationInventors: Dennis J. Herrell, David A. Gibson
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Patent number: 4860088Abstract: A flexible beam lead tape having three layers having trace conductors, a dielectric and a ground plane. Vias extend through the dielectric layer at the first and second ends of the electrical conductors for providing versatile connections to either ends of the conductors. The ends of the conductors may be provided with electrical connections on either or both sides of the tape and may be connected by pressure contact or by bonding.Type: GrantFiled: September 14, 1987Date of Patent: August 22, 1989Assignee: Microelectronics and Computer Technology CorporationInventors: Robert T. Smith, Chang-Hwa Chung
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Patent number: 4859806Abstract: A discretionary interconnect which includes orthogonal arrays of conductors sandwiched between conductive planes and accessible through a number of selectively arranged vias for interconnection and interruption. Also disclosed is a process of personalizing an interconnect of this type by selectively connecting and disconnecting the conductors.Type: GrantFiled: May 17, 1988Date of Patent: August 22, 1989Assignee: Microelectronics and Computer Technology CorporationInventor: Robert T. Smith
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Patent number: 4852250Abstract: Forming a body of insulating material with a shelf and an opening therethrough with a plurality of electrical conductors extending from the shelf to the exterior of the body. A plurality of tape automated bounding leads are placed in the opening in which the inner ends of the leads are connected together. The outer ends of the leads are aligned with the electrical conductors and bonded thereto and the inner ends of the leads are disconnected from each other. An electronic component is bonded to a bottom cover, aligned in the opening, and the inner ends of the leads are bonded to the electrical component. The bottom and a top cover are sealably connected to the body enclosing the opening and the electronic component.Type: GrantFiled: January 19, 1988Date of Patent: August 1, 1989Assignee: Microelectronics and Computer Technology CorporationInventor: Daniel M. Andrews