Patents Assigned to Microelectronics and Computer Technology Corporation
  • Patent number: 4845335
    Abstract: A method and apparatus of bonding two electrical members together uses a pulsed YAG laser. Various apparatus and methods may be used to hold the electrical members in contact under pressure to insure uniform bonding. Automation production equipment provides for the automatic bonding of the flat electrical leads of a TAB tape to the flat electrical bumps on a plurality of integrated circuit dies.
    Type: Grant
    Filed: January 28, 1988
    Date of Patent: July 4, 1989
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Daniel M. Andrews, Philip J. Spletter, Richard L. Simmons
  • Patent number: 4833766
    Abstract: A plurality of thin flat parallel positioned thermal conductive fins adapted to be connected to an object and a gas passageway passing between adjacent fins and extending between the top of the fins and opposite sides. Gas guides are positioned between adjacent fins at the center of the plurality of fins and redirect the outlet end of the passageways normal to the inlet ends of the passageways. Alternately positioned fins face in opposing directions. The fins may be integrally formed or individually formed. A thermal conductive base may be provided at the bottom of the plurality of fins for connection to an electronic package.
    Type: Grant
    Filed: July 21, 1988
    Date of Patent: May 30, 1989
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Dennis J. Herrell, Omkarnath R. Gupta, Claude Hilbert
  • Patent number: 4829243
    Abstract: An electron beam testing apparatus for applying an electron beam to parts of an electronic component and measuring the secondary electrons released from the part including a secondary electron collector having a plurality of vertically extending screens with a detector positioned adjacent one of the screens. A different voltage is applied to each of the screens of the collector for collecting the secondary electrons over a large area. The apparatus may include a combination blanking and Faraday cup for metering the electron beam current when it is blanked. The apparatus may also be used to measure net work capacitance by measuring the time required to charge a network to a predetermined voltage.
    Type: Grant
    Filed: February 19, 1988
    Date of Patent: May 9, 1989
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Ollie C. Woodard, Sr., Andrew W. Ross
  • Patent number: 4829242
    Abstract: A multigigahertz probe for testing electrical micro connections or wafers. A body has a top, bottom and a testing tip at one end, and the one end slants upwardly and inwardly from the bottom towards the top. At least one coaxial cable is carried by the body and includes a first connector end and a second testing end forming testing contacts. The testing end extends to the intersection of the bottom and the slanting one end of the body.
    Type: Grant
    Filed: December 7, 1987
    Date of Patent: May 9, 1989
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: David H. Carey, Roger B. Jennings
  • Patent number: 4821389
    Abstract: A pin fin heat exchanger is made by wrapping a thermally conductive wire having a coating thereon around a mandrel thereby forming a multilayer coil. The coating is fused together for holding the wires together. The method includes cutting a section out of the coil providing a plurality of generally parallel wires having first and second ends and placing the cut section between an object and a wall for transferring heat therebetween with the first ends engaging the object and the second ends engaging the wall. Thereafter the coating is removed from the wires such as by solvents. The ends of the wires may be soldered or may be lapped to provide a convex surface to provide good heat transfer.
    Type: Grant
    Filed: December 1, 1987
    Date of Patent: April 18, 1989
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Richard D. Nelson
  • Patent number: 4810332
    Abstract: A method of making an electrical multilayer copper interconnect in which the electrical lines are protected by an electroplated overcoat. A plating interconnect is deposited on a substrate, a sacrificial layer of dielectric material is deposited on the plating interconnect. Thereafter a plating mask is formed on the dielectric material. Two self-aligned plating masks are patterned in one step, one of which is a plating mask for copper plating and the other is a plating mask for the overcoat. Preferably, before electroplating the overcoat, the copper is etched for exposing the sides adjacent the dielectric layer for allowing overcoating all of the copper.
    Type: Grant
    Filed: July 21, 1988
    Date of Patent: March 7, 1989
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Ju-Don T. Pan
  • Patent number: 4794021
    Abstract: Applying a photoresist layer containing a solvent to the top of an electronic wafer by spin coating. Before the layer dries the wafer is heated in an oven while controlling the solvent loss from the coating by maintaining the pressure of the solvent vapor and providing a slow solvent loss for planarizing the top surface of the polymer. The device is removed from the first oven and the bake cycle is completed in a standard convection bake oven.
    Type: Grant
    Filed: November 13, 1986
    Date of Patent: December 27, 1988
    Assignee: Microelectronics And Computer Technology Corporation
    Inventor: Curtis N. Potter
  • Patent number: 4777560
    Abstract: A plurality of thin flat parallel positioned thermal conductive fins adapted to be connected to an object and a gas passageway passing between adjacent fins and extending between the top of the fins and opposite sides. Gas guides are positioned between adjacent fins at the center of the plurality of fins and redirect the outlet end of the pasageways normal to the inlet ends of the passageways. Alternately positioned fins face in opposing directions. The fins may be integrally formed or individually formed. A thermal conductive base may be provided at the bottom of the plurality of fins for connection to an electronic package.
    Type: Grant
    Filed: September 2, 1987
    Date of Patent: October 11, 1988
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Dennis J. Herrell, Omkarnath R. Gupta, Claude Hilbert
  • Patent number: 4776509
    Abstract: A single point bonding apparatus and method for bonding one electrical conductor to a second electrical conductor by a thermosonic process using force, time, temperature and ultrasonic energy as the key parameters in forming the bonds. A bonding tool has a tip with a multiple of nonparallel surfaces extending from the end of the tip for maximizing the amount of ultrasonic energy coupled to the electrical conductors. The surfaces may be recessed into the end of the tip or protrude outwardly from the end of the tip for coupling ultrasonic energy in directions both parallel and perpendicular to the conductors.
    Type: Grant
    Filed: May 19, 1987
    Date of Patent: October 11, 1988
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Gregory E. Pitts, David E. Boone, Daniel M. Andrews
  • Patent number: 4758926
    Abstract: A package for enclosing, protecting and cooling semiconductor integrated circuit chips. The package includes a generally planar substrate with the chips positioned thereon. Signal connections are provided between at least some of the chips. A heat sink is positioned in contact with the chips and includes microchannels through which a cooling fluid flows for purposes of transferring heat generated by the chips to such fluid. Manifolds are provided to direct the fluid to and from the microchannels, and microcapillary slots may be formed on the heat sink surface adjacent the chips to receive liquid to generate attractive forces between the heat sink and chips to facilitate heat transfer. Circuitry is provided to distribute power through the package and to the chips.
    Type: Grant
    Filed: March 31, 1986
    Date of Patent: July 19, 1988
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Dennis J. Herrell, David A. Gibson
  • Patent number: 4754900
    Abstract: A controlled volume of a liquid metal is dispensed from a ceramic capillary tube. A wetted film of the liquid metal is applied to the tip of the tube and the liquid metal is inserted into the interior of the tube. The tube contacts a receiving surface with the wetted film and ultrasonic energy is applied to the tube to dispense a small control volume with extreme precision.
    Type: Grant
    Filed: October 23, 1987
    Date of Patent: July 5, 1988
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Colin A. MacKay
  • Patent number: 4689505
    Abstract: A bootstrapped CMOS driver circuit capable of driving large capacitance loads with small internal delays. Higher driving capability is achieved by using only n-channel transistors at the output and overdriving the transistors during the transitions. A total internal delay of less than one nanosecond for a driver may be provided with 100 ohms compatible output impedance.
    Type: Grant
    Filed: November 13, 1986
    Date of Patent: August 25, 1987
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Uttam S. Ghoshal
  • Patent number: 4681655
    Abstract: A method of fabricating an anodic aluminum support system having an air bridge for metallic conductors. The method includes providing two or more metal layers separated by a coating of aluminum creating a multiple layer electrical interconnect system. The method includes the step of anodizing the aluminum and applying a photoresist mask to spaced portions of the top of the system. Thereafter, an etching solution is applied to the top of the system for removing the anodized aluminum, except for the portions covered by the mask, thereby providing a multilayer conductor system supported by pillars of anodic aluminum surrounded by low dielectric air.
    Type: Grant
    Filed: November 24, 1986
    Date of Patent: July 21, 1987
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Curtis N. Potter
  • Patent number: 4681666
    Abstract: A planarization method of fabricating a layer of metal conductors embedded in a dielectric level. A coating of aluminum is anodized from the top but leaving a thickness of unanodized aluminum on the bottom. The top is masked and etched to provide a predetermined bare area which is etched out down to the unanodized aluminum. A metal is plated to the unanodized aluminum equal to the thickness of the unexposed anodic aluminum. The mask is removed and the unanodized aluminum is anodized. Therefore, the layer of metal and the dielectric anodic aluminum are planarized. Another anodizable metal may be used as an undercoat layer for completing the anodizing of the aluminum.
    Type: Grant
    Filed: November 13, 1986
    Date of Patent: July 21, 1987
    Assignee: Microelectronics and Computer Technology Corporation
    Inventors: Curtis N. Potter, Harry Kroger