Abstract: A content addressable memory (CAM) device (200) can include a control block (202) having a dummy control circuit (216). A dummy control circuit (216) can initiate dummy searches (or other operations) prior to and/or during actual searches to reduce overall supply current transients. Methods for initiating dummy searches are also disclosed.

Abstract: In a computer system, a descriptive memory allocation system is described having a memory policy allocation module for setting memory allocation policies by an operating system in response to descriptive resource use requirements provided by an application requesting access to a specified address range in memory. The descriptive memory allocation system includes a descriptive resource allocator that uses descriptive memory use advice provided by an application to decide how to allocate memory to the application. The descriptive resource allocator includes memory allocation policies that may be set by the operating system after the operating system has determined the appropriate allocation scheme to implement based on an allocation advice provided by a requesting after the application. The application in providing its descriptive memory use information does not specify a specific allocation policy the operating system should use to allocate memory to it.

Abstract: In incremental garbage collectors based on the Train algorithm a futile condition may exist where the collector never finishes collecting an old train. The present invention provides an expanded collection set of a younger car with an object referenced from another train. That reference will be found by scanning the remembered sets of other car. If no such younger car is found, then a younger car with an external reference may be added to the collection set. One of these other cars is added to the collection set and, if there are no other changes, the collection will reduce the volume in the train being collected and therefore break the futile situation.

Abstract: A processing pipeline and method are disclosed that may enable real time video rate displacement mapping. The pipeline may include one or more: render units, texture units, memories, and displacement units. Render units may tessellate a geometric primitive into micropolygons and interpolate parameter values for each new vertex. The micropolygons may be defined by the intersection of the geometric primitive and boundaries projected from specified screen space regions. Texture units retrieve displacement values from a displacement map stored in memory. Displacement units displace each vertex of a micropolygon in the direction of the normal at each vertex by a distance based on the displacement value determined for the vertex location. Micropolygons that are displaced across a projected boundary may be returned to the render units and re-tessellated according to the projected boundaries. Parameter values for new vertices may be determined subject to an edge contract to prevent surface cracks.

Abstract: A method and apparatus for managing network access to internal hosts protected by a firewall is provided. A user on an external host logs in into a firewall. Once the user has been authenticated to the firewall, a session is established for the user, and tunnel configuration is transmitted to the user's process on the external host. The tunnel configuration data indicates the configuration of at least one tunnel for connecting to at least one internal host protected by the firewall. When creating a socket for connecting to the internal host, the socket is configured based on the tunnel configuration data. Tunnel objects and tunnel socket objects may be specially configured to establish a connection in a way that takes advantage of the power and simplicity of the inheritance feature of object oriented software. Various tunnel classes are provided to configure tunnels in a variety of mariners.

Abstract: The data type of requested data stored in a column of a database table is determined and the data accessed in the data type in which the data is stored. The data type can then be converted to a second data type before outputting the data.

Abstract: A registration and authentication scheme that may be used in conjunction with a computer-based system for monitoring other computer systems is disclosed. A monitored relay transmits a unique identifier to a server in the monitoring system. The server generates a random number pair, ensures the random number pair is unique, and associates the unique relay identifier with the random number pair to form an unbound key, which is registered in a database associated with the server. The unbound key is encrypted and made available to the relay. Subsequently, when the relay is instantiated it transmits the contents of the unbound key file to the monitoring system. The monitoring system decrypts the unbound key file and searches associated databases to determine whether the relay is registered and authenticates the relay.

Abstract: A method for handling different versions of a document in a computer system comprising a storage medium includes storing each of the different versions in its entirety in a file on the storage medium.

Abstract: An enhanced VPD structure includes a type field to indicate whether a particular property is a general property to be associated with an interface card or other computer system component, or a device- or function-specific property to be associated with one or more devices or functions. The enhanced VPD structure also includes fields for identifying the device(s) and/or function(s) to which a device- or function-specific property applies, along with the value of the property, a data type and length of the property, and a meaningful name of the property. The enhanced VPD structure may be accessed during system boot, during hot-swapping of an interface card or other component, or at other times.

Abstract: A special bus master, called a configuration host, “walks” a bus system to discover the bus topology and bus bridges that form that topology. Once the bridges have been located, the configuration host assigns a bridge ID to each bridge and enters information into internal bridge registers that control the flow of information between bus segments. The configuration host also populates an address bitmap in each bridge in order to complete the bus system configuration. In one embodiment, the bus topology is a tree configuration and the configuration host performs a recursive procedure that configures each branch of the tree. During this configuration process the internal bridge registers and address bitmap in each bridge are populated.

Abstract: One embodiment of the present invention provides a system that measures alignment between a first semiconductor die and a second semiconductor die. The system operates by applying a pattern of voltage signals to a two-dimensional array of conductive transmitter elements that form a transmitter array on the first semiconductor die. This transmitter array is positioned over a corresponding two-dimensional array of conductive receiver elements that form a receiver array on the second semiconductor die, whereby a voltage signal applied to a transmitter element induces a voltage signal in one or more receiver elements. The system amplifies voltage signals induced in receiver elements in the receiver array, and subsequently analyzes the amplified signals to determine an alignment between the first semiconductor die and the second semiconductor die.

Abstract: Techniques for implementing virtual machine instructions suitable for execution in virtual machines are disclosed. The inventive virtual machine instructions can effectively represent the complete set of operations performed by the conventional Java Bytecode instruction set. Moreover, the operations performed by conventional instructions can be performed by relatively fewer inventive virtual machine instructions. Thus, a more elegant, yet robust, virtual machine instruction set can be implemented. This, in turn, allows implementation of relatively simpler interpreters as well as allowing alternative uses of the limited 256 (28) Bytecode representation (e.g., a macro representing a set of commands). As a result, the performance of virtual machines, especially, those operating in systems with limited resources, can be improved by using the inventive virtual machine instructions.

Abstract: A system for creating and editing checks for a knowledge automation engine to use in detecting product issues on products. A knowledge automation engine may evaluate a check against a fact to detect a product issue on a product and provide a client of the product remediation information. A check may contain a product issue description, a rule to evaluate against a fact in order to detect the product issue, and remediation information to help a client address the product issue if the product issue is detected on the product. Product issues may include product installation validation and known product bugs. Facts used by the knowledge automation engine may include product configuration facts. Statistics on check execution results may be accumulated to provide additional information on products through their life cycle.

Abstract: A high density memory is disclosed wherein multiple memory cells are placed in a single cell region. To accommodate the multiple memory cells, multiple bit lines are provided. Also provided is a multiplexer circuit that is coupled to the multiple bit lines. When the memory cells in a region are activated by a common word line, they put their stored data bits onto the multiple bit lines. The multiplexer circuit then selects one of the bit lines, and provides the data bit on that bit line to a latch. In one implementation, the multiplexer circuit comprises a plurality of bit line circuits, and each bit line circuit comprises a precharge circuit, a precharge control circuit, a data sensing circuit, and a sensing control circuit. These components of the bit line circuits help to ensure that the memory operates effectively and without data corruption.

Abstract: A method for storing a data set having an enabled probe identification component and an associated data component in a buffer, including storing the data set at a current offset if the buffer has sufficient space to store the data set between a current offset and a limit of the buffer and the buffer is not marked as wrapped, marking the buffer as wrapped, setting the current offset to zero and setting a wrapped offset to zero, if the buffer does not have sufficient space to store the data set between a current offset and a limit of the buffer, and incrementing the wrapped offset by a stored data set size until there is sufficient space between the current offset and the wrapped offset to store the data set if the buffer is marked as wrapped, wherein the stored data set size is determined using an enabled probe identification associated with the stored data set.

Abstract: A system and a method for improving magnified texture-mapped pixel performance in a single-pixel pipeline. A plurality of textured pixel addresses corresponding to a plurality of pixels may be generated. A FIFO or other memory unit may be used to linearly order the plurality of textured pixel addresses. Two consecutive textured pixel addresses out of the plurality of textured pixel addresses may be examined if they map to a common set of texels in texture space. The two consecutive textured pixel addresses may be merged together and propagated down the pipeline if they map to the common set of texels. However, only a first of the two consecutive textured pixel addresses may be propagated down the pipeline if the two consecutive textured pixel addresses do not map to a common set of texels. Texel data may be generated in response to receiving either the combined texel structure or the first of the two textured pixel addresses.

Abstract: A composite add/drop multiplexor architecture is disclosed that facilitates the loop-back of a signal in a composite add/drop multiplexor (e.g., a SONET/SDH node, a dense wavelength division multiplexed node, etc.) that uses automatic protection switching.

Abstract: A system and method for application-transparent synchronization with a persistent data store. In one embodiment, the system may include a persistent data store configured to store a plurality of data items, such as a relational database, for example. The system may further include an application configured to modify a local data subset including a local copy of a given data item. The local data subset may be a disconnected rowset object, for example. Additionally, the system may include a first synchronization provider configured to synchronize the modified local data subset with the persistent data store, where synchronization of a given modified local copy with a corresponding data item occurs transparently to the application.

Abstract: A system and method of validating an application includes receiving the application and determining a set of accessed classes that are accessed by the application. The set of accessed classes are compared to a set of authorized classes to determine if one or more unauthorized classes are included in the set of accessed classes. And, validating only the applications that do not access unauthorized classes.

Abstract: Method and apparatus for transmitting messages between communication devices via a communication channel allowing at least voice messages to be transmitted, the messages including data subdivided in a sequence of basic data units, the method including: a) encoding the basic data units as unique signals (usj) including a predetermined number of basic signals (bi), each basic signal having a unique fixed frequency (fi); b) transmitting a sequence of unique signals (usj) during a sequence of fixed time periods (t1, t2, t3, . . . ); c) receiving and decoding the sequence of unique signals (usj) into the sequence of basic data units; the data being transmitted in superposition over voice.