Patents Assigned to Microsystems, Inc.
  • Patent number: 7016907
    Abstract: Role is a comprehensive grouping mechanism used in a directory server. In a client-server directory system, roles transfer some of the complexity to the directory server. A role is defined by its role definition entry. Assigning entries to roles enables applications to locate the roles of a target entry, rather than select a group and browse the members list. By changing a role definition, a user can change an entire organization with ease. Any client with appropriate access privileges can discover, identify and examine any role definition. An enumerated role is one that contains a list of target entries as members. By simply searching for the membership of the enumerated role, a client application will obtain a list of all members that possess that enumerated role.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: David Boreham, Peter Rowley, Mark C. Smith
  • Patent number: 7017145
    Abstract: Provided is a method, system, program, and data structures for generating a user interface. An application program processes data and generates application output and a user interface module processes the application output to generate output data to render on an output device. The user interface module generates output data to render on the output device in response to processing statements in the user interface module. The user interface module reaches a processing point where the user interface module does not include statements to generate output data. After reaching the processing point, the user interface module receives an interaction object from the application program specifying data to generate as output data. The user interface module then generates output data to render on the output device from the interaction object.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun MIcrosystems, Inc.
    Inventor: Julian S. Taylor
  • Patent number: 7017089
    Abstract: According to one embodiment of the present invention, the CAM device includes a CAM array that includes a plurality of rows of CAM cells each coupled to a match line, a priority encoder coupled to the match lines to generate an index, a counter and compare logic coupled to the counter and the priority encoder to compare the index and a counter value from the counter.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: March 21, 2006
    Assignee: NetLogic Microsystems, Inc
    Inventor: Charles C. Huse
  • Patent number: 7017086
    Abstract: A technique for adjusting a communication system involves a plurality of links where each link includes a data line adapted to transmit a data signal and a clock line adapted to transmit a clock signal. A test circuit connects to the plurality of links where the test circuit tests at least one of the plurality of links. The test circuit includes an adjustment circuit arranged to generate an adjustable clock signal from the clock signal of the one of the plurality of links based on an offset where the adjustment circuit adjusts a timing of the adjustable clock signal relative to the data signal of the one of the plurality of links. The test circuit is adapted to perform a round-robin testing of the plurality of the links.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Aninda K. Roy, Claude R. Gauthier, Brian W. Amick
  • Patent number: 7016966
    Abstract: Embodiments of a mechanism for providing results gates to clients in the distributed computing environment to be used by the clients to access results generated by services on behalf of the clients. A client generates a request message for a service. The request message is generated by a client method gate. The service then generates results in response to the message. A results gate is generated for accessing the results. A gate on the client generates the results gate. The results are then accessed through the results gate. The results are structured as an object (e.g. Java object), and the results gate an object proxy for the results object. The results gate is returned to the process as results of the method call made by the process. In one embodiment, the results gate is a method gate and provides a method interface to the results.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Thomas E. Saulpaugh, Gregory L. Slaughter, Bernard A. Traversat, Mohamed M. Abdelaziz
  • Patent number: 7016953
    Abstract: An apparatus for monitoring data flow in a web application includes a data collector which collects data about transactions on a server that hosts components of the web application. The transactions on the server are initiated through an HTTP request from a client. The apparatus further includes a graphical display which displays the collected data.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Ana H. von Klopp Lemon
  • Patent number: 7017107
    Abstract: A storage system comprises a storage array controller and a storage array, which includes multiple disk drives and disk drive controllers. The storage array controller issues scrubbing operation commands to one or more of the disk drive controllers. In response, each disk drive controller that receives a scrubbing operation command reads data from within a data range from at least one of the disk drives, calculates a new checksum for the data, and compares the new checksum to a preexisting checksum for the data. If the new checksum doesn't equal the preexisting checksum, the data within the data range is determined to be erroneous.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Nisha D. Talagala, Randall D. Rettberg, Chia Y. Wu
  • Patent number: 7013458
    Abstract: One embodiment of the present invention provides a system for associating metadata attributes with program elements. During operation, the system receives source code containing syntactic elements that specify metadata attributes for program elements, wherein the metadata attributes do not affect program execution. The system then parses the source code to obtain the metadata attributes. Next, the system associates the metadata attributes with corresponding program elements and determines values associated with the metadata attributes. Finally, the system incorporates the metadata attributes, including identifiers for the associated values and the associated program elements, into object code for the program, thereby allowing the metadata attributes to be accessed from the object code. Another embodiment of the present invention provides a system for accessing metadata attributes for program elements from object code through an application programming interface (API).
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Joshua J. Bloch, Graham Hamilton
  • Patent number: 7013352
    Abstract: An information processing module in the form of a blade server can communicate information signals with other modules of a modular computer system such as a high density server system under a selectable information protocol (for example Ethernet or Infiniband). The information processing module can include one or more information connections for communicating information signals. One ore more serializer/deserializers can be connected between the module processor(s) and the information connection(s). A selectable information protocol interface can be interconnected between the processors and the serializer/deserializer. A plurality of different information protocols can be used and be selectively connectable between the module processor(s) and the serializer/deserializer(s) using one or more multiplexer/demultiplexers.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Paul J Garnett
  • Patent number: 7013403
    Abstract: A graphic system may include a pixel synthesizing device that uses two or more phase-locked loops (PLL's) in tandem in order to achieve a better M/N ratio. The two PLL's connected in tandem have an effective M/N ratio of (M1*M2)/(N1*N2). The pixel synthesizing device is operable to synthesize free-running (non-genlocked, or sync-master) pixel clock frequencies using a much greater variety of M and N. As a result, greater precision in specification of the pixel clock frequency is achieved, yielding greater precision in a frame rate of a particular video format. As a result, the allowable channel spacing is greatly increased, and the graphic system can select from a wide range of ultradense spaced pixel clocks.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Nathaniel David Naegle
  • Patent number: 7013362
    Abstract: An addressing circuit includes a first set of inputs configured to receive a first set of address signals en route from the set of processors to the memory and defining a least significant address portion. The addressing circuit further includes a second set of inputs configured to intercept a second set of address signals en route from the set of processors to the memory and defining a most significant address portion. The addressing circuit also includes control circuitry configured to output a replacement set of address signals to the memory in place of the second set of address signals. The replacement set of address signals defines either the most significant address portion defined by the second set of address signals when the least significant address portion is outside a predetermined range, or a predefined most significant address portion when the least significant address portion is within the predetermined range.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Joseph James Ervin
  • Patent number: 7012459
    Abstract: One embodiment of the present invention provides a system that regulates heat within an asynchronous circuit. During operation, the system monitors a temperature within the asynchronous circuit. If the temperature exceeds a threshold value, the system introduces a delay into the asynchronous circuit that causes signals to propagate more slowly through the asynchronous circuit. This causes circuit elements within the asynchronous circuit to switch less frequently and consequently causes the circuit elements to generate less heat.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Ivan E. Sutherland
  • Patent number: 7013377
    Abstract: A method and apparatus provides the capability for a single function to safely use multiple register windows within the same function, with minimal additional support from the operating system, by specifying a new window pointer, the “Effective Current Window Pointer” (ECWP), to be used in conjunction with the prior art window pointer. According to the present invention, the new window pointer ECWP can be used to override the prior art window pointer in dictating from which register window the operands stipulated by the instructions to be executed are sourced/sinked. Consequently, using the method and apparatus of the invention, the number of spills to memory is reduced, the number of instructions required is decreased, resources are used more efficiently, and costly dependency problems and RAW (read-after-write) stalls are prevented.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Lawrence A. Spracklen, Stevan Vlaovic, Steven R. Hart
  • Patent number: 7013321
    Abstract: According to the invention, a processing core that executes a parallel multiply accumulate operation is disclosed. Included in the processing core are a first, second and third input operand registers; a number of functional blocks; and, an output operand register. The first, second and third input operand registers respectively include a number of first input operands, a number of second input operands and a number of third input operands. Each of the number of functional blocks performs a multiply accumulate operation. The output operand register includes a number of output operands. Each of the number of output operands is related to one of the number of first input operands, one of the number of second input operands and one of the number of third input operands.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Ashley Saulsbury
  • Patent number: 7013254
    Abstract: A low-complexity, high accuracy model of a CPU power distribution system has been developed. The model includes models of multiple power converters that input to a board model. The board model then inputs to a package model. Finally, the package model inputs to a chip model. The model provides a high degree of accuracy with an acceptable simulation time.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude R. Gauthier, Brian W. Amick
  • Patent number: 7012815
    Abstract: A rack mountable shelf is configured to support a plurality of field replaceable units in the form of server cartridges that each include at least one server processor. The rack mountable shelf is configured to provide communal services for said server cartridges, including at least one of supplying DC operating power to the server cartridges, distributing information signals between the server cartridges and processing system management signals for the server cartridges. Each of the server cartridges can be slideably received in a respective one of a series of server cartridge receiving locations arrayed side by side along the front of the shelf. The server cartridges can be configured as thin blades to provide a high server density. For example, 16 server cartridge receiving locations can be provided across the front of the shelf. The supply of DC operating power to the server cartridges can be provided by one or more field replaceable power supply units (e.g.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul J. Garnett, James E. King, Martin P. Mayhead, Peter Heffernan, Nigel Ritson
  • Patent number: 7012612
    Abstract: A mechanism is provided that identifies certain classes of images that are likely to be re-used, and utilizes this information to manage a cache better. This may include flushing certain classes of images that are less likely to be re-used before flushing the classes that are more likely to be reused. In addition, or alternatively, other factors regarding the image may be utilized to determine whether or not caching of the image should occur.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Thomas G. O'Neill, Jordan M. Slott
  • Patent number: 7013454
    Abstract: By encoding an exception triggering value in storage referenced by an instruction in an otherwise unused slot (e.g., the delay slot of a delayed control transfer instruction or an unused instruction position in a VLIW-based architecture) coinciding with a safe point, an efficient coordination mechanism can be provided for multi-threaded code. Because the mechanism(s) impose negligible overhead when not employed and can be engaged in response to an event (e.g., a start garbage collection event), safe points can be defined at call, return and/or backward branch points throughout mutator code to reduce the latency between the event and suspension of all threads. Though particularly advantageous for thread suspension to perform garbage collection at safe points, the techniques described herein are more generally applicable to program suspension at coordination points coinciding with calls, returns, branches or calls, returns and branches therein.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: William Bush, Mario Wolczko, Marc Tremblay
  • Patent number: 7013303
    Abstract: A system and method for adapters to provide nodes of a network access to a distributed search mechanism. Network nodes operating as consumer or requesting nodes generate search requests. Nodes operating as hubs are configured to route messages in the network. Individual nodes operating as provider nodes receive search requests and may generate results according to their own procedures in return. Hub nodes may resolve the search requests to a subset of the provider nodes in the network, for example by matching search requests with registration information from nodes. Communication between nodes in the network may use a common query protocol. Adapters may be implemented in the network to reformat messages exchanged in the network. Adapters may customize results. Adapters may enable nodes to function in a distributed search mechanism.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Yaroslav Faybishenko, Gene H. Kan, Thomas J. Camarda, David M. Doolin, Steve Waterhouse, John Beatty
  • Patent number: 7013408
    Abstract: A method and system for automating the creation of a managed data storage system. Specifically the present invention describes an automated method for building, evaluating and repairing a managed set of disk storage devices utilizing a rule based expert system operating on a host computer. The system allocates available disks and controllers according to a predetermined size requirement and a set of rules. The set of rules designates a layout that provides optimum performance. The system also evaluates the layout by utilizing a set of rules to test reliability and comparative analysis to test performance. The system performs self-repairs in the event of a component failure and generates a notification of the failure and an analysis of the degradation of the system resulting from the failure so replacement components might be obtained.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: March 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Henry H. Knapp, III