Abstract: An input section of an RF interface is shown in conjunction with a tuner circuit. The input, in one embodiment, is constructed using co-planner wave guide techniques and serves to provide low return loss, low insertion loss, high voltage protection, all within a single housing without causing RF interference problems.

Abstract: A method for extending the linear range of operation of an amplifier includes monitoring a transistor voltage of a transistor of an amplifier. The transistor is coupled to a variable current source applying a bias current to the transistor. The method continues by monitoring an output voltage of the amplifier and by determining whether the transistor voltage is within a predetermined range of the output voltage. If the transistor voltage is not within a predetermined range of the output voltage, the method continues by decreasing the bias current applied to the transistor. If the transistor voltage is within a predetermined range of the output voltage and if the bias current has not previously been decreased, the method continues by increasing the bias current applied to the transistor.

Abstract: Disclosed are systems and methods which provide very linear amplification of signals using a linearized transconductance circuit. A transconductance amplifier configuration is shown which provides highly linearized operation utilizing a Darlington pair feedback circuit. Also shown are gain control configurations in which current steering circuitry is adapted to operate in its most linear region.

Abstract: An input section of an RF interface is shown in conjunction with a tuner circuit. The input, in one embodiment, is constructed using co-planner wave guide techniques and serves to provide low return loss, low insertion loss, high voltage protection, all within a single housing without causing RF interference problems.

Abstract: A multiple information decoding system and method are provided in which multiple information content is decoded sequentially and provided to a viewer such that the viewer perceives the information content as being simultaneously decoded. One embodiment of the system and method is in a video display system where RF channels are decoded by a single tuner for concurrent presentation to a display.

Abstract: A method for processing an input signal is disclosed. The method includes receiving an input signal. The method also includes applying a first transfer function to the input signal to produce a first signal, wherein the first transfer function exhibits a high pass characteristic. The method further includes applying a second transfer function to the input signal to produce a second signal, the second transfer function exhibiting a low pass characteristic.

Abstract: A variable gain low noise amplifier is disclosed that offers flat gain versus frequency throughout the entire cable and broadcast television signal spectrum. The circuit uses multiple stages and buffering techniques to cancel the primary source of high frequency gain degradation. The invention also uses variable capacitor networks which track with gain control to control peaking within the circuit so as to have consistent gain control with frequency and gain. A further aspect of the invention is in the use of capacitors within the circuit to act as simple band-pass filters to roll off segments of the spectrum away from the channel of interest, thus reducing system-level distortion in a receiver.

Abstract: Systems and methods for reducing the effects of imbalance between input signals in a gain controlled differential amplifier are shown. Distortion in the amplifier is reduced by modulating the gain control input based upon detected differences between the signal levels of the differential input signal source.

Abstract: The present invention is directed to a system and method of reducing frequency interference in a circuit when the harmonics of at least two frequencies could cause interference when such harmonics interact with each other. In one embodiment, a determination is made as to which harmonic could possibly support such interference, and based upon the determined harmonic, determining which combination within said determined harmonic is likely to cause the interference.

Abstract: A circuit for establishing the input impedance of an amplifier includes an amplifier, a circuit component, a first feedback resistor, and a second feedback resistor. The amplifier has an input impedance and is coupled to a load having a load impedance. The circuit component is coupled to the load and shares at least a portion of a bias current with the amplifier. The first feedback resistor is coupled the amplifier and the load, and has a first impedance. The second feedback resistor is coupled to the amplifier and has a second impedance. The input impedance of the amplifier is established based at least in part upon the first impedance and the second impedance.

Abstract: A dual mode tuner/receiver is disclosed in which both analog and digital signals can be received and processed. A low pass filter allows all channels below a selected frequency enter the circuit. A precisely controlled dual conversion circuit creates an intermediate frequency (IF) signal. An automatic carrier detection circuit monitors the IF signal and determines whether the signal is of analog or digital format and intermediate frequency filters are adjusted based upon the type of signal detected. A coherent oscillator circuit generates in-phase and quadrature reference signals that are used by video and audio detectors for further processing of the IF signal. In-phase and quadrature outputs are provided for digital signals and composite video and audio outputs are provided for analog signals.

Abstract: A system and method for a single conversion tuner which generally uses phase shifted in-phase and quadrature-phase signal paths as an image rejection circuit. Through the use of broadband input LNA and mixer circuits, substantially the entire input signal bandwidth may be processed in the tuner. The broadband input LNA may pass the signal through to the mixers, which may split the signal into in-phase and quadrature terms. Then the in-phase term may be shifted by plus 45 degrees and the quadrature may be shifted by minus 45 degrees. When the terms are subsequently summed together, the desired signal components add together, while the undesired image components subtract from each other. In this way the image signal is suppressed, thus generally eliminating the need for a notch filter. A phase error correction feedback loop may be implemented to compensate for errors between the separate circuit paths.

Abstract: A filter circuit includes a polyphase filter coupled to a first circuit component and a second circuit component. The first circuit component propagates four input current signals to the polyphase filter. The third and fourth input current signals are substantially one-hundred-eighty degrees out of phase with the first and second input current signals. The polyphase filter receives the input current signals and generates four output current signals that are out of phase with each other. The second circuit component generates first and second output signals using the four output current signals. The first and second output signals are ninety degrees out of phase with each other.

Abstract: A circuit for establishing a bias current includes a mixer, an amplifier, a bias resistor, a comparator, and a drive circuit. The mixer receives a drive voltage and at least a portion of a bias current. The amplifier is coupled to the mixer and receives at least a portion of the bias current. A bias resistor is coupled to the amplifier at a node and a bias voltage exists at the node. The comparator is coupled to the node and compares the bias voltage with a reference voltage. The comparator further generates an output signal based at least in part upon the comparison. The drive circuit generates the drive voltage in response to the output signal such that the bias voltage substantially equals the reference voltage thereby establishing the bias current.

Abstract: Disclosed are systems and methods which provide very linear amplification of signals using a linearized transconductance circuit. A transconductance amplifier configuration is shown which provides highly linearized operation utilizing a Darlington pair feedback circuit. Also shown are gain control configurations in which current steering circuitry is adapted to operate in its most linear region.

Abstract: A system and method for a mixer circuit places the RF and mixer core LO transistors on the same level in anti-series. The mixer circuit provides increased headroom, excellent linearity, controllable conversion-gain, and operates with a reduced supply voltage requirement.

Abstract: The present invention is directed to a system and method which utilizes a fixed base current to control the output voltage instead of a variable base current. In one embodiment, instead of modulating the base current, the converter uses output current to determine the voltage produced at the output. By sinking current out of the DC-to-DC converter, a high output impedance is achieved which, in turn, allows a fairly low modulating current to offer a large change in output voltage. This circuit eliminates at least one of the feedback loops found in existing designs, further increasing stability. As a result of the circuit design, there is achieved a DC-to-DC converter which allows the user to easily define the frequency at which the circuit operates and which is tolerant of component variations.

Abstract: Disclosed are systems and methods which utilize an image reject mixer in an out-of-band mixer application such as in a forward data channel frequency converter. For example, according to a preferred embodiment, an image reject mixer is utilized to provide a relatively high degree of image rejection with respect to an out-of-band signal, thereby relaxing the requirement for filtering in the signal path leading to the mixer circuitry. Preferred embodiments of the invention are substantially or fully implemented utilizing integrated circuit technology.

Abstract: Disclosed are systems and methods which provide a common bypass node with respect to multiple circuits of an integrated circuit. According to a preferred embodiment, a circuit for filtering bias noise introduced by components of the integrated circuit may be coupled to this common bypass node and bypass bias filtering may be provided with respect to each of the multiple circuits. According to a preferred embodiment, the common bypass node is associated with an external lead or pin of the integrated circuit to thereby facilitate the efficient use of integrated substrate area as well as the efficient use of external interfaces thereof. Additionally, the common bypass node of the preferred embodiment may be utilized in providing cooperative operation of the multiple circuits coupled thereto.

Abstract: The gain characteristics of certain stages of a tuner circuit are selected to be proportional, but opposite, to selected other stages such that the overall gain of the tuner remains constant over a wide temperature range. In one embodiment, the gain of the IF stage has a temperature slope opposite to the temperature slope of the input RF stage thereby avoiding the use of AGC circuitry.