Abstract: Disclosed are systems and methods which utilize an image reject mixer in an out-of-band mixer application such as in a forward data channel frequency converter. For example, according to a preferred embodiment, an image reject mixer is utilized to provide a relatively high degree of image rejection with respect to an out-of-band signal, thereby relaxing the requirement for filtering in the signal path leading to the mixer circuitry. Preferred embodiments of the invention are substantially or fully implemented utilizing integrated circuit technology.

Abstract: A system for tuning a radio-frequency signal includes a first input path, a second input path, a common reference generator, a selector, a mixer, and a filter. The first input path and the second input path propagate a first single-ended input signal and a second single-ended input signal, respectively, to the selector. The selector converts the first single-ended input signal and the second single-ended input signal into a first differential input signal and a second differential input signal, respectively, using a reference signal generated by the common reference generator. The selector selectively couples one of the first and the second input path to an input of the mixer. The mixer downconverts a selected on of the differential input signals received from the selector. The filter attenuates a portion of the downconverted input signal outside a passband associated with the filter.

Abstract: A broadband signal amplifier includes one of more broadband amplifier circuits, each dynamically controlled in response to a total power level of signals applied thereto to reduce linearity in response to a reduction of input signal strength. A filter may couple the output of the broadband amplifier circuits to each other to form a tandem arrangement. Power detectors are connected to detect and provide outputs indicative of the total power levels of the signals applied to respective broadband amplifiers. A control unit is connected to and receives the output from the power detectors and, in response, provides a control signals to the broadband amplifier circuit so as to operate each over portions of their operating characteristic curves that provide only that degree of linearity necessary to limit distortion to a predetermined or dynamically adjustable maximum acceptable level.

Abstract: A method for tuning a transconductor includes receiving a digital value. The method also includes determining a bit value for a selected bit of the digital value, and selecting a tuning range for a transconductor based on the bit value. The method further includes tuning the transconductor within the selected range based on any remaining bits in the digital value.

Abstract: A technique is provided for communicatively coupling internal circuitry (e.g., a resonant tank) of an integrated circuit (“IC”) with pins of the IC's package in a manner that minimizes the inductance of such coupling. In certain embodiments, more than two bondwires are coupled to an electrically common interface, wherein the bondwires are used for carrying a signal of the internal circuitry of the IC. More particularly, in certain implementations the bondwires are used as inductors for the internal circuitry (e.g., a resonant tank) of the IC. In certain embodiments, a plurality of bondwires are coupled to a plurality of IC package pins, which are electrically coupled together. By carrying signals of opposite polarity on each of the bondwires, the inductance of such bondwires is minimized.

Abstract: In one embodiment, a system for providing both wireline and wireless connections to a wireline interface includes a first wireline interface, a second wireline interface, a wireless interface, and a switch coupled to the first wireline interface, the second wireline interface, and the wireless interface. The switch can selectively couple the first wireline interface to the second wireline interface to allow communication between the first and second wireline interfaces. The switch can further selectively couple the first wireline interface to the wireless interface to allow communication between the first wireline interface and the wireless interface.

Abstract: A circuit includes a first filter comprising a first inductor coupled to a first variable capacitor, wherein the first filter is associated with a first resonant frequency. The circuit further comprises an amplifier coupled to the first filter and a second filter coupled to the amplifier. The second filter comprises a second inductor coupled to a second variable capacitor, wherein the second filter is associated with a second resonant frequency that is substantially the same as the first resonant frequency. At least a portion of the first filter and at least a portion of the second filter are formed on an integrated circuit.

Abstract: Tuners are adapted to accept a received signal input and provide both a desired tuner output and the received signal as an output. Accordingly, a single tuner circuit, preferably an integrated circuit, may be cascaded to provide a multiple tuner configuration. Any number of such integrated circuit tuners may be cascaded together for a multiple tuner application. Alternative embodiments provide a multiple tuner adapter for cascading devices.

Abstract: An attenuator system includes a first adjustable impedance component on a first current path between a input component and a output component, and a second adjustable impedance component between the first current path and ground, wherein each of the first and second adjustable impedance components include a plurality of selectable, discrete legs, each leg having an impedance.

Abstract: A system for providing automatic gain control (AGC) comprises a signal path with an RF input, a plurality of power detectors in communication with the signal path, each of the power detectors operable to measure a total broadband power level of a signal in the signal path, each of the power detectors positioned to monitor a point in the signal path corresponding to a change in signal bandwidth, a control system operable to receive from each of the power detectors information associated with the power level and to adjust attenuation in the signal path in response to the information to achieve desired gain control.

Abstract: A broadband integrated receiver for receiving input signals and outputting composite video and audio signals is disclosed. The receiver employs an up-conversion mixer and a down-conversion mixer in series to produce an intermediate signal. An intermediate filter between the mixers performs coarse channel selection. The down-conversion mixer may be an image rejection mixer to provide additional filtering.

Abstract: A broadband integrated receiver for receiving input signals and outputting composite video and audio signals is disclosed. The receiver employs an up-conversion mixer and a down-conversion mixer in series to produce an intermediate signal. An intermediate filter between the mixers performs coarse channel selection. The down-conversion mixer may be an image rejection mixer to provide additional filtering.

Abstract: A filter circuit includes a polyphase filter coupled to a first circuit component and a second circuit component. The first circuit component propagates four input current signals to the polyphase filter. The third and fourth input current signals are substantially one-hundred-eighty degrees out of phase with the first and second input current signals. The polyphase filter receives the input current signals and generates four output current signals that are out of phase with each other. The second circuit component generates first and second output signals using the four output current signals. The first and second output signals are ninety degrees out of phase with each other.

Abstract: A method for generating phase signals includes triggering a phase register to output a binary number stored in the phase register, wherein the phase register is triggered based at least in part on a voltage signal provided by a voltage controlled oscillator. The method also includes providing an input signal to a decoder, wherein the input signal is based at least in part on the binary number output by the phase register and the decoder is operable to generate phase signals in response to the input signals. The method further includes incrementing the binary number stored in the phase register and repeating the triggering and providing steps after the binary number is incremented.

Abstract: Frequency translation, such as frequency up conversion of a video baseband or intermediate frequency to a desired frequency division broadcast channel, is provided utilizing a single sideband or image reject mixer and filtering having relaxed selectivity requirements. According to a preferred embodiment, a first single sideband mixer accepts an input signal at an intermediate frequency and up converts this signal to a high intermediate frequency. The image rejection provided by the single sideband mixer in combination with simple filtering provide sufficient signal quality to achieve desired levels of desired signal isolation, such as on the order of 40 dB. Preferably, a second single sideband mixer accepts the high intermediate frequency signal and down converts this signal to a desired transmission or broadcast frequency.

Abstract: Disclosed are systems and methods which provide phase shifting of signals while minimizing signal attenuation associated with providing such phase shifting. Preferred embodiments provide a compact polyphase filter structure in which the geometry of the polyphase filter both minimizes parasitic capacitance and signal transmission paths therein. A polyphase filter of a preferred embodiment utilizes a radial pinwheel structure providing a geometry in which successive circuit components are disposed very near one another and in an orientation to accommodate very short connections therebetween. Embodiments may include the use of a buffer at the outputs of the polyphase filter circuit to reduce the amount of parasitics associated with the polyphase filter.

Abstract: A circuit for frequency translating a radio frequency signal comprises a plurality of mixer stages, each stage associated with a particular range of frequencies of a radio frequency signal. The circuit further comprises a switching circuit that communicates the radio frequency signal to a selected one of the plurality of mixer stages in response to a control signal. The selected mixer stage comprises a phase generation circuit that generates a plurality of phase signals, and at least one mixer that combines the radio frequency signal with one of the plurality of phase signals to generate at least a portion of an intermediate frequency signal.

Abstract: Frequency translation, such as frequency up conversion of a video baseband or intermediate frequency to a desired frequency division broadcast channel, is provided utilizing a single sideband or image reject mixer and filtering having relaxed selectivity requirements. According to a preferred embodiment, a first single sideband mixer accepts an input signal at an intermediate frequency and up converts this signal to a high intermediate frequency. The image rejection provided by the single sideband mixer in combination with simple filtering provide sufficient signal quality to achieve desired levels of desired signal isolation, such as on the order of 40 dB. Preferably, a second single sideband mixer accepts the high intermediate frequency signal and down converts this signal to a desired transmission or broadcast frequency.

Abstract: A circuit and method for adjusting the operating characteristics of a tuner in accordance with information derived from the signals being processed by the tuner. Depending upon signal type and/or signal strength, the power levels of certain components are adjusted and/or certain components are added to (or subtracted from) the tuner.

Abstract: A method for generating phase signals includes triggering a phase register to output a binary number stored in the phase register, wherein the phase register is triggered based at least in part on a voltage signal provided by a voltage controlled oscillator. The method also includes providing an input signal to a decoder, wherein the input signal is based at least in part on the binary number output by the phase register and the decoder is operable to generate phase signals in response to the input signals. The method further includes incrementing the binary number stored in the phase register and repeating the triggering and providing steps after the binary number is incremented.