Abstract: There is provided a highly distributed multi-core system with an adaptive scheduler. By resolving data dependencies in a given list of parallel tasks and selecting a subset of tasks to execute based on provided software priorities, applications can be executed in a highly distributed manner across several types of slave processing cores. Moreover, by overriding provided priorities as necessary to adapt to hardware or other system requirements, the task scheduler may provide for low-level hardware optimizations that enable the timely completion of time-sensitive workloads, which may be of particular interest for real-time applications. Through this modularization of software development and hardware optimization, the conventional demand on application programmers to micromanage multi-core processing for optimal performance is thus avoided, thereby streamlining development and providing a higher quality end product.

Abstract: A method comprises analyzing each frame of a plurality of frames of the speech signal to determine one or more speech parameters for the speech signal; deciding, for each frame of the plurality of frames of the speech signal, based on the one or more speech parameters of the speech signal, to select one of a plurality of encoding modes including a first encoding mode and a second encoding mode for encoding each frame of the plurality of frames of the speech signal; encoding each frame of the plurality of frames of the speech signal according to the selected one of the plurality of encoding modes for each frame of the plurality of frames in the deciding; the first encoding mode supports a first encoding rate and the second encoding mode supports a second encoding rate, wherein the first encoding rate is the same encoding rate as the encoding rate.

Abstract: There is provided a voltage mode push-pull driver output stage with low power consumption and improved output return loss (ORL) suitable for various high bandwidth data transmission applications. By structuring the output stage to have tunable resistances adjustable by voltages applied to transistors, the output stage is readily adaptable to different applications requiring different resistances or impedance matching.

Abstract: A system is disclosed to automatically establish proper biasing for light sources in a color mixed projection system having multiple light sources which are active at the same time. Responsive to a feedback signal, a single DC-DC converter generates the bias voltage for the light sources. Comparators compare a headroom signal for each light source to a reference value to generate comparator output signals. The comparator output signals are processed by a channel selector and a digital filter/DAC module. The channel selector controls a switch to selectively provide and combine a headroom signal with an output of the digital filter/DAC module to create the feedback signal. By monitoring each headroom value, the bias voltage is adjusted, based on the feedback signal, until every headroom signal reaches the reference value thereby achieving sufficient biasing for every active light source in the color mixed projection system.

Abstract: An integrated system for adaptive equalization and jitter reduction of a video signal that includes an adaptive equalizer and a jitter cleaner located on one integrated circuit within a single package. An adaptive equalizer applies frequency specific signal modification to the received signal. A bit rate detector determines a bit rate of the video signal or the equalized signal. The jitter cleaner couples to the adaptive equalizer output and processes the equalized signal to reduce jitter in the equalized signal. A multiplexer receives the equalized signal and the jitter cleaner output and, responsive to a control signal, outputs either the equalized signal or the jitter cleaner output signal. A status monitor may optionally be included to compare the detected bit rate to a bit rate threshold, and a responsive to the comparing activate or deactivate the jitter cleaner and output either the equalized signal or jitter cleaner output.

Abstract: Provided is a system for wireless communications including several base stations supporting a wide area wireless network and several mobile user equipment (UE) devices. Each mobile UE device may be configured to transmit a request to establish a local wireless connection with one or more of the UE devices. The mobile UE device may receive a response containing connectivity information from each of the mobile UE devices and then select one of the mobile UE devices based on the connectivity information received from each of the mobile UE devices. The mobile UE device may then establish a local wireless connection with the selected mobile UE device. The mobile UE device may then communicate with one of the base stations in the wide area wireless network through the selected mobile UE device, utilizing the local wireless connection.

Abstract: The invention relates to amplifiers and in particular, to a transimpedance amplifier for high rate applications. Disclosed is a two stage transimpedance amplifier having a first stage comprising an amplifier and a load and a second stage comprising an amplifier and a resistor. Negative feedback is provided through a feedback resistor. Only two voltage conversions occur which reduces phase distortion, as compared to three stage transimpedance amplifiers which perform 3 voltage conversions.

Abstract: According to some embodiments, a turbo decoder configured for High-Speed Packet Access (HSPA) and Long Term Evolution (LTE) is provided, comprising: a plurality of maximum a posteriori (MAP) engines; a plurality of extrinsic memory banks accessible by a MAP engine of the plurality of MAP engines; and wherein when the turbo decoder is operating in HSDPA mode the plurality of extrinsic memory banks is configured such that during a first half of a decoding iteration, the MAP engine is able to read a first dataset from and write second dataset to the plurality of extrinsic memory banks in natural row and column order, and during a second half of the decoding iteration, the MAP engine is able to read a third dataset from and write a fourth dataset to the plurality of extrinsic memory banks in a predetermined row and column order in accordance with an interleaver table using a read column buffer and a write column buffer.

Abstract: There is provided a method or a device for extending a bandwidth of a first band speech signal to generate a second band speech signal wider than the first band speech signal and including the first band speech signal. The method comprises receiving a segment of the first band speech signal having a low cut off frequency and a high cut off frequency; determining the high cut off frequency of the segment; determining whether the segment is voiced or unvoiced; if the segment is voiced, applying a first bandwidth extension function to the segment to generate a first bandwidth extension in high frequencies; if the segment is unvoiced, applying a second bandwidth extension function to the segment to generate a second bandwidth extension in the high frequencies; using the first bandwidth extension and the second bandwidth extension to extend the first band speech signal beyond the high cut off frequency.

Abstract: There is provided a speech encoder for performing an algorithm that comprises obtaining (205) a plurality of open-loop pitch candidates from a current frame of a speech signal, the plurality of open-loop pitch candidates including a first open-loop pitch candidate and a second open-loop pitch candidate; obtaining (205) a voicing information from one or more previous frames; and selecting (280) one of the plurality of open-loop pitch candidates as a final pitch of the current frame using the voicing information from the one or more previous frames. In one aspect, the voicing information from the one or more previous frames includes a previous pitch of the one or more previous frames. In a further aspect, selecting the final pitch of the current frame includes selecting (210) an initial open-loop pitch from that has the maximum long-term correlation value.

Abstract: A low bandwidth phase lock loop (PLL) arranged in a dual-loop configuration is disclosed. The first loop is a standard loop configuration using a crystal oscillator as a reference clock. The loop parameters for this first PLL can be optimized to work over a wide range of output frequencies, and with a minimum amount of jitter. The first loop outputs a reference signal, which is a VCO output. The second loop comprises a bang-bang detector configured to drive a digital loop filter, which then drives a phase interpolator. The phase interpolator manipulates the output phase. Since phase and frequency are related, where frequency is the derivative of phase, small frequency offsets can be made using a phase control signal, generated within the second loop based on the relation between the reference signal and the clock input signal. The second loop sets the jitter transfer bandwidth of the system.

Abstract: Methods and apparatus for tail termination are provided that include a decoder that includes a processor configured to a forward state metric and a backward state metric wherein each iteration of an initial state of the backward state metric is fetched from a memory and is pre-computed without feedback from a decoding iteration. Each decoding iteration is substantially identical, and the backward state metric that is pre-computed is used for a subsequent iteration. The decoder may include a turbo decoder or a radix-4 decoder.

Abstract: In one embodiment, device for early stopping in turbo decoding includes a processor configured to receive a block of data to be decoded, compare hard decision bits resulting from decoding iterations and compare a minimum value of log likelihood ratio (LLR) of decoded bits against a threshold. The processor configured to match hard-decisions with previous iteration results. The processor may be configured to set an early stop rule after the matching hard-decisions with previous iteration results is matched. The processor may be configured to set an early stop rule when the minimum reliability of the output bits exceeds the threshold.

Abstract: Provided are devices, systems and methods for rate matching and de-rate matching on digital signal processors. In one embodiment, a device for rate matching and de-rate matching, includes an interface for receiving a plurality of blocks of data and digital signal processor configured to pre-compute permutation parameters common to the plurality of blocks, wherein the plurality of blocks are subject to a set of given puncturing parameters and receive a set of pre-computed puncturing thresholds. For one or more blocks in the plurality of blocks, the DSP computes a block signature from the pre-computed puncturing thresholds; matches the block signature to one of a set of pre-computed zone signatures, derives a zone index corresponding to the one pre-computed zone signature, and applies pre-computed permutation and puncturing transformations corresponding to the zone index to the block.

Abstract: Disclosed are various systems and methods for controlling a voice activity detector. In one example approach, a method is provided in which a voice over Internet protocol (VOIP) session is initiated in a first gateway with a second gateway. A plurality of jitter adaptation packets are transmitted from the first gateway to the second gateway. Also, the voice activity detector is disabled in the first gateway during the transmission of the jitter adaptation packets. The voice activity detector is enabled in the first gateway after the transmission of the jitter adaptation packets.

Abstract: An integrated circuit device for switching data has a plurality of input channels and a plurality of output channels. The device includes a switch for selectively connecting a subset of the output channels, mutually orthogonal, to the input channels by providing signal paths between the selected mutually orthogonal output channels and the input channels. The selected output channels are not orthogonal to the output channels that are not selected.

Abstract: A crosspoint switch device has a plurality of input ports each connected to a respective voltage source and a plurality of output ports each connected to a respective voltage source. A switch array selectively provides signal paths between the input ports and the output ports. The voltage sources are separate from one another.

Abstract: A projection system with one or more light sources reduced power consumption and optional scanning capability is disclosed. A controller processes image data to generate light source control signals and pixel screen control signals which are coordinated to generate an image. Reductions in power consumption occur by matching the light output from the light source to the brightest pixel(s) in the pixel screen for a particular frame. By setting the light output level to an intensity or duration matched to only the maximum level corresponding to a image frame, power consumption is reduced as compared to an embodiment which sets the light source output to its maximum level or maximum duration. The pixel screen, which may be an LCD screen, sets pixel areas corresponding to the brightest pixels as transparent and other, less bring pixels on the pixel screen are set to appropriate levels of reduced transparency.

Abstract: An optic module is disclosed having a memory configured to store data. To selectively control access to the memory and data stored in memory, a method and apparatus for memory access control is provided which creates access levels. The access levels include associated passwords, and read/write capability control, and address access range. During use a technician or other party would enter a password via an interface and the entered password is compared to the password associated with each access level. If a match is not found, then access to the memory, a hence data within the memory is denied. If a match is found the technician gains access to the data stored in the memory address range associated with the access level. Read and write access may also be granted or denied.

Abstract: A method of speech encoding comprises generating a first synthesized speech signal from a first excitation signal, weighting the first synthesized speech signal using a first error weighting filter to generate a first weighted speech signal, generating a second synthesized speech signal from a second excitation signal, weighting the second synthesized speech signal using a second error weighting filter to generate a second weighted speech signal, and generating an error signal using the first weighted speech signal and the second weighted speech signal, wherein the first error weighting filter is different from the second error weighting filter. The method may further generate the error signal by weighting the speech signal using a third error weighting filter to generate a third weighted speech signal, and subtracting the first weighted speech signal and the second weighted speech signal from the third weighted speech signal to generate the error signal.