Abstract: A test method of a voltage regulator having a plurality of parameters that need to be set, the test method includes: receiving a user requirement on a computer; generating a plurality of setting combinations of the plurality of parameters, the plurality of parameters has different combination of values in different setting combinations; downloading the plurality of setting combinations to the voltage regulator via a first I/O bus and configuring the voltage regulator with each setting combination; configuring communication between a controller provided by the computer and measurement devices; executing the communication between the controller and the measurement devices via a second I/O bus; and displaying test result of each configured voltage regulator on the computer.

Abstract: An inductor has one or more wires and a multipart magnetic core. The multipart magnetic core has magnetic core parts that are adjacent and magnetically coupled. The inductor provides an inductance of at least 40 nH for currents greater than 1 A and less than 60 A, and at least 20 nH for currents of at least 60 A.

Abstract: An inductor has one or more wires and a multipart magnetic core. The multipart magnetic core has magnetic core parts that are adjacent and magnetically coupled. The inductor provides an inductance of at least 40 nH for currents greater than 1 A and less than 60 A, and at least 20 nH for currents of at least 60 A.

Abstract: A battery charging and balancing circuit, for charging a battery pack having a plurality of cells. The battery charging and balancing circuit having a detecting circuit to provide a balancing connection indicating signal; a charging circuit to charge the battery pack based on the cell voltages when the balancing connection indicating signal is valid, and to charge the battery voltage otherwise; and a balancing circuit to control the discharging switches coupled with the cells based on the cell voltages when the balancing connection indicating signal is valid.

Abstract: A multi-port battery charge and discharge system used in the charge and discharge battery pack application. The multi-port battery charge and discharge system has N voltage converting circuits, each of which can operate in a charge mode to charge a battery pack or in a discharge mode to supply power sinks. The N voltage converting circuits can be operated in a master-slave configuration with one of the N voltage converting circuits set as a master voltage converting circuit and the remained ones set as slave voltage converting circuits. In a charge state, the master voltage converting circuit provides a regulated current signal to charge the battery pack, and the slave voltage converting circuits provide slave current signals to complementally charge the battery pack.

Abstract: A direct AC to AC converter includes a modulation stage, a transformer and a de-modulation stage. The modulation stage is configured to convert an AC input voltage with a first frequency into a bipolar PWM voltage with a second frequency, wherein the second frequency is higher than the first frequency. The transformer has a primary winding and secondary winding, wherein the primary winding is coupled to the modulation stage to receive the bipolar PWM voltage. The de-modulation stage is coupled to the secondary winding of the transformer and configured to convert the voltage across the secondary winding of the transformer into an AC output voltage with the first frequency.

Abstract: A switching power supply circuit with synchronous rectifier has an energy storage component, a rectifier switch coupled to a secondary side of the energy storage component, and a secondary side control circuit. The secondary side control circuit provides a driving signal to control the rectifier switch. When the drain-source voltage across the rectifier switch is less than a first threshold value, the secondary side control circuit controls the driving signal to be a maximum voltage to control the rectifier switch being fully on for a predetermined duration. After a predetermined duration, the secondary side control circuit adjusts the voltage of the driving signal based on the drain-source voltage across the rectifier switch and a second threshold value.

Abstract: A multiphase switching converter with automatic phase shedding control, wherein the multiphase switching converter includes a plurality of switching circuits coupled in parallel, and a plurality of control circuits configured in a daisy chain and respectively configured for driving a corresponding one of the plurality of switching circuits. Each of the control circuit generates a current threshold based on a corresponding sequence information, and compares a current indication signal indicative of a load current of the multiphase switching converter with the current threshold to determine whether to enter into a phase shedding mode.

Abstract: A lateral diode with high breakdown voltage capability and a method for forming the lateral diode. The lateral diode has an anode, a cathode, a substrate having a first conductivity type, an epitaxial layer having formed on the substrate, a current region formed in the epitaxial layer and on the substrate, a first well coupled to the anode, a second well coupled to the cathode, a third well with light doping concentration formed beside the first well, and a guard ring with heavy doping concentration formed in the first well and beside the third well, and between the third well and the second well is a drift region, a lateral breakdown occurs in the third well, the drift region and the second well when a reverse voltage added on the lateral diode is equal to or higher than a breakdown voltage.

Abstract: A dimming module having: a calculating circuit, configured to receive a preset current duty cycle reference signal, a preset current magnitude reference signal and a feedback voltage of an associated light-emitting device string, and to provide a current duty cycle reference signal and a current magnitude reference signal; and a current regulating circuit, configured to receive the feedback voltage of the associated light-emitting device string, the current duty cycle reference signal and the current magnitude reference signal, and to control a duty cycle and a magnitude of the current flowing through the associated light-emitting device string; wherein the current magnitude reference signal provided to the light-emitting device string with the minimum feedback voltage is lower than the preset current magnitude reference signal, while the current magnitude reference signal provided to each other light-emitting device string is higher than the preset current magnitude reference signal.

Abstract: A manufacturing process of a DMOS device in a drift region in a semiconductor substrate, having: forming a polysilicon layer above the drift region; forming a block layer above the polysilicon layer; etching both the block layer and the polysilicon layer, through a window of a first masking layer to expose a window to the drift region; implanting dopants through the window to the drift region to form a body region; forming blocking spacers to wrap side walls of the polysilicon layer; implanting dopants into the body region under a window shaped by the blocking spacers to form a body pickup region; etching away the blocking spacers; performing a masking step to form gates; forming ONO spacers to wrap side walls of the gates; and performing a masking step to form source regions and drain pickup regions.

Abstract: A fault detection method for a multi-phase converter is: sampling currents flowing through a plurality of switching circuits to generate a plurality of current sampling signals; generating a plurality of digital current signals based on a plurality of current sampling signals; generating a plurality of on-time adjustment signals based on differences between each of the plurality of digital current signals and a reference current signal; averaging the plurality of on-time adjustment signals to generate an average adjustment signal; subtracting each of the plurality of on-time adjustment signals from the average adjustment signal to generate corresponding plurality of adjustment error signals; comparing each of the plurality of adjustment error signals with a threshold signal to generate a plurality of fault signals; and adjusting control signals of the plurality of switching circuits based on the plurality of fault signals.

Abstract: A short to ground protecting circuit for an LED driver for providing a power supply voltage for N LED strings. The LED driver has an output terminal for providing a power supply voltage for the N LED strings and N feedback terminals having N detecting voltages respectively. For each i from 1 to N, the ith LED string is coupled between the output terminal and the ith feedback terminal, and the ith feedback terminal is configured to have the ith detecting voltage. The short to ground protecting circuit receives a short threshold voltage and N open fault signals, and generates N short indicating signals. And on the premise of the ith open fault signal is valid, and if the ith detecting voltage is less than the short threshold voltage for a preset time period, the ith short indicating signal is valid.

Abstract: An LDMOS device with sinker link. The LDMOS device has a buried layer, a first well region and a sinker linking the buried layer and the first well region. The LDMOS device has a trench with its upper portion surrounded by the first well region and its lower portion surrounded by the sinker. The trench is formed so that the sinker can be formed by ion implantation through the trench. The trench is filled with non-conductive material.

Abstract: A switched tank converter includes: a first conversion unit and a second conversion unit, each having a clamp capacitor coupled between a first terminal and a third terminal, a high side switch coupled between the first terminal and a switch node, a low side switch coupled between the switch node and a second terminal, and a resonant tank coupled between the switch node and a fourth terminal; and a rectification unit having four rectification switches, wherein a second terminal of the first rectification switch and a first terminal of the third rectification switch are coupled to the fourth terminals of the first and second conversion units, a second terminal of the fourth rectification switch and a first terminal of the second rectification switch are coupled to the third terminals of the first and second conversion units.

Abstract: A voltage regulator has a switching circuit and a control circuit. The switching circuit receives an input voltage and provides an output voltage and an output current. The control circuit provides a control signal to the switching circuit, such that the output voltage is maintained at a clamp voltage level when the output current is lower than a transition current level, and the output voltage decreases as the output current increases when the output current is higher than the transition current level.

Abstract: An energy recycle circuit for a flyback circuit and method thereof. The energy recycle circuit has an auxiliary switch coupled in series to a clamp capacitor to form a branch, and the branch is coupled in parallel with the primary winding, or with the primary switch. The energy recycle circuit further has a recycle control circuit to generate an auxiliary switching signal. The auxiliary switch is turned on during a charging process of the clamp capacitor, and is turned off at an end of an immediate subsequent discharging process of the clamp capacitor. The charging process of the clamp capacitor is timed at a first length of time, and the immediate subsequent discharging process of the clamp capacitor is timed at a second length of time, based on an auxiliary switch current signal. The second length of time is adjustable to have an equal time length with the first length of time, or have a unequal time length with the first length of time.

Abstract: A synchronous rectifier monitors a driven signal of a synchronous switch. If the driven signal is provided within a set time length, the driven signal is latched off, to make the system enter light load mode.

Abstract: A power supply has a reference regulation circuit and a voltage regulator. The reference regulation circuit receives a VID code and a slew rate command from a processor and regulates a reference voltage based on the VID code and the slew rate command. The voltage regulator converts an input voltage to an output voltage based on the reference voltage. The circuit has a ?-? modulation unit to generate a count duration signal based on a target count signal, wherein the target count signal is generated by dividing a voltage regulation step by the slew rate command, both the target count signal and the count duration signal are digital signals, the target count signal represents a real number having an integer part and a decimal part, the count duration signal represents an integer number, the circuit further regulates the reference voltage based on the count duration signal and the VID code.

Abstract: A current generating circuit generating a current relevant to a reference voltage. The current generating circuit has a reference clock generating circuit generating a reference clock signal which has a frequency relevant to the reference voltage. The current generating circuit has a phase locked loop circuit generating a calibration clock signal. The phase clocked loop circuit regulates the calibration clock signal so that the phase difference between the calibration clock signal and the reference clock signal is reduced. The current generating circuit has also an output circuit generating an output current according to the phase difference between the calibration clock signal and the reference clock signal.