Abstract: A method performs a correction of an ionospheric error affecting pseudo-ranges measurements in a GNSS receiver receiving a plurality of satellite signals from a plurality of satellites of a constellation of satellites. The method is part of a navigation processing procedure performed at the GNSS receiver. The method utilizes pseudo range measurements previously calculated by the GNSS receiver, obtained from a plurality of carrier signals in the satellite signals. The method includes performing a correction procedure of the pseudo-range measurements, by calculating ionospheric error correction values for the pseudo-range measurements.

Abstract: A bipolar transistor includes a first PN junction and a second PN junction. A first gate is located on the first PN junction. A second gate is located on the second PN junction.

Abstract: A coupling and chaining bridge is configured to receive an original data value via a first bus coupled to one of a system bus of an electronic device and a first peripheral circuit of the electronic device. The original data value is transmitted by the coupling and chaining bridge to a second bus of the electronic device coupled to the other of the system bus and the first peripheral circuit. The coupling and chaining bridge is further configured to intercept the original data value and transmit a copy of the original data value to a third bus of the device that is coupled to a second peripheral circuit of the device.

Abstract: A semiconductor die is arranged at a first surface of a die pad. The die pad has a peripheral edge and a second surface opposite to the first surface that includes a first region and a second region surrounding the first region. The second region extends to the peripheral edge of the die pad from a border line at the first region and includes a recessed formation extending continuously along the border line. An insulating encapsulation is molded onto the die pad with the first region of the second surface left uncovered and the second region of the second surface of the die pad being covered by the insulating encapsulation that fills the recessed formation. The recessed formation has a variable recess depth between the border line and the peripheral edge of the die pad to provide an extended length delamination path from the border line to the semiconductor die.

Abstract: Provided is a circuit that sets a voltage of a failsafe node. The circuit includes a first voltage setting transistor configured to operate in a conductive state to set a voltage of the failsafe node to a supply voltage of a supply voltage node. The circuit includes first and second control transistors configured to control the first voltage setting transistor to operate in the conductive state in response to both the supply voltage and a pad node voltage of a pad node corresponding to logical one and control the first voltage setting transistor to operate in a nonconductive state in response to one of the supply voltage or the pad node voltage corresponding to the logical one and another one of the supply voltage or the pad node voltage corresponding to logical zero.

Abstract: A method and a system for integration of applications on a software-as-a-service-customer relationship management (SaaS-CRM) platform using a serverless interface are disclosed. The method comprises: (1) authenticating a user device application, by an authenticator, and generating an access token; (2) sending, by the user device application, request to an application programming interface (API) gateway to integrate the user device application with the SaaS-CRM platform, wherein the request includes the access token; (3) validating, by an authorizer, the access token to generate a policy; (4) granting access to the user device application for the serverless interface; (5) retrieving, by the serverless interface, a client credential data and a private key from a digital key manager; and (6) integrating, via the serverless interface, the user device application on the SaaS-CRM platform.

Abstract: A device includes charge pumps, wherein each charge pump has an input receiving an input voltage, another input receiving a periodic control signal and an output delivering an output voltage. Each charge pump is selectively enabled or disabled. A first circuit delivers an error signal based on a difference between the output voltage and a reference voltage. A second circuit changes an operating parameter of the charge pumps on the basis of the error signal. A third circuit compares a current value of the operating parameter with two thresholds and, based on the result of the threshold comparisons, controls one of an increase in, a decrease in, and a retention of a number of enabled charge pumps.

Abstract: Semiconductor chips are arranged on a first surface of a common electrically conductive substrate having an opposite second surface. The substrate includes adjacent substrate portions having mutually facing sides with sacrificial connecting bars extending between adjacent mutually facing sides. A solderable metallic layer is present on the second surface extending over the sacrificial connecting bars. The solderable metallic layer is selectively removed (by laser ablation or etching, for example) from at least part of the length the sacrificial connecting bars. The common electrically conductive substrate is then cut along the length of the elongate sacrificial connecting bars to provide singulated individual semiconductor devices. Undesired formation of electrically conductive filaments or flakes bridging parts of the substrate intended to be mutually isolated is countered.

Abstract: A device includes a substrate and an interconnection network on the substrate. The interconnection network includes at least a first level, at least a second level and a third level. The first level includes one or more capacitors. The third level includes a metallic shield. The second level is positioned between the first level and the substrate. The capacitors of the first level are entirely separated from the substrate by the shield. The second level is located between the first and third levels.

Abstract: The present disclosure relates to a regulator including a first transistor coupling an application node of a first power supply voltage to an output node of the regulator supplying a first regulated voltage; a feedback loop supplying a control signal to the first transistor and comprising a first charge pump circuit; a control signal generator of the first charge pump circuit; and a drop-down circuit between the control signal generator and the charge pump circuit.

Abstract: The present disclosure is directed to an optical sensor package with light shielding material covering five sides. The optical sensor package includes a transparent layer, a substrate layer, sensor elements between the transparent layer and the substrate layer, a solder mask on the side of the substrate layer opposite the transparent layer, and layer of molding material covering five sides of the optical sensor package. The solder mask and layer of molding material prevent light from entering the sides of the optical sensor package or from traveling through the substrate layer and reflecting toward the sensor elements.

Abstract: Disclosed herein are systems and methods for executing a transaction via a locker. A seller is provided initial access to the locker to deposit a good in the locker. The seller deposits the good in the locker. Following the seller depositing the good in the locker, the seller's access is revoked, and the buyer is provided access to the locker. The buyer may then arrive at the locker and provide authentication information to an authentication device. When the buyer is authenticated, the locker door (with the good inside the locker) is unlocked. The buyer can then inspect and accept the good. When the good is accepted, funds may be transferred from an account associated with the buyer to an account associated with the seller.

Abstract: A milking device is provided with milking means, a control unit, a milk line for transporting the milk from the milking means to a milk tank, a milk filter for filtering the milk passing through the milk line, and a cleaning device for the milk filter with cleaning liquid. The milk filter includes a housing which surrounds a filter volume and has a milk inlet and a milk outlet, and a filter component in the filter volume. The filter component includes a circumferential plate part with filter openings, and divides the filter volume into a central inner filter volume and an outer filter volume surrounding the latter. The filter component includes wire with a unilaterally tapering cross-sectional profile and a frame. The wire is provided in a spiral shape with a plurality of windings or in a series of individual parallel rings or rods.

Abstract: A hybrid QFN package includes an encapsulant body that encapsulates a lead frame and integrated circuit (IC) device where the lead frame includes a die pad and vertically offset leads. Back sides of the die pad and encapsulant body are coplanar at first surface. Front sides of the leads, the IC device and the encapsulant body are substantially coplanar at a second surface. An insulating layer covers the second surface except at a portion of the leads located at the peripheral edge of the encapsulating body. Vias extend through the insulating layer to the leads and IC device. Wiring lines on the insulating layer interconnect the vias. A passivation layer covers the wiring lines and vias.

Abstract: Integrated electronic device including: a semiconductor body of silicon delimited by a front surface and including at least a first semiconductive region of a first conductivity type, which extends into the semiconductor body starting from the front surface, and a second semiconductive region of a second conductivity type, which extends below the first semiconductive region; a dielectric capping region; a trench which extends through the dielectric capping region and through a front portion of the semiconductor body, in such a way that a part of the first semiconductive region laterally faces the trench, said trench partly extending inside the second semiconductive region; a conductive contact structure extending into the trench and including: a coating region of titanium silicide, which coats the bottom of the trench, in contact with the second semiconductive region, and also laterally coats the part of the first semiconductive region laterally facing the trench; and an inner conductive region.

Abstract: The present disclosure relates to an avalanche photodiode pixel including: a transistor adapted to be controlled by an enable signal having a first state for controlling the enabling of the pixel and a second state for controlling the disabling of the pixel, the transistor being configured to couple an avalanche photodiode of the pixel to a node of application of a substrate voltage when the enable signal is in the first state; and an output circuit adapted to be controlled by the enable signal and configured to provide a pixel output signal when the enable signal is in the first state and to block the pixel output signal when the enable signal is in the second state.

Abstract: A power module includes an insulating body having a first main face and a second main face; a first contact plate and a second contact plate, respectively protruding through the first main face and through the second main face of the insulating body and accessible from the outside; a first power plate and a second power plate, at least partially embedded in the insulating body and facing each other. Power devices of a first group are accommodated on the first power plate and coupled to the first contact plate. Power devices of a second group are accommodated on the second power plate and coupled to the second contact plate. The first contact plate, the second contact plate, the first power plate and the second power plate, are stacked in a direction perpendicular to the first power plate and the second power plate.

Abstract: A computer-implemented method includes receiving, from a mobile device, a deposit request including a first check image for funds to be deposited into a user account, determining a risk level associated with the deposit request, requesting a second check image having a restricted endorsement based on the risk level, receiving the second check image having the restricted endorsement, determining a confidence level based on the restricted endorsement, and transferring the funds to the user account based on the confidence level.

Abstract: Systems and applications are described that use group signature technology to allow for anonymous and/or semi-anonymous feedback while allowing for the application of rules and parameters. The use of group signature technology may serve to potentially mitigate or prevent malicious identification of individuals or entities providing a communication such as feedback. Feedback may range from constructive feedback all the way to the ‘whistleblower’ variety. It may be desirable to identify the individuals as belonging to a particular group or having a particular status or position while maintaining the anonymity of the individuals within the particular group.

Abstract: Laser direct structure (LDS) material is molded onto a semiconductor chip arranged on a substrate. The LDS material has a first thickness between a front surface of the LDS material and the substrate. A portion of the LDS material is removed (with a blade, for instance) to form a cavity having an end wall between the front surface of the LDS material and an electrically conductive formation on the substrate. At the cavity, the LDS material has a second thick ness smaller than the first thickness. Laser beam energy is applied to the LDS material at the end wall of the cavity to structure therein one or more vias that extend between the end wall of the cavity and the electrically conductive formation. The semiconductor chip and the electrically conductive formation are electrically coupled with electrically conductive material grown in the one or more vias laser structured in the LDS material.