Abstract: Parameter optimization method for nonlinear vibration model of complex device, comprising: 1) constructing various structures of complex device into tree structure, to form tree-shaped complex device model subsystem, and carrying out sign convention for dynamic analysis; 2) establishing complex device dynamic model to obtain dynamic relationships among all parts of complex device; 3) according to contact and collision conditions in advancing process of physical complex device, adding constraint relationships among parts in dynamic simulation software; 4) on basis of dynamic simulation software, establishing virtual prototype model of complex device, and determining target parameter and optimization target; 5) simulating vibration characteristics of complex device for different levels of pavement spectrums and different vehicle speeds; 6) adding required input point and output point for virtual prototype model; 7) on basis of optimization algorithm of numerical solution in small sample deep learning, obtaining

Abstract: A multi-inductor common-ground on-chip millimeter wave single-pole double-throw radio frequency switch is provided. The radio frequency switch includes a first radio frequency port, a second radio frequency port, a third radio frequency port, a first switch arm and a second switch arm. Access points of output matching circuits in the two switch arms are respectively connected with a first compensation inductor and a second compensation inductor. The first compensation inductor, the second compensation inductor, and a first coupling inductor connected with the first radio frequency port are multiplexed to be grounded to a second coupling inductor.

Abstract: A monolithic optoelectronic integrated circuit is provided, including: a substrate including photonic integrated device region and a peripheral circuit region; a first GaN-based multi-quantum well optoelectronic PN-junction device including a first P-type ohmic contact electrode and a first N-type ohmic contact electrode; and a first GaN-based field-effect transistor, where the first GaN-based field-effect transistor includes a first gate dielectric layer disposed on the surface of the substrate and having a first recess, a first gate filled within the first recess, and a first source and a first drain that are disposed the opposite sides of the first gate, where the first source is electrically connected to the first P-type ohmic contact electrode, the first drain is configured to be electrically connected to a first potential.

Abstract: A universal test chiplet for testing a plurality of chiplets to be tested is provided. The universal test chiplet includes a chiplet test control circuit module, a test data distribution circuit module, a memory test configuration circuit module, and a chiplet test interface circuit module. The chiplet test control circuit module is configured to provide test data and configure test modes for the chiplets to be tested. The test data distribution circuit module is configured to distribute the test data required by each of the chiplets to be tested from a test data bus. The memory test configuration circuit module is configured to provide test circuits for memories of the chiplets to be tested and automatically generate a test vector. The chiplet test interface circuit module is configured to transmit the test data to the chiplets to be tested in any direction through chiplet test interfaces.

Abstract: A downlink channel estimation method based on a co-prime array in asymmetric massive MIMO architecture is provided. First, an uplink and downlink asymmetric receiving and transmitting system model based on a co-prime array is established, and a deviation of the frequency domain direction caused by array broadband signals is observed; then, uplink receiving is performed to estimate an uplink channel, and channel parameters such as the number of paths, the angle of arrival and the path gain are recovered; and finally, a downlink channel is reconstructed based on the channel parameters recovered according to the uplink channel. By means of the high angular resolution of the co-prime array, the problem that a recovered uplink channel cannot be directly used for pre-coding of a downlink channel is solved.

Abstract: Disclosed is an intelligent interactive decision-making method for a discrete manufacturing system. The method includes the following steps: step 1, establishing a production scheduling optimization model and strategy for discrete manufacturing for an actual application scene; step 2, training the scheduling strategy with existing production data on the basis of a deep reinforcement learning algorithm, and storing a state having a high reward in a training process in a memory; step 3, updating the state according to prior knowledge in the memory; step 4, inputting the updated state into a deep reinforcement learning network, obtaining a corresponding reward, and updating the memory according to the reward; and step 5, repeating step 4 until model parameters converge, and saving and putting the model into an actual production scene.

Abstract: Disclosed are an indoor non-contact human activity recognition method and system. The method comprises: collecting an indoor reflected signal by using an antenna array; filtering the reflected signal to obtain a noise-removed reflection signal; and inputting the noise-removed reflected signal to a pre-trained human activity recognition model, and determining a human activity category, the human activity recognition model being a pre-trained CNN network model based on a transfer learning algorithm. The recognition method and system have the advantages that: the antenna array is configured for collecting human actions to carry out activity recognition indoors, which can be applied to home-based care scenes; original data is denoised, so that most of high-frequency noises can be removed, and a phase change of the signal is reserved; a CNN structure is adopted for training so as to reduce a complexity of the system location-free sensing.

Abstract: A circuit for post-binding testing of a 2.5D chiplet includes an interposer-dedicated TAP controller, an interposer test interface circuit and a chiplet test output control circuit. A chiplet test configuration register and its corresponding instructions are newly added for the interposer-dedicated TAP controller. The interposer test interface circuit uses an output control signal of the chiplet test configuration register to select the opening or closing of a test signal channel between an interposer and a chiplet. The chiplet test output control circuit uses the chiplet test configuration register to output a control signal for control of a test data output of the chiplet on the interposer.

Abstract: A user matching and power distribution methods for a MIMO-NOMA downlink communication system is provided. The user matching method includes: dividing all users into a strong user group and a weak user group according to a channel gain sorting result; and sequentially selecting a user in the strong user group, calculating a correlation coefficient between the user and each user in the weak user group, selecting a weak user with the highest correlation coefficient as a weak user in a cluster where the strong user is located, and excluding matched users from respective user groups, until the matching between all strong users and weak users are completed. The present invention enables weak users in a cluster to experience less inter-cluster interference in scenarios where the channel correlation between users is relatively low, thereby improving the total throughput of the communication system.

Abstract: A reconfigurable MBIST method based on an adaptive March algorithm is provided. The reconfigurable MBIST method automatically reconfigures different algorithm circuits according to external environment and user instructions to satisfy detection requirements for different faults. The provided adaptive March algorithm is capable of adaptively reorganizing algorithms with different complexities, such that dynamic adjustments can be executed between time complexities of the algorithm and fault coverage rates to achieve a good balance, and the static fault coverage rates are high, thereby effectively improving dynamic fault coverage rates.

Abstract: Disclosed are a three-dimensional modeling system and modeling method based on multimodal fusion. The method includes: separately collecting feedback data of an electroencephalogram sensor, an electromyography sensor, an eye movement sensor, a gesture sensor, and a voice sensor, conducting multimodal fusion on the feedback data, obtaining multimodal-fused model data, matching the model data with a database instruction, obtaining and analyzing an instruction set, obtaining and identifying a relevant modeling parameter, obtaining a modeling method, automatically conducting modeling according to the modeling method, and obtaining a visual entity model.

Abstract: Disclosed is a complex device key position vibration characteristic parameter verification method, comprising following steps: 1) constructing a model of complex device parts; 2) establishing a complex device dynamic model in a simulation software; 3) in the advancing process of a physical complex device, obtaining connection modes and constraint relationships among parts; 4) pre-simulating a complex device model in a dynamic simulation software; 5) determining a vibration characteristic parameter of a complex device key position needing to be verified, and carrying out post-processing on the vibration characteristic parameter for different levels of pavement spectra and vehicle speeds; 6) using a neural network model, training a selected key position rigidity damping coefficient and the vibration characteristic parameter; 7) comparing and verifying the vibration characteristic parameter obtained in the simulation process of the complex device dynamic model with the vibration characteristic parameter obtained

Abstract: Disclosed are an image dehazing method and system based on CycleGAN. The method comprises: acquiring a to-be-processed hazy image; and inputting the image into a pre-trained densely connected CycleGAN, and outputting a clear image. The densely connected CycleGAN comprises a generator, the generator comprises an encoder, a converter and a decoder, the encoder comprises a densely connected layer for extracting features of an input image, the converter comprises a transition layer for combining the features extracted at the encoder stage, the decoder comprises a densely connected layer and a scaled convolutional neural network layer, the densely connected layer is used for restoring original features of the image, and the scaled convolutional neural network layer is used for removing a checkerboard effect of the restored original features to obtain a finally output clear image.

Abstract: Disclosed is a serial test circuit for controllable Chiplets, which belongs to the technical field of test or measurement of semiconductor devices during manufacturing or processing. The test circuit includes a master control test module, a slave control test module, a clock controlling module and an outputting module. The master control test module is composed of a test access port module, a segment insertion bit module and a test data register module. The test controlling signal is generated by the master control test module, and the test inputting signals of the slave Chiplets are respectively controlled by the slave control test module after receiving the test controlling signal. At the same time, the test controlling signal is inputted to the clock controlling module to obtain the clock signals of the slave Chiplets. The output signal of the test outputting module is determined by the test controlling signal.

Abstract: Disclosed is a serial test circuit for controllable Chiplets, which belongs to the technical field of test or measurement of semiconductor devices during manufacturing or processing. The test circuit includes a master control test module, a slave control test module, a clock controlling module and an outputting module. The master control test module is composed of a test access port module, a segment insertion bit module and a test data register module. The test controlling signal is generated by the master control test module, and the test inputting signals of the slave Chiplets are respectively controlled by the slave control test module after receiving the test controlling signal. At the same time, the test controlling signal is inputted to the clock controlling module to obtain the clock signals of the slave Chiplets. The output signal of the test outputting module is determined by the test controlling signal.

Abstract: A downlink channel estimation method based on a co-prime array in asymmetric massive MIMO architecture is provided. First, an uplink and downlink asymmetric receiving and transmitting system model based on a co-prime array is established, and a deviation of the frequency domain direction caused by array broadband signals is observed; then, uplink receiving is performed to estimate an uplink channel, and channel parameters such as the number of paths, the angle of arrival and the path gain are recovered; and finally, a downlink channel is reconstructed based on the channel parameters recovered according to the uplink channel. By means of the high angular resolution of the co-prime array, the problem that a recovered uplink channel cannot be directly used for pre-coding of a downlink channel is solved.

Abstract: A method for manufacturing a vertical blue light emitting diode (LED) includes: bonding a growth substrate to a conductive substrate; peeling off the growth substrate; etching the nitride epitaxial layer to remove the buffer layer and the undoped GaN layer and to thin the N-type GaN layer, such that a thickness of a residual nitride epitaxial layer is less than a wavelength of blue light; and forming an N-type electrode on a surface of a residual N-type GaN layer.

Abstract: A vertical blue LED includes: a conductive substrate, the conductive substrate including a first surface and a second surface opposite to the first surface a nitride epitaxial layer; a metal reflective layer, positioned on the first surface; a nitride epitaxial layer, positioned on a surface of the metal reflective layer and including a P-type GaN layer, a quantum well layer, a preparation layer, and an N-type GaN layer that are sequentially stacked along a direction perpendicular to the conductive substrate, wherein a thickness of the nitride epitaxial layer is less than a wavelength of blue light; an N-type electrode, positioned on a surface of the N-type GaN layer; and a P-type electrode, positioned on the second surface.

Abstract: The present disclosure discloses a method for extracting parasitic capacitance of interconnection lines of an integrated circuit based on discontinuous Galerkin finite element method.

Abstract: Disclosed are an ergonomic evaluation method and simulation system based on virtual-real fusion. The system includes a user and device module, a virtual scene building module, and a data processing and analysis module. The method includes: obtaining real-time human joint point position data by means of a human motion capturing device, generating a character model of a current posture, and integrating the character model into a visual device and a personal computer (PC) terminal that are implanted with a virtual scene; obtaining comprehensive human joint point data through computation according to the real-time human joint point position data, and obtaining virtual scene data; and determining a human motion according to the comprehensive human joint point data and the virtual scene data, obtaining human posture data, obtaining human posture evaluation information through computation, and conducting analysis to determine whether an ergonomic evaluation index is rational.