Abstract: Systems and methods for measuring transmitter and/or receiver I/Q impairments are disclosed, including iterative methods for measuring transmitter I/Q impairments using shared local oscillators, iterative methods for measuring transmitter I/Q impairments using intentionally-offset local oscillators, and methods for measuring receiver I/Q impairments. Also disclosed are methods for computing I/Q impairments from a sampled complex signal, methods for computing DC properties of a signal path between the transmitter and receiver, and methods for transforming I/Q impairments through a linear system.

Abstract: Connecting a plurality of chassis using a rigid connection. A first coupling element of a first chassis may be mated with a first rigid connection. The first coupling element may be positioned on an exterior housing of the first chassis and coupled to a first backplane of the first chassis. A second coupling element of a second chassis may be mated with the first rigid connection. The second coupling element may be positioned on an exterior housing of the second chassis and coupled to a second backplane of the second chassis. Connecting the first chassis and the second chassis may allow the first and second backplanes to communicate analog signals.

Abstract: Systems and methods for measuring transmitter and/or receiver I/Q impairments are disclosed, including iterative methods for measuring transmitter I/Q impairments using shared local oscillators, iterative methods for measuring transmitter I/Q impairments using intentionally-offset local oscillators, and methods for measuring receiver I/Q impairments. Also disclosed are methods for computing I/Q impairments from a sampled complex signal, methods for computing DC properties of a signal path between the transmitter and receiver, and methods for transforming I/Q impairments through a linear system.

Abstract: Systems and methods for measuring transmitter and/or receiver I/Q impairments are disclosed, including iterative methods for measuring transmitter I/Q impairments using shared local oscillators, iterative methods for measuring transmitter I/Q impairments using intentionally-offset local oscillators, and methods for measuring receiver I/Q impairments. Also disclosed are methods for computing I/Q impairments from a sampled complex signal, methods for computing DC properties of a signal path between the transmitter and receiver, and methods for transforming I/Q impairments through a linear system.

Abstract: Systems and methods for measuring transmitter and/or receiver I/Q impairments are disclosed, including iterative methods for measuring transmitter I/Q impairments using shared local oscillators, iterative methods for measuring transmitter I/Q impairments using intentionally-offset local oscillators, and methods for measuring receiver I/Q impairments. Also disclosed are methods for computing I/Q impairments from a sampled complex signal, methods for computing DC properties of a signal path between the transmitter and receiver, and methods for transforming I/Q impairments through a linear system.

Abstract: System and method for validating a program under a specified model of computation. The model of computation may be related to the synchronous statechart model of computation. A program may be received that specifies a plurality of operations using a variable within a logical tick such that the variable has multiple values within the logical tick. The program may be statically analyzed according to a specified model of computation that specifies program execution based on logical ticks, which may include determining that the program has deterministic semantics that specify deterministic results for each logical tick during execution of the program, including specifying deterministic results of the plurality of operations performed within the logical tick. The program may be validated in accordance with the specified model of computation in response to the determining. Such techniques may allow validation of a larger set of programs than conventional models while maintaining deterministic results.

Abstract: System and method for performing program-related operations over a network via a web browser. A network connection is established between a server computer and a client computer over a network. A universal resource identifier (URI) is sent from the client computer to the server computer over the network, where the URI indicates a program, e.g., a graphical program (GP), or at least a portion of a graphical program interactive development environment (GPIDE), e.g., a graphical program editor, an execution engine, a static or dynamic analyzer, and/or compiler. The at least a portion of the GPIDE is received from the server computer over the network in response to the URI, and executed in a web browser of the client computer to perform some specified functionality with respect to the GP.

Abstract: A low complexity system and method for operating a receiver in order to estimate an offset between the actual sample clock rate 1/TS? of a receiver and an intended sample clock rate 1/TS. The receiver captures samples of a received baseband signal at the rate 1/TS?, operates on the captured samples to generate an estimate for the clock rate offset, and fractionally resamples the captured samples using the clock rate offset. The resampled data represents an estimate of baseband symbols transmitted by the transmitter. The action of operating on the captured samples involves computing an error vector signal and then estimating the clock rate offset using the error vector signal. The error vector signal may be computed in different ways depending on whether or not carrier frequency offset and carrier phase offset are assumed to be present in the received baseband signal.

Abstract: System and method for managing and specifying hardware implementation of a graphical program. A graphical program that implements an algorithm is stored in a memory of a computer system. The graphical program meets one or more first specified implementation requirements and is targeted for deployment to a programmable hardware element. A plurality of sets of descriptive directives are also stored in the memory, where the descriptive directives are associated with the graphical program and specify one or more additional specified implementation requirements, e.g., memory resource implementations, optimization directives, and so forth, where the additional directives result from programmatic and/or user-specification. Each set of descriptive directives is useable by a synthesis tool to generate a respective hardware configuration program for deployment to the graphical programmable hardware element.

Abstract: System and method for performing program-related operations over a network via a web browser. A network connection is established between a server computer and a client computer over a network. A universal resource identifier (URI) is sent from the client computer to the server computer over the network, where the URI indicates a program, e.g., a graphical program (GP), or at least a portion of a graphical program interactive development environment (GPIDE), e.g., a graphical program editor, an execution engine, a static or dynamic analyzer, and/or compiler. The at least a portion of the GPIDE is received from the server computer over the network in response to the URI, and executed in a web browser of the client computer to perform some specified functionality with respect to the GP.

Abstract: A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters). The readings obtained by the ADCs may be compared to a setpoint, which may be set in a digital loop controller (DLC). The DLC may be used to produce an output to drive a DAC (digital-to-analog converter) until the output voltage and/or output current and/or a function thereof reach the respective desired levels. The DLC may perform a threshold check to determine if the output current is outside a specified measurable range, and generate an override signal to drive the DAC to rapidly return the output current to the measurable range. Once the current is within the measurable range, the DAC may once again be driven according to the respective digital control loops for the output voltage and the output current.

Abstract: Systems and methods for measuring transmitter and/or receiver I/Q impairments are disclosed, including iterative methods for measuring transmitter I/Q impairments using shared local oscillators, iterative methods for measuring transmitter I/Q impairments using intentionally-offset local oscillators, and methods for measuring receiver I/Q impairments. Also disclosed are methods for computing I/Q impairments from a sampled complex signal, methods for computing DC properties of a signal path between the transmitter and receiver, and methods for transforming I/Q impairments through a linear system.

Abstract: A system and method for deploying one or more graphical programs on a personal digital assistant (PDA). One or more selected graphical programs may be programmatically converted to an executable format that can be executed by the portable computing device. For example, the graphical programs may be initially represented as a plurality of data structures that define or specify the operation of the respective graphical programs, and conversion software program may operate to access these data structures from memory and convert the data structures to an executable format suitable for the portable computing device. The executable may be transferred to the portable computing device for execution.

Abstract: Various embodiments of a system and method for creating and controlling a model of a sensor device for a computer simulation are disclosed. Sensor information specifying physical properties of the sensor device may be received, and a model of the sensor device may be automatically generated using the sensor information. An electrical circuit simulation may be performed using the model of the sensor device. The system and method may enable the user to interactively change the sensor device model during the simulation. The user may interact with a graphical user interface during the simulation to provide input specifying a change in one or more physical properties of the sensor device. In response to the user input, the model of the sensor device may be dynamically modified during the simulation to simulate the change in the one or more physical properties of the sensor device.

Abstract: A system may include a processing unit executing program instructions (SW), a data acquisition (DAQ) hardware device for acquiring sample data and/or generating control signals, and host memory configured to store data samples and various data associated with the DAQ and processor operations. The DAQ device may push HW status information to host memory upon being triggered by predetermined events taking place in the DAQ device, e.g. timing events or interrupts, to avoid or reduce SW reads to the DAQ device. The DAQ device may update dedicated buffers in host memory with status data on any of these events. The status information pushed to memory may be read in a manner that allows detection of race conditions. Interrupts generated by the DAQ device may be similarly handled. Upon generating an interrupt, the DAQ device may gather information required to handle the interrupt, and push the information into system memory, along with information identifying the interrupt.

Abstract: System and method for configuring wires in and/or debugging a statechart. The statechart may be created or displayed on a display and may include a plurality of state icons connected by wires. The state icons may represent states and the wires may represent transitions between the states. One or more of the wires may be configured, e.g., according to user input. A graphical program may be created which specifies a debugging operation for the statechart. The statechart may be executed and may provide data to the graphical program. The graphical program may receive first data produced by the statechart, e.g., during execution. The graphical program may perform the debugging operation based on the first data.

Abstract: A system and method for configuring a hardware device to execute a prototype is presented. The hardware device may include a programmable hardware element and/or a processor and memory. The prototype may comprise a software entity operable to perform a plurality of executable operations, wherein the prototype is created by a user without requiring user programming. For example, a prototyping environment may provide a library of operations that are specific to a particular problem domain and may enable the user to select various operations from the library for inclusion in the prototype. The prototyping environment may include a graphical user interface that is streamlined for interactively experimenting with various parameters or properties associated with the selected operations and seeing the effects of adjusting the parameters.

Abstract: Various embodiments of communication devices and associated methods for reducing I/Q impairments in signals used by the communication devices are described. A transmitter device 206 may perform filtering (or matrix multiplication) on digital I and Q signals to pre-correct them before converting them into analog I and Q signals. The pre-correction may pre-compensate for I/Q impairments which have not been introduced yet, but which will subsequently be introduced during digital to analog conversion, I/Q modulation, or other processing that occurs to produce a transmission signal from the original digital I and Q signals. A receiver device may receive a transmission signal, produce digital I and Q signals from it, and perform filtering on the digital I and Q signals to correct I/Q impairments at a plurality of frequency offsets.

Abstract: System and method for vectorizing combinations of program operations. Program code is received that includes a combination of individually vectorizable program portions that collectively implement a first computation. Each individually vectorizable program portion has at least one array input and at least one array output. The combination of individually vectorizable program portions is transformed into a single vectorizable program portion that is or includes a functional composition of the combination of individually vectorizable program portions. Vectorized executable code implementing the first computation is generated based on the single vectorizable program portion. The generated executable code is directed to SIMD (Single-Instruction-Multiple-Data) computing units of a target processor.

Abstract: System and method for synchronizing devices. A device reads a first counter coupled to and associated with a master clock and a second counter coupled to and associated with the device, where the device is one of one or more devices coupled to the master clock and each other via a switched fabric, where each device includes a respective clock, and is coupled to and associated with a respective second counter. Each of the first counter and the second counters is accessible by each of the one or more devices. The device determines a difference between the device's associated second counter and the first counter, and determines and stores a time reference for the device relative to the master clock based on the determined difference, where the time reference is useable to timestamp events or synchronize future events.