Abstract: Various embodiments are described of devices and associated methods for processing a signal using a plurality of vector signal analyzers (VSAs). An input signal may be split and provided to a plurality of VSAs, each of which may process a respective frequency band of the signal, where the respective frequency bands have regions of overlap. Each VSA may adjust the gain and phase of its respective signal such that continuity of phase and magnitude is preserved through the regions of overlap. The correction of gain and phase may be accomplished by a complex multiply with a complex calibration constant. A complex calibration constant may be determined for each VSA by comparing the gain and phase of one or more calibration tones generated with each region of overlap, as measured by each of the VSAs.

Abstract: System and method for editing a graphical diagram. A graphical diagram, such as a graphical program, is displayed on a display device. User input may be received editing the graphical diagram, thereby generating an edited graphical diagram. Placement of one or more elements in the graphical diagram may be adjusted in response to the editing based on determined forces applied to the one or more elements in the edited graphical diagram based on the said editing, resulting in an adjusted edited graphical diagram. The adjusted edited graphical diagram may be displayed on the display device, which may include displaying an animation illustrating the movement of the elements to an equilibrium state in which the forces balance and movement ceases. The editing, adjusting, and displaying may be performed sequentially and/or concurrently, as desired.

Abstract: System and method for convergence analysis. One or more state variables of a first program may be determined based on dependencies of variables in a first program. A second program corresponding to the first program is created based on the state variables and their dependencies, and executed multiple times. Each execution may include recording values of the state variables, determining an execution count, comparing the values to corresponding values from previous executions of the second program, and terminating the executing in response to the values matching corresponding values from at least one previous execution of the second program. A convergence property for the first program is determined based on the execution count, and indicating a number of executions of the first program required to generate all possible values of the one or more variables. The convergence property is stored, and may be useable to optimize the first program.

Abstract: Techniques are disclosed related to determining delay in a radio frequency (RF) communications device configured to perform envelope tracking. The RF communications device may comprise a power amplifier and an envelope tracker. First and second input stimuli signals may be transmitted to each of the power amplifier and envelope tracker, respectively. The RF communications device may output, by the power amplifier, an output signal to a vector signal analyzer (VSA). The VSA may determine a first delay offset by cross-correlating the output signal with a reference signal, and the VSA may determine a second delay offset based on an amplitude distortion of the output signal. A relative delay between the first and second input stimuli signals may be determined based on a difference between the first and second delay offsets.

Abstract: Embodiments are described of devices and methods for processing a signal using a plurality of vector signal generators (VSGs). A digital signal may be provided to a plurality of signal paths, each of which may process a respective frequency band of the signal, the respective frequency bands having regions of overlap. The gain and phase of each signal path may be adjusted such that continuity of phase and magnitude are preserved through the regions of overlap. The adjustment of gain and phase may be accomplished by a complex multiply with a complex calibration constant. The calibration constant may be determined for each signal path by comparing the gain and phase of one or more calibration tones generated within each region of overlap. Each signal path may comprise a VSG to convert the respective signal to an analog signal, which may be combined to obtain a composite signal.

Abstract: Techniques are disclosed relating to use of digital predistortion in the context of full-duplex radio. In some embodiments, an apparatus includes one or more antennas and is configured to simultaneously transmit and receive wireless signals via at least partially overlapping frequency resources using the one or more antennas. In some embodiments, the apparatus includes receive chain circuitry that is configured to process both wireless signals transmitted by the apparatus via the one or more antennas and over-the-air wireless signals from one or more other computing devices. In some embodiments, the apparatus includes one or more processing elements configured to determine one or more digital predistortion parameters based on the wireless signals transmitted by the apparatus via the one or more antennas and processed by the receive chain circuitry and apply predistortion to transmitted wireless signals based on the one or more digital predistortion parameters.

Abstract: Systems and methods for mapping a time-based data acquisition (DAQ) to an isochronous data transfer channel of a network. A buffer associated with the isochronous data transfer channel of the network may be configured. A clock and a local buffer may be configured. A functional unit may be configured to initiate continuous performance of the time-based DAQ, transfer data to the local buffer, initiate transfer of the data between the local buffer and the buffer at a configured start time, and repeat the transferring and initiating transfer in an iterative manner, thereby transferring data between the local buffer and the buffer. The buffer may be configured to communicate data over the isochronous data transfer channel of the network, thereby mapping the time-based DAQ to the isochronous data transfer channel of the network.

Abstract: The present invention relates to a method for calibrating a receiver device or a stimulus-response system comprising a receiver device. The method comprises the steps of generating at least one tone with a repeatable and known phase value, said at least one tone being stepped in frequency to cover a given set of calibration tones, and applying the at least one tone to the receiver device or to the stimulus-response system, generating a reference signal, which is phase-coherent with the at least one tone, to measure in a phase-coherent way with the receiver device or with the stimulus-response system the at least one tone, measuring at least the phase of the at least one tone using the receiver device or the stimulus-response system, determining at least phase-related information for calibration coefficients at the given set of calibration tones by calculating a phase deviation of the measured phase from the known phase value of the at least one tone.

Abstract: A switching element that is at least partially implemented in one or more printed wiring boards (PWBs). A plurality of inputs and a plurality of outputs may be integrated into the PWB(s). In some embodiments, a plurality of contact bars may also be comprised in respective contact bar pockets bounded at least partially ab at least one of the PWB(s). The switching element is selectively operable in first and second states, the first state in which at least one contact bar couples one of the plurality of inputs to one of the plurality of outputs such that an analog signal input to the respective input is routed to the respective output and the second state in which at least one contact bar is held in an off state.

Abstract: When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.

Abstract: Various embodiments are described of devices and associated methods for processing a signal using a plurality of vector signal analyzers (VSAs). An input signal may be split and provided to a plurality of VSAs, each of which may process a respective frequency band of the signal, where the respective frequency bands have regions of overlap. Each VSA may adjust the gain and phase of its respective signal such that continuity of phase and magnitude is preserved through the regions of overlap. The correction of gain and phase may be accomplished by a complex multiply with a complex calibration constant. A complex calibration constant may be determined for each VSA by comparing the gain and phase of one or more calibration tones generated with each region of overlap, as measured by each of the VSAs.

Abstract: A connector is disclosed. The connector includes a conductive housing. The conductive housing includes a wall region enclosing a space for receiving an adapter. The conductive housing also includes an annular end piece extending radially inward from a first end of the wall region and terminating the space. The annular end piece includes a flat annular surface, and a raised deformable annulus mounted on the flat annular surface. The raised deformable annulus is of a height such that an insertion of the adapter into the space deforms the raised deformable annulus to generate a physical contact connection between the flat annular surface and the adapter.

Abstract: System and method for controlling thread execution via time monitoring circuitry in a processing element. Execution of a thread may be suspended via a thread suspend/resume logic block included in the processing element in response to a received suspend thread instruction. An indication of a wakeup time may be received to a time monitoring circuit (TMC) included in the processing element. Time may be monitored via the TMC using a clock included in the processing element, until the wakeup time obtains.

Abstract: Test executive system and method of use. The system includes a test executive engine, configured to execute at least one test executive sequence to test at least one unit under test (UUT), a process model that specifies one or more function sequences for pre-test or post-test functionality for the test executive sequences, and a plug-in framework, configured to selectively incorporate one or more process model plug-in instances in the process model. Each process model plug-in instance specifies at least one respective function sequence for pre-test or post-test functionality for the test executive sequences.

Abstract: A fully-automated system suitable for use in a hospital setting for filling patient-specific liquid prescriptions to be administered by oral syringes on a just-in-time basis. The system enables hospital pharmacists to simplify and streamline their task, increasing the number of prescriptions that can be filled in a day, improving patient safety and care by minimizing medication errors and the consequences that ensue.

Abstract: In a real-time application, one or more computational tasks execute according to a time schedule and use input data from input devices and/or output data from output devices. One or more of the input devices or output devices may be unscheduled devices that attempt to access the peripheral bus at unscheduled times. Such unscheduled bus access can cause the time schedule to become comprised. Various methods for arbitrating access to the bus to better integrate the bus access with the time schedule followed by the application are described.

Abstract: An improved receiver system may include an input to receive an input signal, and a signal generating circuit to generate a desired oscillator signal that is a single sideband radio frequency signal of time varying frequency. The receiver may also include a downconversion stage to generate an intermediate frequency (IF) signal based on the input signal and the desired oscillator signal. A signal processing block in the receiver may be used to produce an output signal based on the IF signal by frequency shifting the IF signal by an amount that compensates for the time varying frequency of the desired oscillator signal. The desired oscillator signal may be generated using a vector signal generator that receives a control value from the signal processing block, converts the control value to a pair of analog input signals, and generates the desired oscillator signal by quadrature modulating the pair of analog input signals.

Abstract: Systems/methods for computing a power spectral density estimate for a noise signal. Where the noise signal appears in two channels (a single channel), n successive data acquisitions from the two channels (the single channel) are used to compute n respective cross (power) spectral densities, which are then averaged. The averaged cross (power) spectral density may then be smoothed in the spectral domain. The magnitude of the smoothed cross (power) spectral density comprises an estimate for the noise power spectral density. An effective number of independent averages may be computed based on the number n, the time-domain window applied to the acquired sample sets, the amount of overlap between successive sample sets, and the shape of the frequency-domain smoothing function. A statistical error bound (or uncertainty measure) may be determined for the power spectral density estimate based on the effective number of averages and the averaged single-channel and cross-channel spectral estimates.

Abstract: The present invention relates to a system for calibrating and for synchronizing a receiver. The system is arranged for receiving a reference clock signal in a first and a second signal path and comprises generator means for generating in the first signal path a first plurality of phase coherent tones derived from said reference clock signal and for generating in the second signal path a second plurality of phase coherent tones derived from said reference clock signal, said second plurality of phase-coherent tones being at lower frequencies than said first plurality of phase-coherent tones, and gating means for gating said first plurality of phase coherent tones by said second plurality of phase-coherent tones, such that the phase-coherent tones of said second signal path appear in a distorted version around tones of said plurality of phase-coherent tone of said first signal path, and for outputting a resulting gated signal.

Abstract: System and method for communicatively coupling a serial communication plug to a serial communication bus. The system may include a housing. The housing may include a receptacle that is configured to communicatively couple to a bus. The receptacle may include one or more internal retention springs situated inside the receptacle. The one or more internal retention springs may be configured to grip a male plug with a retention force, when the male plug is inserted into the receptacle. The housing may include or may be coupled to a clamp where the clamp is external to the receptacle. When the male plug is inserted into the receptacle, the clamp may be adjustable via a clamp adjustment mechanism to constrain the one or more internal retention springs, thus augmenting the retention force and further securing the male plug in the receptacle.