Abstract: System and method for developing a circuit for QR decomposition with auxiliary functionality. A first function is included in a first program. The first function is configurable to specify an auxiliary function to be performed by a modified QR decomposition circuit in addition to QR decomposition of a matrix A into two matrices Q and R using a Modified Gram Schmidt process. A second program is automatically generated based on configuration of the QR decomposition and the first function. The second program includes program code implementing the QR decomposition and the auxiliary function for the first function in the first program. A hardware configuration program (HCP) may be automatically generated based on the first program, including the second program, where the HCP is deployable to hardware, e.g., a programmable hardware element, thereby implementing the modified QR decomposition circuit, including the QR decomposition of the matrix A and the auxiliary function.

Abstract: A switch system having a plurality of switch inputs, a plurality of switch outputs, a switch matrix comprising a plurality of N×N switching elements to selectively couple one or more of the plurality of switch inputs to one or more of the plurality of switch outputs during use to provide one or more paths for routing signals from one or more of the switch inputs to one or more of the switch outputs during use.

Abstract: System and method for rendering data with specified constraints. A request for data from a data set may be received. The data set may include time-stamped historical data, including multiple reduced data sets, each having a respective resolution. The request may specify a time frame. A first reduced data set of the reduced data sets may be determined based on the specified time frame. First data from the first reduced data set corresponding to the specified time frame may be retrieved, and are usable for display on a display device. The data set may be generated from received raw data, where the raw data includes time-stamped historical data at a first resolution. The raw data may be reduced via multiple stages, thereby generating the reduced data sets at their respective resolutions. The reduced data are generated and represented in a way that is visually pleasing and technically accurate.

Abstract: A front-end circuit for measurement devices, for example oscilloscopes or digitizers, may implement DC gain compensation using a programmable variable resistance. A MOS transistor may be configured and operated as a linear resistor with the ability to self-calibrate quickly, while compensating for temperature variations. An integrated CMOS-based variable resistor may be thereby used for an analog adjustable attenuator. Master and slave CMOS transistors may be operated in linear mode, and temperature effects on the linear transistors may be compensated for by using an integral loop controller (current controller) configured around the master MOS transistor. Circuits implemented with the compensated variable resistance have a wide range of adjustment with a control voltage, and may be used in the front-end (circuits) of an oscilloscope or digitizer, or in any other circuit and/or instrumentation benefitting from an adjustable attenuator.

Abstract: Devices and methods for synchronizing devices over a switched fabric. A master device maintains a global time, determines a mapping between the global time and a counter of a switch over a memory-mapped fabric, and sends the mapping to a slave device. A slave device maintains a local time, determines a first mapping between the local time and a counter of a switch, receives a second mapping between the counter and a global time of the master device, and synchronizes its local time to the global time based on the first and second mappings. The master and slave device may map their times to the counter by sending respective request packets to the switch and receiving respective completion packets including respective counter values from the switch. The master and slave device may determine respective time values corresponding to the respective counter values based on in-switch delays of the packets.

Abstract: System and method for performing program-related operations over a network via a web browser. A network connection is established between a server computer and a client computer over a network. A universal resource identifier (URI) is sent from the client computer to the server computer over the network, where the URI indicates a program, e.g., a graphical program (GP), or at least a portion of a graphical program interactive development environment (GPIDE), e.g., a graphical program editor, an execution engine, a static or dynamic analyzer, and/or compiler. The at least a portion of the GPIDE is received from the server computer over the network in response to the URI, and executed in a web browser of the client computer to perform some specified functionality with respect to the GP.

Abstract: Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module.

Abstract: When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.

Abstract: Systems and methods for interoperating between a time-sensitive (TS) network and a non-time-sensitive (NTS) network. The system may include a TS network switch and a TS network interface controller (NIC). Each may have a functional unit. A first port of the TS switch may be coupled to an NTS node of the NTS network and its functional unit may be configured to manage insertion and removal of tags associating packets received from the NTS network with the NTS network. The tagged packets may be forwarded on to the TS NIC via a second port. The functional unit of the TS NIC may be configured to queue tagged packets received from the TS network switch and queue and tag packets destined for the NTS network via the TS network switch.

Abstract: A method and system for scheduling a time critical task. The system may include a processing unit, a hardware assist scheduler, and a memory coupled to both the processing unit and the hardware assist scheduler. The method may include receiving timing information for executing the time critical task, the time critical task executing program instructions via a thread on a core of a processing unit and scheduling the time critical task based on the received timing information. The method may further include programming a lateness timer, waiting for a wakeup time to obtain and notifying the processing unit of the scheduling. Additionally, the method may include executing, on the core of the processing unit, the time critical task in accordance with the scheduling, monitoring the lateness timer, and asserting a thread execution interrupt in response to the lateness timer expiring, thereby suspending execution of the time critical task.

Abstract: Performing sequencing of a polynucleotide. A first image of microparticles that are distributed in a random fashion on a substrate may be received. Each of the microparticles may include a plurality of similar oligonucleotides of the polynucleotide. A second image of the microparticles may be received. A plurality of first subportions of the first image may be determined. Each subportion may include a respective plurality of microparticles distributed in a random fashion. The second image may be analyzed to identify a plurality of second subportions in the second image. Each of the plurality of second subportions may correspond to a respective one of the plurality of first subportions. A plurality of the microparticles may be matched from the first and second images based on said analyzing. At least a portion of the sequence of nucleotides of the polynucleotide may be determined based on said matching.

Abstract: A touch-gesture wiring method for connecting data flow wires to input/output terminals of nodes in a graphical program is described. The method may be implemented by a graphical programming application that executes on a mobile device that includes a touch-sensitive screen configured to receive user input as touch gestures. The method may aid the user by displaying a magnified view of the input/output terminals that makes it easier (relative to the default view of the graphical program) for the user to see the input/output terminals and/or easier to select a desired one of the input/output terminals.

Abstract: Performing power quality and synchrophasor analysis on a resampled signal. A first signal may be initially received which corresponds to a power system. The first signal may have a plurality of cycles and may have a frequency that varies over time. One or more parameters may be determined from the first signal. Based on the one or more parameters, the first signal may be resampled to produce an even angle signal. Various power quality measurements may be performed on the even angle signal. Similarly, further processing may be performed to perform synchrophasor measurements, e.g., to determine phasor, frequency, and/or rate of frequency change for the first signal. In some embodiments, the resampling processing elements (e.g., circuitry, programmable hardware elements, processors and memories, etc.) may be shared between the two analyses.

Abstract: System and method for editing a graphical diagram. A graphical diagram, such as a graphical program, is displayed on a display device. User input may be received editing the graphical diagram, thereby generating an edited graphical diagram. Placement of one or more elements in the graphical diagram may be adjusted in response to the editing based on determined forces applied to the one or more elements in the edited graphical diagram based on the said editing, resulting in an adjusted edited graphical diagram. The adjusted edited graphical diagram may be displayed on the display device, which may include displaying an animation illustrating the movement of the elements to an equilibrium state in which the forces balance and movement ceases. The editing, adjusting, and displaying may be performed sequentially and/or concurrently, as desired.

Abstract: System and method for streaming data. A host device that includes a server may acquire data from a data source. The server may receive a request for data from at least one client device over a network via a lossless transmission protocol, wherein the request may specify a range of data to stream to the at least one client device. The server may stream the data over the network to the at least one client device via the lossless transmission protocol in accordance with the request. The at least one client device may receive and process the streamed data.

Abstract: A 2×2 switching element that includes first and second relays each having a first terminal, a second terminal and a third terminal, wherein the first and second relays each operate between a first state to connect the first terminal to the second terminal and a second state to connect the first terminal to the third terminal. The second terminals and third terminals, respectively, of the first and second relays are coupled to one another. The 2×2 switching element is selectively operable between: a first switching state where the first relay is operated in the first state and the second relay is operated in the second state, and a second switching state where the first relay is operated in the second state and the second relay is operated in the second state.

Abstract: System and method for editing a graphical diagram. A graphical diagram, such as a graphical program, is displayed on a display device. User input may be received editing the graphical diagram, thereby generating an edited graphical diagram. Placement of one or more elements in the graphical diagram may be adjusted in response to the editing based on determined forces applied to the one or more elements in the edited graphical diagram based on the said editing, resulting in an adjusted edited graphical diagram. The adjusted edited graphical diagram may be displayed on the display device, which may include displaying an animation illustrating the movement of the elements to an equilibrium state in which the forces balance and movement ceases. The editing, adjusting, and displaying may be performed sequentially and/or concurrently, as desired.

Abstract: A system and method for rearranging algebraic expressions occurring in program code based on a scheme of ranking operands. The system scans program code to identify an algebraic expression specified by the program code. The expression includes binary operations, scalar operands and at least one array operand. The system operates on the algebraic expression to obtain a final expression by: computing a rank for each of the operands; and performing algebraic transformations on selected subexpressions of the algebraic expression so that in the final expression operands are combined in the order of their rank. The ranking scheme may be designed to force scalars to be combined before arrays, and/or, to force constants to be combined first, loop invariants second, and variants last. In some embodiments, the ranking scheme is a vector ranking scheme including two or more components (such as invariance rank, dimensional rank and data-size rank).

Abstract: The first and second outputs of a signal generation system are coupled to the first and second inputs of a signal digitizing system via respective electrical conductors. A controller directs the generation system to generate a first calibration signal, and the digitizing system responsively captures a first set of vector samples. The conductors are then reconfigured so they connect the first and second outputs of the generation system respectively to the second and first inputs of the digitization system. The controller then directs the generation system to generate a second calibration signal, and the digitizing system responsively captures a second set of vector samples. The controller or other processing agent computes gain and/or phase impairments using the first and second vector sample sets. Digital filter parameters may be computed based on the computed impairment(s), and used to correct the impairment(s) of the generation system and/or the digitizing system.

Abstract: When compiling high level, graphical code (e.g. LabVIEW™ code) representative of a design, parts of the code that do not depend on external input data may be executed during the compilation process. Specific variables and/or value traces of specific variables in the program, e.g. constant values and/or repeating patterns may be recorded then analyzed, and certain transformations may be applied in the compilation process according to the results of the analysis, thereby optimizing the design. In one approach, the graph may be dynamically stepped through one node at a time, and it may be determined whether all inputs to the stepped-through node are known. If those inputs are known, type conversion and the operation corresponding to the stepped-through node may be dynamically performed. In another approach, a subset of the graphical code not depending on external data may be compiled and executed, thereby obtaining the same results as described above.