Abstract: A system and method for path provisioning in a network calculates an optimal path using a greedy algorithm with backtracking to execute service level agreements (SLAs). More specifically, a sequential path shifting (SPS) algorithm compares a cost of a suboptimal path for a present quadruplet with the cost of switching a path for a previous quadruplet configured for alteration. If the present path is already an optimal path, then no further operations are performed. However, if the cost of a suboptimal path is greater than the switching cost, the previous path is altered so that an optimal path may be configured for the present quadruplet. Otherwise, the present quadruplet maintains its existing path. The capacity of the network is iteratively adjusted to compensate for path selection. The present system may be applied to a differentiated services network or an optical network.

Abstract: A technique for reducing ATM call blocking is provided that splits wideband connections into multiple low-bandwidth sub-connections and routing them independently through the network. Fragmented network bandwidth is used for supporting calls which are otherwise blocked by conventional routing. A detailed cell-level design for the split scheduling algorithms is provided. A system for implementing splitting without requiring any protocol changes within the network is provided. Such a system modifies the control plane protocols only within the end-stations.

Abstract: The present invention includes a generic monitoring system and method having a generic core that includes a logical control layer, various network adaptors at a network adaptor layer and application specific modules at a graphical interface layer. The generic core has the essential components, operational model and functionalities that are common across monitoring tools. Network adaptors glue the core to different kinds of active networks so that messages from the active networks can be translated into a format understood by the core. Application specific modules are used to customize the user interfaces and event handling functions so that the generic monitoring system and method can be tailored to individual application needs. The present invention can be applied to multiple active packet networks with minimum adaptation or modification of the generic core.

Abstract: A method and apparatus for allocating bits to subchannels in a discrete multitone environment. The method employs the use of precalculated and prestored look-up tables which take into account a desired bit error rate, signal-to-noise ratio gap for a particular coding scheme, and gain scaling factor. This eliminates the need for the communication device to conduct complex and time consuming calculations. During the training sequence portion of data communication channel establishment, the measured signal-to-noise ratio for each subchannel is compared with values in the precalculated look-up tables to determine the bit allocation for that subchannel. The bit allocation value is stored in a data structure in the communication device. A gain scaling factor for each subchannel is then determined and stored as a data structure. The bit allocation and gain scaling data can then be transmitted to a partner communication device in order to instruct the transmitter how to load each subchannel.

Abstract: A method, system and a computer product for a new partial scan technique that incurs significantly less overhead than the full-scan technique and yet achieves very high test coverage in short CPU times are provided. Scan memory elements are selected so that the scanned circuit satisfies two key properties in the test mode. First, the scanned circuit has partitions that are peripherally interacting finite state machines (peripheral partitions). Second, the memory element dependency graph (S-graph) of each peripheral partition of the scanned circuit has a tree structure. An efficient for algorithm peripheral partitioning and tree decomposition is provided. The scan memory element selection algorithm iteratively partitions the S-graph into disjoint sub-graphs with the tree structure.

Abstract: The present invention is built upon an active network framework and an ontology-based information hierarchy, and, in addition to the features found in current network models, it provides a symmetrical framework for information filtering and binding in the network. Queries from information requesters are directly routed to relevant information sources and contents from information providers are distributed to the destinations that expressed an interest in the information. The query packets and content packets can carry commands that are executed at the active network nodes encountered by the packets as they traverse the network.

Abstract: Public wireless communications will increasingly extend into wireless LAN (WLAN) environments in order to meet the ubiquitous access, high data rate, and local services demands of future Internet appliances. By relying on IP-level services mechanisms, the Public Access Mobility LAN (PAMLAN) can simultaneously support different air interfaces, franchises for multiple services providers, and a multi-segment LAN environment including handoffs. The PAMLAN supports virtual operator LANs representing different network services providers, authorization and accounting mechanism, support of multiple air interfaces, and local IP mobility. A router associated with each base station realizes this highly distributed IP networking environment, and a QoS-enabled switched Ethernet core supports virtual networks and QoS services.

Abstract: This disclosure teaches a method of Boolean satisfiability checking (SAT) for a circuit. The method comprises identifying inactive clauses in the conjunctive normal form (CNF) of the circuit and removing the inactive clauses from the CNF.

Abstract: The power consumption of interconnects starts to have a significant impact on a system's total power consumption. Besides increasing buses (length, width) etc. this is mostly due to deep sub-micron effects where coupling capacitances between bus lines (wire-to-wire) are in the same order of magnitude as the base capacitances (wire-to-metal-layer). At that point, encoding schemes that solely address the minimization of transitions for the purpose of power reduction do not effectively work any more. Using a physical bus model that accurately models coupling capacitances, a signal bus encoding/decoding apparatus with encoding schemes that are partially adaptive and that take coupling effects into consideration is presented. The encoding schemes do not assume any a priori knowledge that is particular to a specific application.

Abstract: A method for Boolean Satisfiability (SAT). The method comprises using a variable decision heuristic in a SAT algorithm and pruning the search space of SAT using said decision heuristic. The decision heuristic is based on partitioning a conjunctive normal form (CNF) of a Boolean formula corresponding to the SAT and the partitioning is induced by a separator set. An image computaion method that uses the disclosed method for solving the SAT.

Abstract: A method and apparatus for efficient query expansion using reduced size indices and for progressive query processing. Queries are expanded conceptually, using semantically similar and syntactically related words to those specified by the user in the query to reduce the chances of missing relevant documents. The notion of a multi-granularity information and processing structure is used to support efficient query expansion, which involves an indexing phase, a query processing and a ranking phase. In the indexing phase, semantically similar words are grouped into a concept which results in a substantial index size reduction due to the coarser granularity of semantic concepts. During query processing, the words in a query are mapped into their corresponding semantic concepts and syntactic extensions, resulting in a logical expansion of the original query. Additionally, the processing overhead is avoided.

Abstract: A method and system of crosstalk mitigation in integrated circuits employs delay change curves (DCCs) and uses targeted transistor sizing and/or buffer insertion. Based on a timing graph, a longest path capable of being shortened may be shortened by victim strengthening or aggressor weakening when a setup requirement time violation occurs and the path is capable of being shortened. The process is repeated based on an updated timing graph until the longest path is not capable of being further shortened, or there is no setup requirement time violation. Additionally, the path may be lengthened where a hold requirement time violation has occurred and the path is capable of being lengthened, by victim strengthening or aggressor weakening, until the path cannot be further lengthened or there is no hold requirement time violation. Victim strengthening is performed by altering the critical path, and aggressor weakening is performed by altering the non-critical path.

Abstract: A method of generating a vector set, said vector set being used for testing sequential circuits. The method comprises selecting a plurality of fault models, identifying a fault list each for each of said plurality of fault models, identifying a vector set each for each of said fault lists, selecting a tolerance limit each for each of said fault lists, thereby each fault model having an associated fault list, an associated vector set and an associated tolerance limit, compacting each of said vector set such that the compacted vector set identifies all the faults in the associated fault list or a drop in fault list coverage is within the associated tolerance limit; and creating a vector set by combining all vector sets compacted. A system and a computer program product for testing circuits with a compacted vector set where the compacted vector set is created by dropping faults based on a tolerance limit.

Abstract: A mechanism that allows sharing of an existing infrastructure for access to public or private IP networks, such as the public Internet or private LANs is provided. Specifically, infrastructure owners lease the infrastructure resources on a short-term basis to different Internet Service Providers (ISPs). An ISP uses these resources to provide Internet services to subscribing customers or users. The ISP controls all aspects of the Internet service provided to the subscriber, including billing, bandwidth management, and e-mail. The ISP also ensures privacy for the subscriber by means of encryption. Leasing network resources from an existing network infrastructure frees the ISP from building an expensive access infrastructure itself while the infrastructure owner is given an opportunity to generate additional revenue from infrastructure. Importantly, neither the user, nor the ISP need to trust the access station (i.e.: the access station is untrusted) through which the access to the IP network is accomplished.

Abstract: A method of creating models for power estimation of a circuit comprising generating an input space for the circuit. The input space is separated into multiple power modes corresponding to regions that display similar power behavior. Separate power models are generated for each of said multiple power modes. A power mode identification function is created that selects an appropriate power model from the separate power models based on the present and past values of the circuit inputs.

Abstract: A circuit comprising a plurality of components sharing at least one shared resource, and a lottery manager. The lottery manager is adapted to receive request for ownership for said at least one shared resource from a subset of the plurality of components. Each of the subset of the plurality of components are assigned lottery tickets. The lottery manager is adapted to probabilistically choose one component from the subset of the plurality of components for assigning said at least one shared resource. The probabilistic choosing is weighted based on a number of lottery tickets being assigned to each of the subset of the plurality of components.

Abstract: A pipeline scheduler provides a minimum bandwidth guarantee by transporting cells from an input port to an output port in a two-phased approach. Cells that conform to a minimum cell rate (MCR) are selected from queues at the input port and arranged into supercells for transport to the output port, followed by nonconforming cells, to guarantee fairness by using scheduling modules to build the supercells first for conforming cells, and then for nonconforming cells. Reservation vectors are used to permit the same time slot of the next frame to be reserved by a first queue, and the same time slot of the following time frame to be held for reservation by a second queue, to ensure equal time slot access by the first and second queues over successive time frames.

Abstract: A buffer management scheme for an ATM switch where the static and dynamic thresholds are applied appropriately at different levels to ensure efficient and fair usage of buffer memory. A novel dynamic threshold mechanism which, while ensuring fair sharing of memory, maximizes the overall memory utilization.

Abstract: Systems and methods create high quality audio-centric, image-centric, and integrated audio-visual summaries by seamlessly integrating image, audio, and text features extracted from input video. Integrated summarization may be employed when strict synchronization of audio and image content is not required. Video programming which requires synchronization of the audio content and the image content may be summarized using either an audio-centric or an image-centric approach. Both a machine learning-based approach and an alternative, heuristics-based approach are disclosed. Numerous probabilistic methods may be employed with the machine learning-based learning approach, such as naïve Bayes, decision tree, neural networks, and maximum entropy. To create an integrated audio-visual summary using the alternative, heuristics-based approach, a maximum-bipartite-matching approach is disclosed by way of example.

Abstract: A method and apparatus for implementing communication between literals and clauses of a Boolean SAT problem through use of a time-multiplexed pipelined bus architecture rather than hardwiring it using on-FPGA routing resources. This technique allows the circuits for different instances of the Boolean SAT problem to be identical except for small local differences. Incremental synthesis and place-and-route effort required for each instance of the Boolean SAT problem becomes negligible compared to the time to actually solve the SAT problem. The time-multiplexing feature allows dynamic addition of clauses into the SAT solver algorithm. The pipeline architecture is highly pipelined with very few long wires and no wires crossing FPGA boundaries, thereby providing high clock speeds.