Patents Assigned to NEC
-
Publication number: 20100124383Abstract: Systems and methods are disclosed for generating super resolution images by building a set of multi-resolution bases from one or more training images; estimating a sparse resolution-invariant representation of an image, and reconstructing one or more missing patches at any resolution level.Type: ApplicationFiled: May 20, 2009Publication date: May 20, 2010Applicant: NEC LABORATORIES AMERICA, INC.Inventors: Jinjun Wang, Shenghuo Zhu, Yihong Gong
-
Publication number: 20100123199Abstract: Provided is a semiconductor device including: a semiconductor substrate; a multi-layered wiring structure which is formed over the semiconductor substrate and in which a plurality of wiring layers, each of which is formed by a wiring and an insulating layer, are laminated; and a capacitive element having a lower electrode, a capacitor insulating layer, and an upper electrode which is embedded in the multi-layered wiring structure, wherein at least two or more of the wiring layers are provided between a lower capacitor wiring connected to the lower electrode and an upper capacitor wiring connected to the upper electrode.Type: ApplicationFiled: November 6, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: Jun Kawahara, Yoshihiro Hayashi, Ippei Kume
-
Publication number: 20100122617Abstract: The dicing machine includes a rotary blade with a rotating shaft, applicable to processing a work, and a disk-shaped presser rotatably supported by the rotating shaft on a side of the blade, so as to roll on an upper face of the work independently from the blade.Type: ApplicationFiled: November 16, 2009Publication date: May 20, 2010Applicant: NEC Electronics CorporationInventor: Nobuyuki Mori
-
Publication number: 20100123249Abstract: A semiconductor device includes an insulating film, a trench which is formed in the insulating film, a barrier metal film which is formed on a sidewall and a bottom surface of the trench, and is composed of an alloy of titanium (Ti) and tantalum (Ta), and a copper (Cu) wiring which is stacked on the barrier metal film, and located in the trench. A titanium concentration of the barrier metal film is equal to or more than 0.1 at % and equal to or less than 14 at %.Type: ApplicationFiled: August 27, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Koichi MOTOYAMA
-
Publication number: 20100124125Abstract: A nonvolatile memory device includes a memory cell that stores data by presence or absence of electrons accumulated in a floating gate, a read reference current generator that generates a read reference current for reading data from the memory cell based on a constant current from a constant current generator included therein, and a read voltage generator that generates a read voltage to be applied to a control gate of the memory cell during data reading. The read reference current generator generates a monitor voltage that varies according to variation of the read reference current and a threshold voltage of the memory cell. The read voltage generator generates the read voltage based on the monitor voltage.Type: ApplicationFiled: November 17, 2009Publication date: May 20, 2010Applicants: NEC ELECTRONICS CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Masakazu AMANAI, Masahiko KASHIMURA, Yoshihiro NAGAI, Masato TAKI, Norihiro HONDA, Kazushi YAMANAKA
-
Publication number: 20100123173Abstract: A semiconductor device includes a three-dimensional structure that extends in a channel direction, a stress film having residual stress acting on a first side surface of the three-dimensional structure, a gate insulating film that is formed over a second side surface of the three-dimensional structure, and a gate electrode that covers the three-dimensional structure with the gate insulating film interposed therebetween and extends in a direction in which the first and second side surfaces are opposite to each other. The three-dimensional structure has a channel region between a source electrode and a drain electrode.Type: ApplicationFiled: October 20, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Masayasu Tanaka
-
Publication number: 20100124245Abstract: A semiconductor laser has a semiconductor substrate, a lower cladding layer formed on the semiconductor substrate, an active layer disposed above the lower cladding layer, a first upper cladding layer disposed above the active layer, a second upper cladding layer disposed above the first upper cladding layer and having a mesa structure, a high-order mode filter layer formed on both side faces of the second upper cladding layer, continuously extending from the both side faces onto at least a part of a side region on both sides of the second upper cladding layer and having a band gap not exceeding a band gap of the active layer, and a block layer formed on the high-order mode filter layer and on a side region on both sides of the second upper cladding layer and including a layer having a band gap greater than a band gap of the active layer.Type: ApplicationFiled: November 13, 2009Publication date: May 20, 2010Applicant: NEC Electronics CorporationInventor: Masahide KOBAYASHI
-
Publication number: 20100123253Abstract: An exemplary embodiment of the present invention is a semiconductor device having a regular layout region and an irregular layout region formed on one chip, including: a lower conductive layer; an interlayer insulating film formed on the lower conductive layer; an upper interconnect layer formed on the interlayer insulating film; and connection plugs disposed to electrically connect the lower conductive layer and the upper interconnect layer at a substantially shortest distance. In at least part of the regular layout region, the lower conductive layer and the upper interconnect layer are electrically connected to each other through at least two connection plugs and an intermediate connection layer for electrically connecting the at least two connection plugs, the at least two connection plugs being disposed at an immediately above position extending from immediately above the lower conductive layer and a shift position spaced apart from the immediately above position, respectively.Type: ApplicationFiled: November 10, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Hideyuki OOKA
-
Publication number: 20100123541Abstract: A reactor is composed of a coil and a core placed in the inside area and outer peripheral area of the coil in a container. The core is composed of magnetic powder, non-magnetic powder, and resin. The nom-magnetic powder is composed of main component powder and low elastic modulus powder. The main component powder as a main component of the non-magnetic powder is made of one or more kinds of powder of a heat conductivity which is larger than that of the resin. The low elastic modulus powder is made of one or more kinds of powder of an elastic modulus which is smaller than that of the powder forming the main component powder.Type: ApplicationFiled: November 16, 2009Publication date: May 20, 2010Applicants: DENSO CORPORATION, NEC TOKIN CORPORATIONInventors: Kenji SAKA, Takashi Yanbe
-
Publication number: 20100123200Abstract: Provided is a semiconductor device which includes, on the same semiconductor substrate, a first FET and a second FET higher in threshold voltage than the first FET. The first FET includes a first gate insulating film and a first gate electrode. The second FET includes a second gate insulating film and a second gate electrode. The first gate electrode, the second gate insulating film, and the second gate electrode contain at least one metal element selected from the group consisting of Hf, Zr, Al, La, Pr, Y, Ta, and W. Concentration of the at least one metal element at an interface between the second gate insulating film and the second gate electrode in the second FET is higher than concentration of the at least one metal element at an interface between the first gate insulating film and the first gate electrode in the first FET.Type: ApplicationFiled: November 5, 2009Publication date: May 20, 2010Applicant: NEC Electronics CorporationInventor: Gen Tsutsui
-
Publication number: 20100124377Abstract: Systems and methods are disclosed to classify an input image by determining a spatial-pyramid image representation based on sparse coding; determining a descriptor for each interest point in the input image; encoding the descriptor; and applying max pooling to form the spatial pyramid representation of images.Type: ApplicationFiled: May 20, 2009Publication date: May 20, 2010Applicant: NEC LABORATORIES AMERICA, INC.Inventors: Kai Yu, Jianchao Yang, Yihong Gong
-
Publication number: 20100123223Abstract: A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.Type: ApplicationFiled: November 18, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: Fuminori ITO, Yoshihiro HAYASHI
-
Publication number: 20100123825Abstract: To provide a video signal processing device and a video signal processing method capable, for progressive signals that are input after undergoing various conversion processes, of maintaining the quality of the output progressive signals at a fixed level. A video signal processing device in accordance with an exemplary aspect of the present invention includes a detection unit that detects the conversion history of an input progressive signal, and a signal restoration unit that re-converts a progressive signal according to a detection result detected by the detection unit. The signal restoration unit includes a conversion unit that re-converts an input progressive signal, and a selector that selects and outputs a progressive signal re-converted by the conversion unit and an input progressive signal according to a detection result of the detection unit.Type: ApplicationFiled: November 2, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Ming Shao
-
Publication number: 20100123863Abstract: To provide a transflective liquid crystal display apparatus that employs in-plane switching mode (in-plane switching system), which exhibits a reflection property of wide view angles. Provided is a transflective liquid crystal display apparatus which comprises: a reflective area and a transmissive area; an uneven reflective plate provided in the reflective area; a flattening film laminated on the uneven reflective plate; and common electrodes and pixel electrodes arranged on the flattening film, wherein, the uneven reflective plate comprises a diffusive reflecting function that is capable of diffusely reflecting light making incident at an incident angle of 30 degrees towards directions at exit angles of 0-10 degrees, and a surface of the flattening film is set to be substantially flat.Type: ApplicationFiled: January 25, 2010Publication date: May 20, 2010Applicant: NEC LCD TECHNOLOGIES, LTD.Inventors: Kenichi Mori, Michiaki Sakamoto, Daisuke Inoue, Kenichirou Naka, Hiroshi Nagai
-
Publication number: 20100124131Abstract: Provided is a delay adjustment device that contributes to downsizing the circuit that adjusts a flight time. The delay adjustment device is connected to a memory, and adjusts a timing to retrieve data with a data signal and a data strobe signal output from the memory. The delay adjustment device includes a data retrieve unit that receives the data signal and the data strobe signal, and outputs a data value of the data signal in accordance with the data strobe signal; and a control unit that issues a read command to the memory, calculates a flight time, and controls a valid period of the data strobe signal based on the flight time.Type: ApplicationFiled: November 2, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Satoshi Onishi
-
Publication number: 20100123218Abstract: This invention provides a method of forming semiconductor films on dielectrics at temperatures below 400° C. Semiconductor films are required for thin film transistors (TFTs), on-chip sensors, on-chip micro-electromechanical systems (MEMS) and monolithic 3D-integrated circuits. For these applications, it is advantageous to form the semiconductor films below 400° C. because higher temperatures are likely to destroy any underlying devices and/or substrates. This invention successfully achieves low temperature growth of germanium films using diboran. First, diboran gas is supplied into a reaction chamber at a temperature below 400° C. The diboran decomposes itself at the given temperature and decomposed boron is attached to the surface of a dielectric, for e.g., SiO2, forming a nucleation site and/or a seed layer. Second, source gases for semiconductor film formation, for e.g., SiH4, GeH4, etc., are supplied into the chamber, thereby forming a semiconductor film.Type: ApplicationFiled: November 14, 2008Publication date: May 20, 2010Applicant: NEC CORPORATIONInventors: Munehiro TADA, Krishna SARASWAT
-
Publication number: 20100123244Abstract: Provided are a semiconductor device capable of reducing stress due to a density difference in the arrangement of bumps, and a method of manufacturing the semiconductor device. The semiconductor device includes: a wiring board including an electrode terminal group; a semiconductor chip including a bump formation surface where a bump group is formed and being mounted on the wiring board by using the bump group. The bump formation surface includes a first region where an area density of a region having bumps arranged therein is a first density, a second region where an area density of a region having bumps arranged therein is a second density lower than the first density, and a third region provided in a border portion between the first and second regions. In the third region, an area density of a region having bumps arranged therein is above the second density and below the first density.Type: ApplicationFiled: October 14, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Kunihiro Takeda
-
Publication number: 20100123191Abstract: Provided is a method of manufacturing a semiconductor device, that buried gate electrodes are formed in a pair of trenches in a substrate, so as to be recessed from the level of the top end of the trenches, a base region is formed between a predetermined region located between the pair of trenches, and a source region is formed over the base region.Type: ApplicationFiled: November 19, 2009Publication date: May 20, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: ATSUSHI KANEKO
-
Patent number: 7719509Abstract: In a liquid crystal display driving circuit, upon time-sharing output of gray scale voltages from an amplifier of an output circuit for each unit pixel composed of three sub-pixels of red (R), green (G) and blue (B) in the output sequence of R, G and B, a data matching detector compares gray scale data corresponding to R, G and B sub-pixels for each unit pixel and, it they match in all pixels of each scan line, a driving time of the amplifier is set such that G output interval and B output interval are shorter than R output interval at the top by an output control signal AS output from a control signal generator.Type: GrantFiled: October 27, 2006Date of Patent: May 18, 2010Assignee: NEC Electronics CorporationInventor: Yoshiyuki Tanaka
-
Patent number: 7719360Abstract: Disclosed is a variable gain circuit, which operates in a region where the gain varies substantially exponentially with respect to a control voltage, having an operation region in which the gain varies substantially with an exponential function {(?{square root over (1?x)}??{square root over (2)})2+K}/{(?{square root over (1+x)}??{square root over (2)})2+K} where 0?K?1 and x is a variable corresponding to the control voltage. The denominator and the numerator of the above function are given by a first sum current and a second sum current, respectively. The first sum current is a sum of the drain current of a first transistor and a constant current, and the second sum current is a sum of the drain current of a second transistor and the constant current. The first and second transistors have sources grounded, having gates connected common and supplied with a bias voltage, and having back-gates supplied with control voltages differentially.Type: GrantFiled: August 18, 2008Date of Patent: May 18, 2010Assignee: NEC Electronics CorporationInventor: Katsuji Kimura