Patents Assigned to NEC
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Publication number: 20100028767Abstract: A stacked secondary battery is formed by laying plate-shaped positive electrodes and plate-shaped negative electrodes one on the other by way of separators, wherein a collector is disposed at the front end of the end facet of each of the positive electrodes or the negative electrodes as viewed in a direction orthogonal relative to the stacking direction and has an active substance layer formed on the collector by applying slurry of particles of an active substance with a gap separating it from the front end or the electrode active substance layer is made to show a thickness varying from the front end toward the inside.Type: ApplicationFiled: July 29, 2009Publication date: February 4, 2010Applicant: NEC TOKIN CORPORATIONInventors: Tsuyoshi Inose, Takao Daidoji
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Publication number: 20100027435Abstract: In a station placement design of a scheme which assigns an address to each wireless station when a network is configured, the station placement design is enabled to ensure that addresses can be assigned. A wireless system designing method is a wireless system designing method for designing a wireless system having a mode in which an address is assigned to each wireless station when a network is formed, wherein a link quality is estimated between respective wireless stations which are installed within a predetermined region, and it is confirmed whether or not an address can be assigned to each wireless station in a topology which is formed only with links which are estimated to have link qualities equal to or higher than a predetermined level.Type: ApplicationFiled: October 25, 2007Publication date: February 4, 2010Applicant: NEC CORPORATIONInventor: Wataru Domon
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Publication number: 20100026730Abstract: A driver of a display device has an output buffer, a frame control circuit outputting a frame switch signal with respect to each frame, and an offset compensation control circuit outputting an offset compensation control signal to the output buffer in response to the frame switch signal. One frame includes a display period and a non-display period. In normal processing, the frame control circuit receives a first vertical synchronizing in one frame and outputs the frame switch signal from the receipt of the first vertical synchronizing signal to before the non-display period within the same frame. In special processing, the frame control circuit further receives a second vertical synchronizing signal in the non-display period in one frame, and further outputs the frame switch signal for a time from the receipt of the second vertical synchronizing signal to before the non-display period in the next frame.Type: ApplicationFiled: July 28, 2009Publication date: February 4, 2010Applicant: NEC Electronics CorporationInventor: Shigeki Okutani
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Publication number: 20100027586Abstract: A controlling unit disposed in a PLL circuit controls a phase interpolator to gradually change a phase shift amount applied to a phase shift signal C_PS by a unit of basic delay amount ? at a timing predetermined in accordance with a modulation profile of an SSC. Further, the controlling unit controls a total phase shift amount applied to the phase shift signal C_PS output from the phase interpolator in one period of a feedback clock signal C_FB obtained by dividing frequency of the phase shift signal C_PS in a way that a difference between the total phase shift amount and a total phase shift amount in a previous one period of C_FB is always equal to or less than the basic delay amount ?.Type: ApplicationFiled: July 9, 2009Publication date: February 4, 2010Applicant: NEC Electronics CorporationInventors: Kazuo Ogasawara, Masao Nakadaira
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Publication number: 20100025248Abstract: An electrophoresis chip capable of suppressing the drift phenomenon is provided. The electrophoresis chip includes a channel which separates a sample by isoelectric focusing electrophoresis and a plurality of columnar structures disposed all over the channel. The columnar structures are disposed such that the flow of a sample solution, which moves in the longitudinal direction of the channel, is disturbed.Type: ApplicationFiled: August 3, 2009Publication date: February 4, 2010Applicant: NEC CorporationInventor: Wataru HATTORI
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Publication number: 20100026791Abstract: To provide an image display device in which reflection of an image on one display surface onto another display surface is suppressed. In an image display device where an image is displayed on a screen combining the display surfaces of two or more image display elements, a polarizing plate is arranged on the display surface on conditions that extinction takes place between the display surfaces of the image display elements. The extinction conditions are set such that the light entering from a display surface to which the polarizing plate is fixed is passed through and the light entering from other than the above display surface is absorbed by intersecting the polarization directions of the polarizing plates perpendicularly.Type: ApplicationFiled: March 5, 2008Publication date: February 4, 2010Applicant: NEC CORPORATIONInventor: Hiroshi Imai
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Publication number: 20100026404Abstract: A voltage-controlled oscillator is provided with inductor 7a arranged between a power supply and a ground; and a variable capacitive section 56 that configures a resonator circuit with inductor 7a. Variable capacitive section 56 is provided with first and second control terminals 1, 2 to which a voltage is applied to change the capacitance. Variable capacitive section 56 includes first variable capacitive element 9a wherein one terminal is connected to first control terminal 1 and the other terminal is connected to second control terminal 2; and second variable capacitive element 10a wherein one terminal is connected to second control terminal 2 and the other terminal is connected between the inductor and the ground.Type: ApplicationFiled: January 22, 2008Publication date: February 4, 2010Applicant: NEC CORPORATIONInventor: Kenichi Hosoya
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Publication number: 20100025760Abstract: A semiconductor device includes a MOSFET cell having a super junction structure and a diode cell connected in parallel with the MOSFET cell and having the same plan shape as the MOSFET cell. The MOSFET cell includes an epitaxial layer of a first conductivity type formed on a semiconductor substrate, a gate electrode and a first column region of a second conductivity type formed in the epitaxial layer, a first base region of the second conductivity type formed on a surface of the epitaxial layer, and a source region of the first conductivity type formed on a surface of the first base region. The diode cell includes a second column region of the second conductivity type formed in the epitaxial layer and having a larger width than the first column region, and a second base region of the second conductivity type formed on the surface of the epitaxial layer.Type: ApplicationFiled: July 9, 2009Publication date: February 4, 2010Applicant: NEC Electronics CorporationInventor: Yoshiya KAWASHIMA
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Publication number: 20100026679Abstract: A booster circuit is provided with a boosting section and a control circuitry. The boosting section includes a boosting capacitor element and is configured to perform charging operation to accumulate charges across the boosting capacitor element and to perform boosting operation to boost an output voltage by using charges accumulated in the boosting capacitor element. The control circuitry controls the boosting section to alternately perform the charging and boosting operations in response to a boosting clock signal and the output voltage. The control circuitry prohibits performing the charging and boosting operations in response to whether a selected line of dot pixels is an odd-numbered line or an even-numbered line in a display panel.Type: ApplicationFiled: July 28, 2009Publication date: February 4, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Hirofumi Fujiwara
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Publication number: 20100025816Abstract: A width of a region where each of the N wells is in contact with the buried P well is not more than 2 ?m. A ground voltage and a power supply voltage are applied to the P well and the N well, respectively. A decoupling capacitor is formed between the N well and the buried P well.Type: ApplicationFiled: July 1, 2009Publication date: February 4, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: Masayuki Furumiya, Hiroaki Ohkubo, Yasutaka Nakashiba
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Publication number: 20100029237Abstract: A radio receiving apparatus includes a detection unit and a directivity changing unit. The detection unit detects an occurrence of intermodulation interference to a desired signal demodulated based on received signals received by a plurality of antenna elements. The directivity changing unit changes a reception directivity pattern of the plurality of antenna elements to another pattern having a null direction different from a null direction obtained before the directivity pattern is changed, in accordance with detection of the occurrence of the intermodulation interference by the detection unit.Type: ApplicationFiled: July 29, 2009Publication date: February 4, 2010Applicants: NEC ELECTRONICS CORPORATION, NEC CORPORATIONInventors: Yuji Yamamoto, Osamu Hosyuyama
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Publication number: 20100028002Abstract: Implementations of the present principles include methods, systems and apparatuses for transmitting data through a sub-carrier multiplexing and orthogonal frequency-division multiple access passive optical network. In accordance with aspects of the present principles, a plurality of optical network units are assigned electrical carrier frequency bandwidths that are narrower than a system capacity bandwidth. Modulation of optical waves transmitted between an optical line terminal and each optical network unit is conducted on different orthogonal sub-carrier frequencies within the assigned bandwidths such that sampling of said orthogonal sub-carrier frequencies is limited to the assigned electrical carrier frequency bandwidths. The waves are thereafter received and demodulated for the extraction of data.Type: ApplicationFiled: August 1, 2008Publication date: February 4, 2010Applicant: NEC LABORATORIES AMERICA, INC.Inventors: Dayou Qian, Junqiang Hu, Philip Nan Ji, Ting Wang
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Publication number: 20100031081Abstract: Hard discs constituting a disc array system are arranged at locations far from one another so as to eliminate their simultaneous damage due to a local disaster and concentration of the processing load thereby suppressing the recovery time upon hard disc failure. It is possible to realize continuous operation without system down even when the other disasters have occurred. A plurality of hard disc devices are arranged at different locations far from one another, write-in data from a server device is mapped by the RAID method, and a data packet added by the RAID information and the error correction code is distributed to the respective hard discs. Moreover, the line connection device for performing data transfer to the hard disc device has the RAID control function while the main control device is dedicated to monitoring of the hard disc devices and data recovery process upon occurrence of a failure.Type: ApplicationFiled: September 10, 2009Publication date: February 4, 2010Applicant: NEC CorporationInventor: Masaki Yasuhara
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Publication number: 20100027514Abstract: There is provided a wireless communication system capable of requesting activation from a host without reserving a time slot for performing data transfer. There is provided a wireless communication system provided with a host 1 and devices (2-1) to (2-n) which perform wireless communication with the host 1. The devices (2-1) to (2-n) transmit a remote activation notification requesting activation of the host 1 during a beacon period which is a period for reserving a time slot for performing data transfer. When receiving the remote activation notification from the devices (2-1) to (2-n), the host 1 returns from a sleep state to an active state.Type: ApplicationFiled: July 9, 2009Publication date: February 4, 2010Applicant: NEC Electronics CorporationInventor: TOMOFUMI HIGASHIDE
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Publication number: 20100026258Abstract: The present invention provides a semiconductor integrated circuit which can reduce power consumption without hampering operation of a CPU. A power supply control circuit 40 installed separately from a CPU 10 detects a signal (e.g., an idle signal Si) from the CPU 10 installed on a semiconductor chip 1. In response to the idle signal Si, the power supply control circuit 40 controls supply of a source voltage Vp to the CPU 10 by controlling a switch element 30—1. This makes it possible to control power supply efficiently without hampering the operation of the CPU 10.Type: ApplicationFiled: July 14, 2009Publication date: February 4, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: MIYUKI SATOU
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Publication number: 20100025737Abstract: A field-effect transistor according to the present invention includes a source electrode that is formed in an active region, and a drain electrode that is formed in the active region. Further, the field-effect transistor includes a gate electrode that is formed in the active region and disposed between the source electrode and the drain electrode, a field plate electrode that is formed in a vicinity of the gate electrode outside a region disposed between the gate electrode and the source electrode, and an FP pad that is included in the FP electrode, the FP pad being formed outside the active region and being grounded.Type: ApplicationFiled: July 28, 2009Publication date: February 4, 2010Applicant: NEC ELECTRONICS CORPORATIONInventor: Kouji Ishikura
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Publication number: 20100030554Abstract: A first matrix (W(k)) indicating frequency characteristics of a separation filter is calculated from input signals of a plurality of channels. A second matrix (Ws(k)) is calculated by using the restriction coefficients (Ci(k)) for restricting the separation filter and the first matrix, and separation filter coefficients (wsij(s)) are calculated by using the second matrix. With use of the separation filter coefficients, separation signals (ysi(t)) are then calculated from the input signals. A third matrix (Ws?1(k)) is then calculated by transforming the second matrix into an inverse matrix at each frequency, and reproduction filter coefficients (a?I1(s), a?I2(s)) are calculated by using the third matrix. With use of the reproduction filter coefficients, the synthesized signal of each channel is calculated by using the separation signals.Type: ApplicationFiled: December 7, 2007Publication date: February 4, 2010Applicant: NEC CorporationInventor: Toshiyuki Nomura
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Publication number: 20100025222Abstract: Provided are a method of forming pores in a graphitic carbon nanomaterial and a method of introducing an oxygen-containing group into the pores, in which the rate of pore formation in the wall of a graphitic carbon nanomaterial can be heightened and the amount of the oxygen-containing group, especially the carboxyl group to be introduced can be significantly increased. The method of forming pores in a graphitic carbon nanomaterial of the invention is characterized by forming pores in the wall of a graphitic carbon nanomaterial in the presence of an oxidizing agent while the nanomaterial is irradiated with a light from a light source including a light having a wavelength at which the oxidizing agent is activated.Type: ApplicationFiled: November 16, 2007Publication date: February 4, 2010Applicant: NEC CORPORATIONInventors: Sumio Iijima, Masako Yudasaka, Minfang Zhang
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Publication number: 20100027609Abstract: An equalization filter is provided for solving the problem in which there is a limited range in which compensated for distortion of a transmission signal can be made. Measuring instrument 104 measures a distortion quantity which characterizes distortion of the transmission signal. Comparator 105a generates a differential signal which indicates the difference between the transmission signal and a compensation signal. Delay device 105b delays the differential signal based on the distortion quantity measured by measurement instrument 104 and generates the compensation signal.Type: ApplicationFiled: November 30, 2007Publication date: February 4, 2010Applicant: NEC CORPORATIONInventor: Shigeki Wada
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Publication number: 20100025685Abstract: A method of forming a contact hole in an insulating film coating amorphous Si having an irregular surface formed on an insulating substrate, for connecting the amorphous Si to a conductor film formed on the insulating film includes etching the insulating film using reactive ion etching to a depth whereat the irregularity does not disappear, and sputter-etching by physically colliding Ar radicals produced by Ar gas plasma discharge onto the surface of the amorphous Si.Type: ApplicationFiled: September 24, 2009Publication date: February 4, 2010Applicant: NEC CORPORATIONInventor: Hitoshi Shiraishi