Patents Assigned to Netlist, Inc.
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Patent number: 7619912Abstract: A memory module connectable to a computer system includes a printed circuit board, a plurality of memory devices coupled to the printed circuit board, and a logic element coupled to the printed circuit board. The plurality of memory devices has a first number of memory devices. The logic element receives a set of input control signals from the computer system. The set of input control signals corresponds to a second number of memory devices smaller than the first number of memory devices. The logic element generates a set of output control signals in response to the set of input control signals. The set of output control signals corresponds to the first number of memory devices.Type: GrantFiled: September 27, 2007Date of Patent: November 17, 2009Assignee: Netlist, Inc.Inventors: Jayesh R. Bhakta, Jeffrey C. Solomon
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Patent number: 7619893Abstract: A heat spreader is provided for use with an electronic module. The electronic module has a first side with a first plurality of electronic components mounted thereon and a second side with a second plurality of electronic components mounted thereon. The heat spreader includes a first segment mountable on the module to be in thermal communication with at least one electronic component mounted on the first side, and to be substantially thermally isolated from at least one electronic component mounted on the first side. The heat spreader further includes a second segment mountable on the module to be in thermal communication with the at least one electronic component mounted on the first side that is substantially thermally isolated from the first segment.Type: GrantFiled: February 16, 2007Date of Patent: November 17, 2009Assignee: Netlist, Inc.Inventor: Enchao Yu
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Publication number: 20090201711Abstract: A memory module includes a plurality of memory devices and a circuit. Each memory device has a corresponding load. The circuit is electrically coupled to the plurality of memory devices and is configured to be electrically coupled to a memory controller of a computer system. The circuit selectively isolates one or more of the loads of the memory devices from the computer system. The circuit comprises logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module.Type: ApplicationFiled: March 20, 2009Publication date: August 13, 2009Applicant: Netlist, Inc.Inventors: Jeffrey C. Solomon, Jayesh R. Bhakta
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Patent number: 7532537Abstract: A memory module includes a plurality of memory devices and a circuit. Each memory device has a corresponding load. The circuit is electrically coupled to the plurality of memory devices and is configured to be electrically coupled to a memory controller of a computer system. The circuit selectively isolates one or more of the loads of the memory devices from the computer system. The circuit comprises logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module.Type: GrantFiled: January 19, 2006Date of Patent: May 12, 2009Assignee: Netlist, Inc.Inventors: Jeffrey C. Solomon, Jayesh R. Bhakta
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Patent number: 7442050Abstract: A circuit card includes a rigid portion having a first plurality of contacts configured to be in electrical communication with a plurality of memory devices. The circuit card further includes a flexible connector coupled to the rigid portion. The flexible connector has a first side and a second side. The flexible connector comprises a dielectric layer, a second plurality of contacts configured to be in electrical communication with a substrate, and a plurality of electrical conduits on the first side of the flexible connector and extending from the rigid portion to the second plurality of contacts. The plurality of electrical conduits is in electrical communication with one or more contacts of the first plurality of contacts and with the second plurality of contacts. The flexible connector further includes an electrically conductive layer on the second side of the flexible connector.Type: GrantFiled: August 28, 2006Date of Patent: October 28, 2008Assignee: Netlist, Inc.Inventors: Jayesh R. Bhakta, Enchao Yu, Chi She Chen, Richard E. Flaig
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Patent number: 7375970Abstract: A module is electrically connectable to a computer system. The module includes at least one multilayer structure having a plurality of electrical contacts which are electrically connectable to the computer system. The module further includes a first printed circuit board coupled to the at least one multilayer structure. The first printed circuit board has a first surface and a first plurality of components mounted on the first surface. The first plurality of components is in electrical communication with the electrical contacts. The module further includes a second printed circuit board coupled to the at least one multilayer structure. The second printed circuit board has a second surface and a second plurality of components mounted on the second surface. The second plurality of components is in electrical communication with the electrical contacts. The second surface of the second printed circuit board faces the first surface of the first printed circuit board.Type: GrantFiled: July 9, 2007Date of Patent: May 20, 2008Assignee: Netlist, Inc.Inventors: Robert S. Pauley, Jayesh R. Bhakta, William M. Gervasi, Chi She Chen, Jose Delvalle
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Patent number: 7289386Abstract: A memory module connectable to a computer system includes a printed circuit board, a plurality of memory devices coupled to the printed circuit board, and a logic element coupled to the printed circuit board. The plurality of memory devices has a first number of memory devices. The logic element receives a set of input control signals from the computer system. The set of input control signals corresponds to a second number of memory devices smaller than the first number of memory devices. The logic element generates a set of output control signals in response to the set of input control signals. The set of output control signals corresponds to the first number of memory devices.Type: GrantFiled: July 1, 2005Date of Patent: October 30, 2007Assignee: Netlist, Inc.Inventors: Jayesh R. Bhakta, Jeffrey C. Solomon
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Patent number: 7286436Abstract: A memory module comprises a plurality of memory components. Each memory component has a first bit width. The plurality of memory components are configured as one or more pairs of memory components. Each pair of memory components simulates a single virtual memory component having a second bit width which is twice the first bit width.Type: GrantFiled: March 7, 2005Date of Patent: October 23, 2007Assignee: Netlist, Inc.Inventors: Jayesh R. Bhakta, Jeffrey Solomon, William M. Gervasi
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Patent number: 7254036Abstract: A module is electrically connectable to a computer system. The module includes a frame having an edge connector with a plurality of electrical contacts which are electrically connectable to the computer system. The module further includes a first printed circuit board coupled to the frame. The first printed circuit board has a first surface and a first plurality of components mounted on the first surface. The first plurality of components is electrically coupled to the electrical contacts of the edge connector. The module further includes a second printed circuit board coupled to the frame. The second printed circuit board has a second surface and a second plurality of components mounted on the second surface. The second plurality of components is electrically coupled to the electrical contacts of the edge connector. The second surface of the second printed circuit board faces the first surface of the first printed circuit board.Type: GrantFiled: April 7, 2005Date of Patent: August 7, 2007Assignee: Netlist, Inc.Inventors: Robert S. Pauley, Jayesh R. Bhakta, William M. Gervasi, Chi She Chen, Jose Delvalle
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Publication number: 20060138630Abstract: An arrangement of ball grid array packages includes a flexible circuit board having first and second opposed surfaces defining a central portion to which first and second side portions are flexibly attached. A first package has a first array of solder ball pins attached to the first surface of the circuit board in the central portion thereof. A second package has first and second opposed surfaces and a second array of solder ball pins on the first surface that are attached to the second surface of the circuit board in the central portion thereof. A third array of solder ball pins is provided on each of the side portions on the first surface thereof. The side portions are folded underneath the second package and attached to the second surface thereof, whereby the third array of solder ball pins is oriented for attachment to a motherboard.Type: ApplicationFiled: December 21, 2005Publication date: June 29, 2006Applicant: NETLIST, INC.Inventor: Jayesh Bhakta
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Patent number: 6930900Abstract: Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.Type: GrantFiled: January 27, 2004Date of Patent: August 16, 2005Assignee: Netlist, Inc.Inventors: Jayesh R. Bhakta, Robert S. Pauley, Jr.
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Patent number: 6930903Abstract: Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.Type: GrantFiled: January 27, 2004Date of Patent: August 16, 2005Assignee: Netlist, Inc.Inventors: Jayesh R. Bhakta, Robert S. Pauley, Jr.
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Publication number: 20050094465Abstract: A memory module includes a plurality of memory components mounted on a printed circuit board, and a plurality of passive components embedded within the board directly underneath the memory components to minimize the space occupied by the passive components and the lengths of the required conductive traces. The passive components and the memory components are connected by conductor-filled vias between the contacts of the embedded components and the memory components mounted above them on the board surface. The passive components may be thick film resistors, either series damping resistors or differential damping resistors. By embedding the resistors directly beneath the memory components, there is enough space on the board to provide a set of termination resistors for each of the several memory components on the board, thereby eliminating the need for a single resistor to be shared by two or more memory components, resulting in more precise output signals.Type: ApplicationFiled: November 2, 2004Publication date: May 5, 2005Applicant: NETLIST INC.Inventors: William Gervasi, Jayesh Bhakta, Robert Pauley
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Patent number: 6873534Abstract: Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.Type: GrantFiled: January 30, 2004Date of Patent: March 29, 2005Assignee: Netlist, Inc.Inventors: Jayesh R. Bhakta, Robert S. Pauley, Jr.
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Publication number: 20050018495Abstract: Abstract of the Disclosure Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of one-Gigabyte, two-Gigabyte, and four-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in the first row on a first lateral portion of the printed circuit board and in the second row on the first lateral portion are connected to a first addressing register with two register integrated circuits. The integrated circuits in the first row on the second lateral portion and in the second row on the second lateral portion are connected to a second addressing register with two register integrated circuits. Each addressing register processes a non-contiguous subset of the bits in each data word.Type: ApplicationFiled: January 29, 2004Publication date: January 27, 2005Applicant: Netlist, Inc.Inventors: Jayesh Bhakta, Robert Pauley, William Gervasi
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Patent number: 6751113Abstract: Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.Type: GrantFiled: March 7, 2002Date of Patent: June 15, 2004Assignee: Netlist, Inc.Inventors: Jayesh R. Bhakta, Robert S. Pauley, Jr.