Patents Assigned to Neuralink Corp.
  • Patent number: 12653064
    Abstract: An implantable device and method of manufacture include a substantially hermetic polychlorotrifluoroethylene (PCTFE) enclosure with closely-spaced wires extending out of the enclosure. The implantable device includes a PCTFE first portion of an enclosure and a PCTFE second portion of the enclosure. The first and second portions are configured to mate with each other to form the enclosure. A plurality of insulated wires extend between the first and second portions of the enclosure. Each of the insulated wires are parallel to each other and separated by less than 150 micrometers (?m) from a neighboring wire. A thermal weld seam of PCTFE is disposed between the first portion of the enclosure and the second portion of the enclosure and conformally adheres around insulation of each wire such that the enclosure is sealed.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: June 9, 2026
    Assignee: Neuralink Corp.
    Inventors: John W.F. To, Ik Soo Kwon, Dongjin Seo, Yu Niu (Peter) Huang, Jiahao Guo, Robin E. Young, Joshua Scott Hess, Zachary M. Tedoff, Russell N. Ohnemus, Dominic A. Herincx
  • Patent number: 12547711
    Abstract: Systems and methods confirm a wireless pairing between an implanted device, such as a neural implant, and an external device, such as a computer or mobile device. The implanted device receives signals from the external device, which may be a varying magnetic field or a set of neural signals. The implanted device decodes the signals to identify a pairing code. Based on determining the pairing code, the implanted device may use this to perform a method of pairing which is not vulnerable to man-in-the-middle attacks. Alternatively, the implanted device can securely provide a pairing code to a helper device which can surface the pairing code to the user for confirmation.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: February 10, 2026
    Assignee: NEURALINK CORP.
    Inventor: Julian C. Borrey
  • Patent number: 12550780
    Abstract: Methods of manufacturing a sealed electrical device for embedded integrated circuit (IC) chips are described, as well as the resulting devices themselves. The sealed electrical device is created by removing material from a substrate to form a pocket in the substrate. An unencapsulated, or bare, IC chip can be placed within the pocket with connection pads of the IC chip facing outward. A gap between the IC chip and a side of the pocket can be filled with a filler. An uncured polymer can be cast over the substrate, which can be allowed to cure into a flat polymer sheet. Conductive traces can be patterned on the polymer sheet and to the connection pads of the IC chip. The conductive traces can then be coated with polymer to form a ribbon cable. Substrate can then be removed from underneath the ribbon cable, leaving substrate around the pocket to protect the IC chip.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: February 10, 2026
    Assignee: Neuralink Corp.
    Inventors: Supin Chen, Dongjin Seo, Abhivyakti Gautam, Zachary M Tedoff
  • Patent number: 12539083
    Abstract: Disclosed are biocompatible multi-electrode devices capable of being implanted in sensitive tissue, such as the brain, and methods for fabricating such arrays. The disclosed arrays can be implanted in living biological tissue with a single needle insertion. The devices can include linear arrays with contacts along an edge, linear arrays with multiple electrodes per opening in a parylene support layer, multi-thread electrode arrays, tree-like electrode arrays, and combinations thereof. In an embodiment, a compliant electrode apparatus can comprise a biocompatible and bio-implantable compliant dielectric having a top edge defined by a top and a side along a length of the dielectric, insulated electrical traces oriented along the length of the dielectric, and electrode contacts coupled to the traces and situated on the side along the length of the dielectric, wherein an exposed portion of a respective electrode contact protrudes beyond the top edge of the dielectric.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: February 3, 2026
    Assignee: Neuralink Corp.
    Inventors: Vanessa M. Tolosa, Zachary M. Tedoff, Timothy L. Hanson, Timothy J. Gardner, Camilo A Diaz-Botia, Supin Chen
  • Publication number: 20250357905
    Abstract: An amplifier circuit with a high pass filter is constructed to include an operational amplifier (op amp) with a feedback loop in which a capacitor is in parallel with a field effect transistor (FET) configured as a gate tunneling resistor. To configure as a gate tunneling resistor, the source and drain of the FET are tied together, and large resistance is provided through the thin oxide layer between the gate and the source/drain. A bias voltage to the FET can be provided through a separate FET, also configured as a gate tunneling resistor. Additional gate tunneling FETs, also in parallel with the capacitor, can be switched into the circuit in order to provide different resistances, and thus different corner frequencies of the filter. Bias voltages may be supplied by one or more gate tunneling FETs. A fully differential op amp can have complementary feedback loops from its differential outputs, each feedback loop employing one or more gate tunneling FETs.
    Type: Application
    Filed: May 16, 2024
    Publication date: November 20, 2025
    Applicant: Neuralink Corp.
    Inventors: Burak Eminoglu, SungWon Chung, Man-Chia Chen
  • Patent number: 12391032
    Abstract: The disclosure provides a method for fabricating a cantilever section in a structure, which includes providing a structure comprising a substrate, a compliant layer and a sacrificial layer therebetween; cutting part-way through the substrate to create an at least one linear partial cut; releasing the sacrificial layer from the structure; and breaking the substrate along the at least one linear partial cut to generate a cantilever section in a substrate.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: August 19, 2025
    Assignee: Neuralink Corp.
    Inventors: Yu Niu Huang, Peter J. Gilgunn, Dominic A. Herincx, Zachary M. Tedoff
  • Patent number: 12369863
    Abstract: Techniques for compressing neural signals are disclosed herein. The neural signal compression techniques can include lossless compression, lossy compression, binned spike compression, and spike-band power compression. Lossless compression can compress neural signals using a difference predictor to encode compressed neural signals via binary and unary coding. Lossy compression can compress neural signals using quantized wavelet transforms to generate an encoded bit-stream of compressed neural signals. Binned spike and spike-band power compression can leverage the sparse nature of neural signals to threshold the neural signals for generating an appended bit-stream of compressed neural signals.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: July 29, 2025
    Assignee: Neuralink Corp.
    Inventors: Kevin Dewald, Sonal Pinto, Avinash Jois, Aram Moghaddassi
  • Patent number: 12248629
    Abstract: Techniques for static and dynamic input multiplexing for high-density neural signal recording are disclosed herein. A multiplexer can receive a first set of neural signals via inputs. A subset of the first set of neural signals above a threshold can be determined. A group of the inputs corresponding to the subset of the first set of neural signals can be determined. Operation of the multiplexer can be modified to block inputs not in the identified group of the inputs. A second set of neural signals can be received into the multiplexer via the group of the inputs. The second set of neural signals can be transmitted to a plurality of channels of an amplifier while blocking inputs not in the identified group of the inputs. The second set of neural signals can be amplified using the amplifier. The amplified second set of neural signals can be transmitted for further processing.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: March 11, 2025
    Assignee: Neuralink Corp.
    Inventors: Do Yeon Yoon, Dongjin Seo, SungWon Chung
  • Publication number: 20240386571
    Abstract: A rapid, image processing algorithm for avoiding blood vessels in robotic surgery is disclosed in which a microscopic or other image of a target area is subject to a difference in Gaussians, among other filters, to detect the outlines of vasculature and then segmented. Projections from the borders of each vascular segment are arrayed to determine distances across the blood vessels from different points along the vascular segment. A single diameter is assigned to each vascular segment, and pixels within the segment are associated with the diameter. When a target coordinate is given, any pixel within a certain distance of the coordinate is polled in order to determine if it is part of a blood vessel above a certain size. If it is, then a robotic end effector is halted or redirected.
    Type: Application
    Filed: May 18, 2023
    Publication date: November 21, 2024
    Applicant: Neuralink Corp.
    Inventors: Gilbert I. Montague, Jose Carlos Gallego Fernández, Jacob M. Hoffman, Cenk Oguz Saglam
  • Patent number: 12142950
    Abstract: A set of shielded coils for wireless power transmission into a medical implant is described in which the external, power transmission coil is blocked at least on one side by a shield with a broken ring and radial fingers while the power receiver coil inside the medical implant is surrounded by a shield having a broken ring connecting radial fingers and ribs around its circumference. The finger and rib configurations minimizes eddy currents in the shields. A ground plane of the implant's internal circuitry, which is within the shield along with the receiver coil, can cap off the cupped receiver shield to form a Faraday cage with it. The metal or other conductive shielding prevents large electric fields from the coils from penetrating into the tissue of the subject while simultaneously allowing magnetic fields inductively couple the coils for charging.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: November 12, 2024
    Assignee: Neuralink Corp.
    Inventor: Lucia Fauth
  • Patent number: 12130326
    Abstract: Accelerated testing apparatuses for implants are described, as well as methods for accelerated testing implants. The accelerated testing apparatus includes a cabinet having multiple bays and a vessel insertable and removable from any of the multiple bays. The vessel includes a watertight basin, a radio-frequency (RF) transparent lid configured to mate with the basin, and a plurality of fixtures within the vessel. Each fixture is adapted to anchor a device-under-test while submersed within the vessel. The accelerated testing apparatus also includes a reservoir disposed within the cabinet, a heater connected with the reservoir, a pump configured to circulate liquid between the reservoir and the vessel, an antenna within the cabinet for communication with the device-under-test, and at least one computer server operatively connected with the antenna.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: October 29, 2024
    Assignee: Neuralink Corp.
    Inventors: Amir Mazaheripour, Joshua S. Hess, Andrew D. Wong, Amir M. Foudeh, Ava S. K. Greenwood, Alan R. Mardinly, Alejandro J. Tenorio, Ian C. C. Switzer
  • Patent number: 12042174
    Abstract: Systems and methods are disclosed for a lead, needle, and cannula that are sized and shaped for ease of needle threading and positioning, e.g., for implanting the lead into biological tissue. The lead has an opening at one end surrounded by an expanded region. The needle has a ledge in a side of the needle. The cannula has an exit gate with an aperture sized to accept the expanded region of the lead. A portion of the needle is held inside the cannula and can extend or retract therein. When the expanded region of the lead is threaded through the exit gate aperture, the needle is configured to extend through the opening of the lead and catch the lead on the ledge. The needle is further configured to extend past the exit gate of the cannula while pulling the lead through the slot and free of the aperture.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: July 23, 2024
    Assignee: Neuralink Corp.
    Inventors: Christine M. Odabashian, Ian M. O'Hara
  • Patent number: 12036626
    Abstract: Methods and systems of using a laser beam to weld an object with a non-flat surface, including curved surfaces, are described, where at least one piece of the object is transparent. An optical guide with a flat surface and an interface surface is placed on a piece of an object to welded. The interface surface is fabricated to form-fit the non-flat surface of the object to be welded, and is opposite the flat surface. A liquid optical medium is applied between the non-flat surface and the interface surface, filling any gaps or surface defects. The laser beam is then transmitted through the optical guide, liquid optical medium, and into the object to be welded, to a location to be welded. The laser beam then welds the object to be welded at pre-determined points.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: July 16, 2024
    Assignee: Neuralink Corp.
    Inventors: Joshua S. Hess, Emilienne M. Repak
  • Publication number: 20240232340
    Abstract: Systems and methods confirm a wireless pairing between an implanted device, such as a neural implant, and an external device, such as a computer or mobile device. The implanted device receives signals from the external device, which may be a varying magnetic field or a set of neural signals. The implanted device decodes the signals to identify a pairing code. Based on determining the pairing code, the implanted device may use this to perform a method of pairing which is not vulnerable to man-in-the-middle attacks. Alternatively, the implanted device can securely provide a pairing code to a helper device which can surface the pairing code to the user for confirmation.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 11, 2024
    Applicant: Neuralink Corp.
    Inventor: Julian C. Borrey
  • Patent number: 12020863
    Abstract: A coil formed from a flexible polymer substrate that is printed with metal traces is disclosed in which the flexible substrate has notches that align each loop as the substrate is wound into a ring. The notches are precisely spaced so that the diameter of each loop is well controlled. As the substrate is wound, adhesive is applied along its length to fill gaps between each loop's layer. Ideally, the adhesive has a similar dielectric constant as the polymer substrate. The resulting coil has loops of metal traces separated by precise a thickness of dielectric. The precision in spacing between metal layers and dielectric allows the coil to be designed for self-resonance.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: June 25, 2024
    Assignee: NEURALINK CORP.
    Inventors: Lucia Fauth, Joshua S. Hess
  • Publication number: 20240128222
    Abstract: Methods of manufacturing a sealed electrical device for embedded integrated circuit (IC) chips are described, as well as the resulting devices themselves. The sealed electrical device is created by removing material from a substrate to form a pocket in the substrate. An unencapsulated, or bare, IC chip can be placed within the pocket with connection pads of the IC chip facing outward. A gap between the IC chip and a side of the pocket can be filled with a filler. An uncured polymer can be cast over the substrate, which can be allowed to cure into a flat polymer sheet. Conductive traces can be patterned on the polymer sheet and to the connection pads of the IC chip. The conductive traces can then be coated with polymer to form a ribbon cable. Substrate can then be removed from underneath the ribbon cable, leaving substrate around the pocket to protect the IC chip.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 18, 2024
    Applicant: Neuralink Corp.
    Inventors: Supin Chen, Dongjin Seo, Abhivyakti Gautam, Zachary M . Tedoff
  • Patent number: 11944822
    Abstract: A space-saving configuration for electronics is disclosed in which at least four circuit boards are arranged to form sides of a five-or-greater sided geometric prism that are perpendicular to a common plane. That is, they are stood up on their sides and connected with flex cable to approximate a cylinder. Each circuit board can include one or more sides with electrical components. The circuit boards make up at least half of the five-or-greater sided geometric prism such that the circuit boards wrap at least halfway around. A common connector on one of the circuit boards can be configured to receive power from an underlying motherboard, and flex cables connecting adjacent circuit boards in series distribute power received from the connector to each of the circuit boards in series.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: April 2, 2024
    Assignee: NEURALINK CORP.
    Inventors: Joshua S. Hess, Mark J. Smith
  • Publication number: 20230382098
    Abstract: The disclosure provides a method for fabricating a cantilever section in a structure, which includes providing a structure comprising a substrate, a compliant layer and a sacrificial layer therebetween; cutting part-way through the substrate to create an at least one linear partial cut; releasing the sacrificial layer from the structure; and breaking the substrate along the at least one linear partial cut to generate a cantilever section in a substrate.
    Type: Application
    Filed: May 31, 2022
    Publication date: November 30, 2023
    Applicant: Neuralink Corp.
    Inventors: Yu Niu Huang, Peter J. Gilgunn, Dominic A. Herincx, Zachary M. Tedoff
  • Publication number: 20230310028
    Abstract: Systems and methods are disclosed for a lead, needle, and cannula that are sized and shaped for ease of needle threading and positioning, e.g., for implanting the lead into biological tissue. The lead has an opening at one end surrounded by an expanded region. The needle has a ledge in a side of the needle. The cannula has an exit gate with an aperture sized to accept the expanded region of the lead. A portion of the needle is held inside the cannula and can extend or retract therein. When the expanded region of the lead is threaded through the exit gate aperture, the needle is configured to extend through the opening of the lead and catch the lead on the ledge. The needle is further configured to extend past the exit gate of the cannula while pulling the lead through the slot and free of the aperture.
    Type: Application
    Filed: April 1, 2022
    Publication date: October 5, 2023
    Applicant: Neuralink Corp.
    Inventors: Christine M. Odabashian, Ian M. O'Hara
  • Publication number: 20230284982
    Abstract: Techniques for compressing neural signals are disclosed herein. The neural signal compression techniques can include lossless compression, lossy compression, binned spike compression, and spike-band power compression. Lossless compression can compress neural signals using a difference predictor to encode compressed neural signals via binary and unary coding. Lossy compression can compress neural signals using quantized wavelet transforms to generate an encoded bit-stream of compressed neural signals. Binned spike and spike-band power compression can leverage the sparse nature of neural signals to threshold the neural signals for generating an appended bit-stream of compressed neural signals.
    Type: Application
    Filed: March 9, 2022
    Publication date: September 14, 2023
    Applicant: Neuralink Corp.
    Inventors: Kevin Dewald, Sonal Pinto, Avinash Jois, Aram Moghaddassi