Abstract: A semiconductor device having cells is provided, with each cell including a gate. The device includes a gate pad, a gate busbar and gate lines. The busbar connects the gate pad to the gate lines, the gate lines connect the gate busbar to the gates of the cells, and each of the gate lines is disposed along a first axis. The gate busbar includes first portions each disposed along a second axis, and the second axis intersects with the first axis. The first portions are spaced apart from each other to divide the semiconductor device into emitter segments. Lengths of the emitter segments along the first axis changes with distances of the segments from the gate pad, so that gate signals arriving at the gates of the cells from the gate pad via the gate busbar and the gate lines are substantially consistent.

Abstract: A semiconductor device is provided, which includes a package with a first surface side and a second surface side opposite to the first surface side. The package includes at least one semiconductor structure and a group of terminals, and the group of terminals is connected to the at least one semiconductor structure and mounted and exposed on the first surface side of the package. The package further includes at least one heat slug mounted and exposed on the second surface side of the package, and at least one feedthrough wire in the package so that the feed through wire electrically connects with the at least one heat slug.

Abstract: A controller of a synchronous rectifier of a synchronous flyback converter is presented. The synchronous rectifier includes a switch that is switchable by the controller. The controller includes an adaptive slew rate detection circuit that is configured to add a current to a base slew rate current depending on an off-time of the switch to obtain a slew rate current. The slew rate current determines a slew rate setting voltage. The controller is configured to turn on the switch of the synchronous rectifier depending on the slew rate setting voltage.

Abstract: A power module is provided. The power module includes a substrate that defines a first major surface, a component that defines a first end, a second end, and longitudinal axis. The first end of the component is secured to the substrate so that the longitudinal axis of the component extends substantially perpendicular to the first major surface of the substrate. The power module further includes a pin that defines a longitudinal axis, the pin being secured to the second end of the component so that the longitudinal axis of the pin is substantially parallel to the longitudinal axis of the component.

Abstract: The disclosure relates to a pick-and-place apparatus and method for transferring an electronic component from a donor substrate towards an acceptor substrate. The pick-and-place apparatus in accordance with embodiments of the present disclosure includes a movable transfer module that includes at least one pickup tool, each pickup tool is configured for picking up an electronic component and includes a tool body having a first surface. The pick-and-place apparatus further includes a drive unit that is mechanically coupled to the movable transfer module and that is configured for moving the transfer module. The pick-and-place apparatus additionally includes a liquid droplet unit to provide, for each pickup tool, at least one droplet of a liquid on the first surface of that pickup tool for allowing an electronic component released from the donor substrate to be captured and held by the at least one droplet of liquid on the first surface.

Abstract: A system for transferring an electronic component is provided. Further aspects of the disclosure relate to a method for transferring an electronic component. According to an aspect of the disclosure, the system includes a carrier having a first side, a droplet dispensing unit for dispensing a droplet of liquid on the first side of the carrier, and a separating unit for releasing an electronic component from a donor substrate and for allowing the electronic component to be held by the droplet of liquid on the first side of the carrier. The system further includes an optical source for emitting a pulse of light through the carrier towards an interface between the droplet and the carrier to locally vaporize the droplet causing a jet to be formed from the droplet that on one end holds the electronic component and that subsequently breaks to release the electronic component onto a target substrate.

Abstract: A method of manufacturing a semiconductor device, such as a power MOSFET, including: forming a metal layer, the metal layer including an edge where the metal layer ends; forming a passivation layer at a layer higher than the metal layer; and forming a passivation slot in the passivation layer, the passivation slot is at least partially positioned over the metal layer, and the passivation slot divides the passivation layer into multiple regions, each region experiences a reduced tensile stress ?SiNx as a result of the passivation slot.

Abstract: A method of forming a semiconductor device includes: disposing an isolation oxide layer and a shield polysilicon in trenches formed in a substrate, with the shield polysilicon being partially surrounded by the isolation oxide layer; etching the isolation oxide layer; disposing an inter-poly oxide (IPO) layer on an upper surface of the shield polysilicon with the IPO layer laterally surrounded in the trenches by the isolation oxide layer; etching the IPO layer and the isolation oxide layer; lining at least upper sidewalls of the trenches with a gate oxide layer; disposing a gate polysilicon on an upper surface of the IPO layer and on an upper surface of the isolation oxide layer, with the gate polysilicon laterally surrounded by the gate oxide layer; etching the isolation oxide layer so that a thickness of the isolation oxide layer tapers from the shield polysilicon a top opening of the trench.

Abstract: Aspects of the present disclosure relate to an apparatus for transferring an electronic component or a piece of material using light. Aspects of the present disclosure further relate to a method for transferring an electronic component or a piece of material. According to an aspect of the disclosure the apparatus includes a donor stage for holding a donor substrate, an optical source for generating a pulse of collimated light, and a reflection unit including a plurality of micro-mirrors of which an orientation relative to the pulse of collimated light can be individually controlled. The micro-mirrors are configured to reflect the generated pulse of collimated light towards one or more donor positions on a donor substrate body for releasing one or more electronic components or one or more pieces of material among the plurality of electronic components or the plurality of pieces of material at those donor positions, respectively.

Abstract: A cascode transistor circuit including a depletion mode semiconductor device, an enhancement mode transistor having a drain terminal connected to a source terminal of the depletion mode semiconductor device, and a gate driver coupled to a first node between the source of the depletion mode semiconductor device and the drain of the enhancement mode transistor. The gate driver is powered by the depletion mode semiconductor device.

Abstract: A system for sensing a current through a transistor is provided and a DC-DC converter including one or more such systems. The system includes a transistor module, including: a primary transistor electrically connected between a first and a second terminal; and a secondary transistor electrically connected between the first and a third terminal, a control terminal of the secondary transistor is electrically connected to a control terminal of the primary transistor. The system includes a current sensing module electrically connected to the transistor module and having an output terminal. The system is operable in a first mode in which the current sensing module outputs, at the output terminal, a first output signal indicative of a current through the primary transistor in a first current direction based on a voltage difference between the third and the second terminal, the first current direction being from the first to the second terminal.

Abstract: A vertical oriented semiconductor device is provided. The present disclosure further provides that at least one of the well regions of the device have at least two lateral doping gradients, at different depths in the semiconductor material, and each doping gradient has a monotonic decreasing doping concentration, from a higher doping concentration at a first lateral end of the well regions towards a lower doping concentration at a second, opposite lateral end thereof facing the current-accommodating region. These two doping gradients, at different depths, differ from each other, with one of the advantages being that the semiconductor device is made more robust. Multiple ways of implementing the two different lateral doping gradients are provided. Some of the advantages are that the electric field crowding at the corners of the well regions is gradually reduced, and the current distribution can be improved.

Abstract: A peak-current mode (PCM), buck converter is provided, including a slope compensation element, the PCM buck converter is arranged to detect an entering or exiting of a pulse frequency modulation (PFM), mode of operation. The slope compensation element is arranged to disable or reduce a slope compensation when the PCM buck converter detects the entering of the PFM. The slope compensation element is arranged to enable the slope compensation when the PCM buck converter detects the exiting of the PFM.

Abstract: A semiconductor package assembly and molding resin case is provided. The package includes a lead frame having a first and a second lead frame side opposite to the first; a semiconductor die structure having a first and a second die side opposite to the first, the die structure being mounted with its second die side on the first lead frame side, resulting in a first connection; a bond element connected to the first die of the die structure, resulting in another connection; with the molding resin case encapsulating at least the die structure, the lead frame and a first part of at least one bond element connected to the die structure, leaving the second lead frame side and the at least one bond element partly exposed; and at least one bond element is provided with electric field modulation structures configured to alter an electric field created between the connections.

Abstract: An electronic circuit for sensing a current through a pass FET is provided. A first sense circuit passes a first sense current in case a difference between a supply voltage and a source voltage of the pass FET and is small, and a second sense circuit passes a second sense current in case the difference between the supply voltage and the source voltage of the pass FET is large. The first sense current and the second sense current are representative of the current through the pass FET.

Abstract: A trench-gate semiconductor device and a manufacturing method thereof is provided. The device is provided with each unit cell including a first trench, and a second trench extending from a bottom of the first trench. The device includes a gate oxide layer arranged on a first side wall of the first trench, a second oxide layer arranged on a second side wall and bottom of the second trench, a first polysilicon region arranged inside the first trench, separated from the first side wall by the gate oxide layer, forming a gate of the unit cell. The device includes a second polysilicon region arranged inside the second trench, separated from the second side wall and bottom of the second trench by the second oxide layer, forming a buried source of the unit cell, and a third oxide layer arranged in between the first polysilicon region and the second polysilicon region.

Abstract: An insulated-gate bipolar transistor device is provided including: a first region doped with a first type of charge carriers; a second region doped with a second type of charge carriers different from the first type of charge carriers; a third region doped with the first type of charge carriers; a fourth region doped with the second type of charge carriers; a first, emitter terminal electrically connected with the first region and a second, collector terminal electrically connected with the third region and the fourth region; and a gate structure disposed on the third region with one end adjacent to the second region and with another end adjacent the fourth region; as well as a diode structure having a first diode structure terminal electrically connected with the collector terminal and a second diode structure terminal electrically connected with the gate terminal of the gate structure.

Abstract: A power semiconductor device has a power semiconductor die forming a power switch with an input pad, an output pad, and a control pad; a collector power terminal coupled to the input pad of the power switch; an auxiliary gate terminal coupled to the control pad of the power switch; an emitter power terminal; two or more inductance/resistance pairs, with each inductance/resistance pair having a common stray inductance and a resistance arranged in series between the output pad of the power switch and the emitter power terminal; and a plurality of auxiliary emitter terminals that are coupled to both sides of the inductance/resistance pairs so that one auxiliary emitter terminal is coupled to one side of one inductance/resistance pair. A control circuit for di/dt control can control the power semiconductor device. An electronic device can include the power semiconductor device and control circuit.

Abstract: A cell structure of an insulated gate bipolar transistor (IGBT) with a control gate and a carrier storage layer, is provided including: an N-type drift layer with a first surface, an active region on a second surface opposing the first and an N-type storage layer, a P-type body layer and an N-type doped layer sequentially stacked in the active region from the first to the second surface, gate trench bodies, each of which extends from the second to the first surface in a first direction perpendicular to the first surface and contacts the N-type drift layer, and each of the at least three gate trench bodies is a gate trench or a control gate trench. A sidewall of the gate trench is in contact with the active region, and a sidewall of the control gate trench is in contact with the P-type layer but not with the N-type layer.

Abstract: A method of manufacturing semiconductor devices, the method includes the steps of providing a carrier layer including a first surface and a second surface opposite to the first surface, attaching a first metallization layer to the first surface of the carrier layer, transferring a metal paste to the first metallization layer for creating first patterned metal pads and dicing the carrier layer to provide the plurality of semiconductor devices.