Patents Assigned to Nippon Electric Company, Ltd.
  • Patent number: 4006352
    Abstract: An equalizer comprises a tapped delay line of a transversal filter and first equalizing means responsive to a short pseudo-noise train supplied thereto for adjusting tap gains so as to make the transversal filter output signals simulate a pseudo-noise train generated at the receiver with the pulse pattern of the supplied pseudo-noise train. Larger ones, in absolute values, of the adjusted gains are placed at the center of the delay line. Responsive to a subsequently supplied long pseudo-noise train, second equalizing means self-adaptively adjusts all tap gains. The delay line preferably comprises delay units, each for a half of a common clock interval of the supplied pseudo-noise trains and data signals.
    Type: Grant
    Filed: October 17, 1975
    Date of Patent: February 1, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Yoichi Sato
  • Patent number: 4006297
    Abstract: A television signal coding system is designed to avoid any increase in the volume of information transmitted resulting from transmission of unnecessary picture elements, while at the same time reducing the volume of address information required. The picture elements are compared one by one between successive frames, and the magnitude of the frame-to-frame differences is compared with a predetermined threshold value to determine whether the change is significant or not. A predetermined number of consecutive picture elements forms a unit region. A line of horizontal scan is divided into regions, each including a predetermined number of unit regions, and for each of such regions the decision is made as to whether it includes at least one significant unit region or not. Each of the significant regions is further divided, and for each of the resulting divisions the decision is made as to whether it is significant or not.
    Type: Grant
    Filed: September 19, 1975
    Date of Patent: February 1, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Toshio Koga
  • Patent number: 4005277
    Abstract: An echo controller comprises a parallel circuit of an echo suppressor and a self-adaptive echo canceller near an echo path of a long-distance telephone network. The echo controller further comprises a mode switch responsive to levels of a received signal, an unprocessed signal, and an output signal of the echo canceller and operable during absence of double talk for suspending operation of the echo canceller and putting instead the echo suppressor into operation only when characteristics of the echo path and operation of the echo canceller are objectionable.
    Type: Grant
    Filed: September 4, 1975
    Date of Patent: January 25, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Takashi Araseki, Kazuo Ochiai, Takashi Ogihara, Shunji Tanaka
  • Patent number: 4005406
    Abstract: A digital-analog converter is provided wherein a digital signal from an analog-digital converter is compared with a predetermined value and is suppressed to zero if it is smaller than the predetermined value, the resulting digital signal being converted into a corresponding analog signal. The converter is useful particularly in communication networks, serving to improve communication quality in terms of noise by suppressing input signals of amplitudes below a certain level. This invention avoids the need for an analog delay circuit as required by a conventional analog-type device.
    Type: Grant
    Filed: July 15, 1974
    Date of Patent: January 25, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Haruo Kaneko, Yoshio Katagiri, Kaoru Yano
  • Patent number: 4004100
    Abstract: A group frame synchronization system establishes the frame synchronization to a plurality of time-division multiplexed digital signals by the use of a common synchronization code pattern. The common synchronization code pattern and mutually time-shifted codes of identical pattern are respectively inserted at the transmitting end into vacant time slots of the respective digital signals. At the receiving end, the group frame synchronization signals are extracted and fed to an exclusive OR circuit whose output signal is applied to the group frame synchronization circuit.
    Type: Grant
    Filed: August 11, 1975
    Date of Patent: January 18, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Yukio Takimoto
  • Patent number: 4004162
    Abstract: A clock signal reproducing network for PCM signal reception is capable of reproducing a clock signal even if the clock component is absent in the input digital signal for a prolonged period of time. The network includes a clock signal component extracting circuit and a bandpass filter for extracting and band-limiting the clock signal component in a received digital signal. An envelope detection circuit and a level decision circuit are connected to receive the output of the bandpass filter to provide a control signal to an output switching circuit. When the amplitude of the envelope of the filter output is high, the output of the bandpass filter is used directly as a reproduced clock signal. When the amplitude of the envelope is low, the clock signal obtained immediately before the filter amplitude becomes small is derived repeatedly from a delay circuit as a substituted clock signal.
    Type: Grant
    Filed: January 22, 1976
    Date of Patent: January 18, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Kotaro Kato, Haruki Takai
  • Patent number: 4004241
    Abstract: A feedback amplifier including a first and a second amplifier section comprises an autotransformer winding connected between common terminals of the respective amplifier sections and across a feedback circuit. A terminating impedance is connected between the output terminal of one of the amplifier sections and the autotransformer winding at a point nearer to its point of connection to the other amplifier section common terminal. Another terminating impedance is connected between the other amplifier section output terminal and the autotransformer winding at another point nearer to its point of connection to the common terminal of the above-mentioned one amplifier section. The terminating impedances may be used on the input side. They may be connected to the autotransformer winding at its points of connection to the respective common terminals, when the autotransformer may be dispensed with.
    Type: Grant
    Filed: July 23, 1975
    Date of Patent: January 18, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Susumu Akiyama
  • Patent number: 4003022
    Abstract: A symbol string pattern recognition equipment for use in a pattern data processing system employs sequential logics to perform simultaneous comparison of respective symbol string patterns and standard symbol patterns. The equipment includes an external signal generating circuit for generating respective symbols constituting a symbol string pattern in the form of a string of binary-coded external signals. At least one internal signal generating circuit generates an internal signal upon initiation of the supply of the symbol string pattern. A plurality of sequential logic circuits are connected to the internal signal generating circuit and control the travelling paths of the internal signal. A gate circuit is connected between each of the sequential logic circuits and adapted to be turned on upon completion of the supply of the symbol string pattern. An external shift register is connected to the gate circuit, and a circuit for detecting the internal signal is connected to the external shift register.
    Type: Grant
    Filed: July 24, 1975
    Date of Patent: January 11, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Kousuke Takahashi, Haruki Kohara
  • Patent number: 4001498
    Abstract: A system for mixing and/or keying video signals includes a number of video signal processors each of which includes a charge-coupled device as a variable delay element to bring about phase coincidence among a plurality of video signals. The amplitude of the delayed video signal from the charge-coupled device is controlled, and the amplitude-controlled video signals are mixed.
    Type: Grant
    Filed: August 5, 1975
    Date of Patent: January 4, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Masanobu Morishita, Hidehiko Inoue, Takao Ando, Mitsuru Kawasaki
  • Patent number: 4001505
    Abstract: A speech detector which rapidly detects the presence of speech signals in telephone channel broadband noise is useful in TASI type systems. The incoming analog speech signal is sampled and binary-coded, then fed simultaneously to two different detectors: (1) A large-amplitude threshold detector (which detects high-energy vowel and plosive sounds): (2) a high-frequency threshold detector (which detects high-frequency fricative sounds above a 2 Khz threshold, assuming inherent noise in a 4 Khz telephone channel is mostly flat/broadband and 8 Khz sampling noise is filtered out).
    Type: Grant
    Filed: April 3, 1975
    Date of Patent: January 4, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Takashi Araseki, Kazuo Ochiai
  • Patent number: 4001715
    Abstract: A vertical deflection circuit used in television receivers, comprising a free-running oscillator capable of synchronous oscillation triggered by a vertical synchronizing signal separated from a composite synchronizing signal is disclosed. The vertical deflection circuit has a switch means which operates under synchronous control by the vertical synchronizing pulse and prevents the application of a vertical trigger signal to the free-running oscillator at least for the period from the time at which the free-running oscillator has been triggered to the time corresponding to the end of the vertical synchronizing pulse period of the composite synchronizing signal.
    Type: Grant
    Filed: May 8, 1975
    Date of Patent: January 4, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Hirokazu Fukaya
  • Patent number: 4001871
    Abstract: An integrated circuit device with multi-level interconnection wiring structure built upon the substrate wherein each level is formed of conductor and insulator portions and wherein each level has a surface substantially parallel to the surface of the substrate.
    Type: Grant
    Filed: October 16, 1974
    Date of Patent: January 4, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Hideo Tsunemitsu
  • Patent number: 3999146
    Abstract: A semiconductor laser device is disclosed in which an external light beam having a wavelength approximately the same as at least one of the wavelengths of the resonance axial mode for the modulation semiconductor laser to oscillate is injected into the optical resonator of the modulation semiconductor laser.
    Type: Grant
    Filed: August 19, 1975
    Date of Patent: December 21, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Roy Lang, Kohroh Kobayashi
  • Patent number: 3999081
    Abstract: A clock-controlled gate circuit employs field-effect transistors of both n- and p-type conductivities. The circuit includes a precharge circuit, a logic circuit, and a switching transistor serially connected in that order between a power source and ground and a capacitor is connected to the junction between the precharge circuit and the logic circuit.
    Type: Grant
    Filed: August 5, 1975
    Date of Patent: December 21, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Toshio Nakajima
  • Patent number: 3996541
    Abstract: An electromagnetic switch assembly having a structure adapted for integral formation of component parts and for reduction in size and production cost, including an insulating base plate having at least one through hole formed therein to serve as a cell for relay contacts. An integrated type switching device can be realized with a matrix array of such through holes and electromagnetic relays associated therewith, the relay contacts being mounted on the base plate through the medium of two groups of conductive layers formed on the opposite surfaces of the base plate and extending along the lines and rows of contact cells, respectively.
    Type: Grant
    Filed: June 16, 1975
    Date of Patent: December 7, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Sadayuki Mitsuhashi, Kazutoshi Wakamatsu
  • Patent number: 3995193
    Abstract: Shielding means for preventing the emission of microwave radiation from microwave tubes which are typically comprised of an electron gun source, an intermediate body section and a collector section electrically isolated from the adjacent body section by means of a ceramic seal. A metallic shield has one end connected to the body section (or the collector section) and has its other end spaced from the collector section (or body section). An insulation layer is interposed in the gap space between the shield and the collector section (or body section). A microwave energy-lossy body is arranged in contact with one or both sides of the insulation layer to absorb microwave radiation transmitted along the insulation layer so as to prevent emission of potentially harmful microwave energy from the tube. The insulation layer may comprise either a linear or elongated tortuous undulating path.
    Type: Grant
    Filed: April 11, 1975
    Date of Patent: November 30, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Toshinori Horigome, Sadanori Hamada, Takami Sato
  • Patent number: 3994758
    Abstract: A Shottky barrier gate field effect transistor is produced by etching a first conductive film formed on a semiconductor crystal surface using a mask to leave a first conductive film area smaller than the area of the mask and projecting a second conductive material on to the surface perpendicularly thereof. The second conductive film areas thus formed and the first conductive film area serve as the source and drain electrodes and the gate electrodes, respectively.
    Type: Grant
    Filed: March 13, 1974
    Date of Patent: November 30, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Masaki Ogawa, Masaoki Ishikawa
  • Patent number: 3993964
    Abstract: A semiconductor laser device includes a narrow elongated semiconductor region of the same conductivity type as another semiconductor region lying in the vicinity of the active region of the laser device. The elongated region extends in depth from the surface of the device to the vicinity of the active region. A surface semiconductor layer of an opposite conductivity type covers the entire surface of the device except for the elongated region.
    Type: Grant
    Filed: August 18, 1975
    Date of Patent: November 23, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Hiroo Yonezu
  • Patent number: 3991296
    Abstract: An apparatus for forming grooves in a semiconductor wafer by the use of a laser beam includes a movable stage on which the wafer is mounted and a transparent member mounted on the stage in a sealed manner and covering the wafer. A liquid is introduced into the space defined between the wafer and the transparent member.
    Type: Grant
    Filed: November 12, 1975
    Date of Patent: November 9, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Yoshitomo Kojima, Hiroshi Suga
  • Patent number: 3989892
    Abstract: A line concentrator for a time division data switching exchange. Asynchronous and synchronous data signals generated at asynchronous and synchronous data terminals are subjected to known multi-point and synchronous sampling to become a train of bit-multiplexed first asynchronous and synchronous data channel signals. Responsive to a train of bit-interleaved read-in pulse groups timed relative to the respective synchronous data signals, an arithmetic unit stores the data channel signals in an octet memory according to the asynchronous and synchronous data terminals. Responsive to a train of read-out pulses appearing for the respective data terminals, the arithmetic unit reproduces groups of uninterleaved data channel signals for each data terminal and composes the reproduced data channel signals into a train of second asynchronous and synchronous data channel signals given by a common and uninterleaved bit format.
    Type: Grant
    Filed: July 3, 1975
    Date of Patent: November 2, 1976
    Assignees: Nippon Telegraph and Telephone Public Corporation, Nippon Electric Company, Ltd., Oki Electric Industry Company, Ltd., Hitachi, Ltd., Fujitsu Ltd.
    Inventors: Shinichiro Yoshida, Yoshitsugu Watanabe, Yuji Hayano, Susumu Ohara, Takuhito Kojima