Patents Assigned to Nippon Electric Company, Ltd.
  • Patent number: 4131927
    Abstract: The current surge, normally associated with the initial application of a nominal A.C. current to an inductive load, is prevented by preventing the magnetic core of the inductive load from being driven into saturation. Initially, the current is half wave rectified and amplitude limited. The amplitude limitation insures that the core will not be driven into saturation. A voltage detector connected across the inductive load senses only the counter E.M.F. of a polarity opposite to the polarity of the half wave current. When the sensed voltage reaches a predetermined value, a direct connection is provided between the A.C. supply and the inductive load, bypassing the half wave rectifier and the amplitude limiter.
    Type: Grant
    Filed: August 2, 1977
    Date of Patent: December 26, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Takuichi Tsuchiya, Shinichi Shinagawa
  • Patent number: 4131911
    Abstract: A hermetically sealed opto-electrical semiconductor device includes an opto-electrical semiconductor element centrally disposed in an envelope having at least two openings through which light beams are to pass, with flat plates made of a transparent material hermetically covering the respective openings perpendicularly to the directions of the light beams.
    Type: Grant
    Filed: October 13, 1976
    Date of Patent: December 26, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Nobuhiko Fujine, Masato Nakajima
  • Patent number: 4128821
    Abstract: The present turret type television tuner comprises a U-shaped chassis having first and second end walls joined by a side wall. A main channel selecting shaft is supported in said end walls. A toothed index wheel is mounted on the selector shaft adjacent the first end wall. A fine tuning shaft is mounted concentrically around the selector shaft. A fine tuning drive includes a first driving gear mounted concentrically on the fine tuning shaft and a second driving gear mounted on a pivotally mounted member on the second end wall. A coupling clutch permits a fine tuning operation. A torsion bar spring member including a bail portion is mounted on the first and second end walls, whereby a first resilient arm of the spring member extends along the first end wall to engage the toothed index wheel, while a second resilient arm portion extends along said second end wall to engage the selector shaft and bias it against its bearing surfaces.
    Type: Grant
    Filed: March 29, 1977
    Date of Patent: December 5, 1978
    Assignee: New Nippon Electric Company, Ltd.
    Inventors: Kazuo Kato, Michiaki Narihiro
  • Patent number: 4120759
    Abstract: In the present plating method the bath contains an electrolyte solution having a uniform ion concentration. A common electrode, a plating electrode and a standard electrode are arranged in the bath. A direct current source is connected between the common electrode and the plating electrode. A further, constant, direct current source is connected between the common electrode and the standard electrode. A potentiometer device is arranged for detecting resistance changes between these electrodes due to variations in the ion concentration and in the mobility of the electrolyte solution between the electrodes. A control is responsive to the potentiometer device for regulating the plating current supplied by the direct current source as a function of the potential difference detected by the potentiometer device, whereby a constant plating current density is achieved.
    Type: Grant
    Filed: September 13, 1977
    Date of Patent: October 17, 1978
    Assignee: New Nippon Electric Company, Ltd.
    Inventors: Hiroshi Asami, Masao Kaji
  • Patent number: 4118672
    Abstract: An attenuation equalizer, having a constant resistance is comprised of a distributed constant line having a given impedance and electrical length connected to both the input and output terminals of the equalizer, and an additional constant line having a given impedance and electrical length connected to the input and output terminals through resistors of a given resistance.
    Type: Grant
    Filed: July 26, 1977
    Date of Patent: October 3, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Tsutomu Noguchi
  • Patent number: 4118776
    Abstract: With a microprogrammable computer of a numerically controlled machine, macroinstructions are executed in response to a first microprogram. The computer makes the machine carry out its inherent functions, such as interpolation, in response to a second microprogram. Flags may be used to switch sequential execution of the macroinstructions to repeated execution of a portion of the macroinstructions and sequential execution of microinstructions of the second microprogram.
    Type: Grant
    Filed: August 15, 1977
    Date of Patent: October 3, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Masayoshi Isomura
  • Patent number: 4118660
    Abstract: An automatic machining system incorporating all the features of a numerically controlled type machine while eliminating the need for paper tapes. The tool receiving head incorporates means for identifying the moment of contact between tool and work piece, avoiding the need for inputting start position data. Motion control and drive means are provided for X, Y and Z head movement. The novel design provides drilling or punching by insertion of the proper tool in a head adapted to receive either tool.Visual displays provide step by step directions and allow for selection of the machining operation and sequential execution of the machining steps in accordance with inputted data requested by the display.The punching tool operates automatically simply under control of Z axis movement.
    Type: Grant
    Filed: January 5, 1977
    Date of Patent: October 3, 1978
    Assignee: Nippon Electric Company Ltd.
    Inventors: Nobuo Ohtsuki, Toshio Hayashi, Akio Imai, Yoshio Takahashi, Noboru Hashimoto
  • Patent number: 4110706
    Abstract: A synchronizing circuit for reproducing a synchronizing carrier wave from a received N-phase (N=2.sup.n, n being a positive real integer where n .gtoreq.1) PSK modulated carrier wave and employing a code converter circuit for adjusting the phase states of the received modulated carrier after demodulation thereof in order to enable the modulator to generate signals of the proper phase relation relative to an output carrier wave of a voltage controlled oscillator, which phase relationship is detected by a phase detector.The code converter may be a logic gating circuit having control inputs for changing the output levels or a plurality of branching circuit pairs for each input each pair having a true and complement branch, and switch means for selectively coupling one of the branches to an output associated with each pair of branch circuits.
    Type: Grant
    Filed: October 6, 1976
    Date of Patent: August 29, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Youichi Matsumoto, Yoshimi Tagashira, Seijiro Yokoyama
  • Patent number: 4110663
    Abstract: In a circuit for driving a plasma display panel, a blocking oscillator produces pulses varying between a positive and a negative voltage. Transistors controlled by first selection signals selectively supply first electrodes of the panel with either the complete bipolar pulses, or with only a predetermined one of the positive or negative pulse components. Further transistor switches controlled by second selection signals selectively connect and disconnect second display panel electrodes to ground. A constant voltage is applied to the disconnected second electrodes.A gas discharge occurs at each intersection of the first electrodes supplied with the full bipolar pulse wave and the grounded second electrodes. In accordance with one aspect of the present invention, production of the driving pulses may be suspended either by a preselected one of the first and second selection signals or by coincidence logic operating upon preselected first or second selection signals.
    Type: Grant
    Filed: October 21, 1976
    Date of Patent: August 29, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Togo Miyazaki, Masatoshi Shimizu
  • Patent number: 4109101
    Abstract: A novel modulator converts a sequence of N'ary codes representative of an element P of a set (0, 1, 2, . . . , N - 1) into a sequence of 2N-phase carrier pulses, where N = 2.sup.n, n being a positive integer. A phase shift in the carrier signal between each carrier pulse and the next preceding one is selected from P.pi./N and (P + N).pi./N in compliance with a prescribed law of correlation between the N'ary codes in the sequence. Alternatively, the carrier signal is given in each carrier pulse a phase selected in the manner specified. For convenience of resorting to the prescribed correlation law, the N'ary code sequence may be converted into N trains, corresponding to the respective elements P, of three-level signals, 0 and .+-.1. In the train corresponding to a particular element, the three-level signals are successively produced with the prescribed correlation law, such as with resort to a bipolar or duobinary technique.
    Type: Grant
    Filed: June 2, 1976
    Date of Patent: August 22, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Toshihiko Mitani
  • Patent number: 4109161
    Abstract: A memory circuit with protection circuit having particular application to MOS-IC memories is disclosed. The protection circuit prevents the memory from being damaged by an undesirable turn-on or turn-off sequence of main and substrate voltage supplies or by an abnormal substrate voltage.
    Type: Grant
    Filed: February 8, 1977
    Date of Patent: August 22, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Hiroshi Iijima
  • Patent number: 4109102
    Abstract: A phase synchronizing circuit for processing a 2.sup.n- phase phase modulated input signal wherein the signal is detected by phase detectors each of whose outputs are then phase shifted through a phase angle determined by the ratio of a:b = 1:tan (.pi./2.sup.n+1) where a represents the amplitude of the phase detector output and b represents the amplitude of a signal orthogonal to the signal a. The 2.sup.n phase shifted signals repetitively undergo frequency doubling and then a combined signal from each pair of doublers is generated to successively reduce the signals to 2.sup.n-1 in number, then 2.sup.n-2 in number, and so forth, until only one pair of signals remains. A difference signal of the pair of signals is formed, which difference signal represents an error signal and is employed to operate a voltage controlled oscillator serving as the signal to be compared at each phase detector with the input signal, after undergoing an appropriate phase shift.
    Type: Grant
    Filed: November 22, 1976
    Date of Patent: August 22, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Yasuharu Yoshida, Yoshimi Tagashira
  • Patent number: 4096489
    Abstract: An electrostatic-recording gas discharge device for use in an electronic printing device, a facsimile receiver, and the like, is provided with auxiliary discharge electrodes connected to respective voltage inducing electrodes for preventing a detrimental discharge from being caused at the voltage inducing electrodes.
    Type: Grant
    Filed: August 23, 1976
    Date of Patent: June 20, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Yoshizumi Terazawa, Takashi Kitagawa, Takanori Tanaka, Kouji Aono
  • Patent number: 4091345
    Abstract: An electromechanical filter comprises a mechanical resonator, a pair of electromechanical transducers mechanically coupled to each other with the resonator interposed, and a pair of external matching circuits electrically connected to the respective transducers. Each matching circuit comprises a coil and a temperature-compensation capacitor connected to form a resonance circuit with the equivalent parallel capacitance of the associated transducer included therein. Resonant frequencies of the respective resonance circuits are rendered different from the passband center frequency of the filter. Preferably, the first-order temperature coefficients of the resonant frequency and the equivalent inductance of each transducer are selected to be (1) both negative and (2) positive and negative as the resonant frequency of the associated resonance circuit is rendered (1) higher and (2) lower than the center frequency.
    Type: Grant
    Filed: August 26, 1976
    Date of Patent: May 23, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Takeshi Yano, Seiichiro Kanazawa, Takehiro Futami, Yasuyuki Ishiyama
  • Patent number: 4084111
    Abstract: A digital-analog converter electrically effecting sequential switching between a reference voltage point and each of the connection points formed in a circuit network composed of serially connected impedance elements for taking out desired analog quantity such as signal voltage level, impedance value or the like in response to the application of control pulses, which comprises in combination memory circuits such as R-S flip-flops, gate circuits such as NAND gates and delay circuit such as integration circuits, capacitors and the likes. The provision of the delay circuits, in particular, advantageously facilitates the setting for the initial operation state and the preparation for the sequential switching.
    Type: Grant
    Filed: November 26, 1975
    Date of Patent: April 11, 1978
    Assignee: New Nippon Electric Company, Ltd.
    Inventor: Hirotoshi Matsuda
  • Patent number: 4079339
    Abstract: A semiconductor laser device in which a part of the laser output is reflected from an external reflector and injected into the laser element with a delay that is less than the relaxation oscillation period of the laser pulse output.
    Type: Grant
    Filed: May 12, 1976
    Date of Patent: March 14, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Kohroh Kobayashi, Roy Lang
  • Patent number: 4079371
    Abstract: An arrangement responsive to input digital signals for producing output digital signals at a higher rate together with stuffing pulses comprises a first frequency divider responsive to input clock pulses defining the rate of the input signals for producing write-in pulses for storing the input digital signals in a memory. A voltage controlled oscillator produces output clock pulses at the higher rate, which pulses are supplied directly and through a circuit responsive to the output clock pulses for supplying stuffing-pulse-position specifying pulses to a second frequency divider for producing read-out pulses for making the memory produce the output signals.
    Type: Grant
    Filed: May 20, 1976
    Date of Patent: March 14, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Tadao Shimamura
  • Patent number: 4079292
    Abstract: It is the purpose of the present discharge lamp lighting system to provide reignition energy to a discharge lamp in each half cycle of the a.c. power source. The discharge lamp is connected to a conventional a.c. power source through ballast means and an oscillation booster circuit, which provides an intermittent oscillation output for the reignition operation of the discharge lamp. The operation period of the intermittent oscillation output is so controlled that the reignition operation period is included in each half cycle of the discharge lamp current. The lamp voltage and source voltage are established to agree as much as possible with each other for minimizing the terminal voltage of the ballast means, whereby a compact and economical device with a small inductance ballast means is achieved.
    Type: Grant
    Filed: January 7, 1976
    Date of Patent: March 14, 1978
    Assignee: New Nippon Electric Company, Ltd.
    Inventor: Isao Kaneda
  • Patent number: 4078938
    Abstract: A ceramic composition allowing low-temperature sintering at a temperature below 1000.degree. C and having a high dielectric constant over 5000 essentially contains Pb(Fe 2/3 W 1/3)O.sub.3 and Pb(Fe 1/3 Nb 2/3)O.sub.3, in which the molecular ratio of Pb(Fe 2/3 W 1/3)O.sub.3 to Pb(Fe 1/3 Nb 2/3)O.sub.3 ranges from about 0.2 to 0.5.
    Type: Grant
    Filed: January 13, 1977
    Date of Patent: March 14, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Masatomo Yonezawa, Tomeji Ohno
  • Patent number: 4079318
    Abstract: A space diversity receiving system is described which eliminates the low frequency phase modulation component at the intermediate frequency stage output. Received signals from two antennae are converted to intermediate frequency signals and then combined after one signal has been passed through a variable phase shifter. Branching amplifiers are provided in each intermediate frequency channel so that all phase modulation, phase detection and production of the control signal necessary for controlling the variable phase shifter are achieved outside of all main intermediate frequency channels that are to be combined to obtain an intermediate frequency output.
    Type: Grant
    Filed: June 22, 1976
    Date of Patent: March 14, 1978
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Kyo Kinoshita