Patents Assigned to Nippon Mining & Metals Co., Ltd.
  • Patent number: 8815010
    Abstract: A method for producing a low-dislocation InP single crystal suitably used for an optical device such as a semiconductor laser, and the low-dislocation InP single crystal wafer are provided. In a liquid-encapsulated Czochralski method in which a semiconductor raw material and an encapsulant are contained in a raw material melt containing part comprising a cylindrical crucible having a bottom, the raw material containing part is heated to melt the raw material, and a seed crystal is brought into contact with a surface of a melt of the raw material in a state of being covered with the encapsulant to grow a crystal while the seed crystal is raised; a crystal shoulder part is grown from the seed crystal by setting a temperature gradient in a crystal growth direction to 25° C./cm or less and setting a temperature-fall amount to 0.25° C./hr or more. Thus, an iron-doped or undoped InP single crystal wafer in which an area having a dislocation density of 500/cm2 or less occupies 70% or more is realized.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: August 26, 2014
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Akira Noda, Ryuichi Hirano
  • Patent number: 8736057
    Abstract: A substrate having, on a base material, a barrier film for preventing copper diffusion containing one or more metal elements selected from tungsten, molybdenum and niobium, a metal element having a catalytic function in electroless plating such as platinum, gold, silver and palladium, and nitrogen contained in the form of a nitride of the aforementioned one or more metal elements selected from tungsten, molybdenum and niobium. The barrier film for preventing copper diffusion is manufactured by sputtering in a nitrogen atmosphere using a target containing one or more metal elements selected from tungsten, molybdenum and niobium and the aforementioned metal element having a catalytic function in electroless plating.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: May 27, 2014
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Junichi Ito, Atsushi Yabe, Junnosuke Sekiguchi, Toru Imori
  • Patent number: 8585798
    Abstract: The copper sulfide ore is leached in the halide bath without using a special oxidant but with the use of only air. The copper and gold in the copper sulfide ore can be leached at high leaching ratio. The treating steps are as follows. (1) Copper leaching process (CL). The raw material is charged into the first acidic aqueous solution, which contains cupric chloride, ferric chloride, 7 g/L of hydrochloric acid, and sodium chloride. The post-leach liquor contains copper in cuprous state ions and copper in cupric state ions. (2) Solid-Liquid separation step. The resultant solid and liquid of CL step are separated. (3) Air oxidation step (OX). Air is blown into the post solid-liquid separation liquor. The copper in cuprous state ions are oxidized to the copper in cupric state ions. The iron leached in the step (1) is oxidized. Simultaneously, the impurities leached in the step (2) are precipitated. (4) Copper extracting step (CEX).
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: November 19, 2013
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Yoshifumi Abe, Hiroshi Hosaka, Kazuaki Takebayashi, Yasunari Ishiguro, Akira Yoshimura
  • Patent number: 8568856
    Abstract: The invention provides a two-layer flexible substrate free of surface defects and having excellent etching characteristics and adherence to a resist. The two-layer flexible substrate has a copper layer provided on one or both faces of an insulator film without using an adhesive, wherein the surface roughness (Ra) of the copper layer is 0.10 to 0.25 ?m, and wherein the average crystal grain size [of copper] is no greater than 0.8 ?m at 1 ?m from the insulator film in the cross-section of the copper layer. Preferably, the insulator film is a polyimide film.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: October 29, 2013
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Katsuyuki Tsuchida, Hironori Kobayashi, Ryu Murakami, Masashi Kumagai
  • Patent number: 8476171
    Abstract: The present invention is to provide a heat treatment method for effectively eliminating Te deposits in a ZnTe single crystal substrate, and a ZnTe single crystal substrate having an optical characteristic suitable for use of a light modulation element and having a thickness of 1 mm or more. A heat treatment method of a ZnTe single crystal substrate, includes: a first step of increasing a temperature the ZnTe single crystal substrate to a first heat treatment temperature T1, and retaining the temperature of the substrate for a predetermined time; and a second step of gradually reducing the temperature of the substrate from the first heat treatment temperature T1 to a second heat treatment temperature T2 lower than the heat treatment temperature T1 with a predetermined rate, wherein the first heat treatment temperature T1 is set in a range of 700° C.?T1?1250° C. and the second heat treatment temperature T2 is set in a range of T2?T1?50.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: July 2, 2013
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Toshiaki Asahi, Kenji Sato, Takayuki Shimizu
  • Patent number: 8449751
    Abstract: The invention has an object of obtaining a low-profile electrolytic copper foil made by electrolytic copper foil manufacturing using a cathode drum such that the surface roughness on the rough surface side (the opposite side to the lustrous surface) is low. In particular, the invention has an object of obtaining an electrolytic copper foil that can be finely patterned and have an excellent elongation and tensile strength at normal and high temperatures. This object is attained by using a copper electrolytic solution containing, as additives, an organosulfur compound, and an amine compound having a specific skeleton obtained by additively reacting an amine compound and a compound having one or more epoxy groups in a molecule thereof to an addition reaction.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: May 28, 2013
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Masashi Kumagai, Mikio Hanafusa
  • Patent number: 8444779
    Abstract: The invention provides Cu—Ni—Si—Co alloys having excellent strength, electrical conductivity, and press-punching properties. In one aspect, the invention is a copper alloy for electronic materials, containing 1.0 to 2.5 mass % of Ni, 0.5 to 2.5 mass % of Co, and 0.30 to 1.2 mass % of Si, the balance being Cu and unavoidable impurities, wherein the copper alloy for electronic material has a [Ni+Co+Si] content in which the median value ? (mass %) satisfies the formula 20 (mass %)???60 (mass %), the standard deviation ? (Ni+Co+Si) satisfies the formula ? (Ni+Co+Si)?30 (mass %), and the surface area ratio S (%) satisfies the formula 1%?S?10%, in relation to the compositional variation and the surface area ratio of second-phase particles size of 0.1 ?m or greater and 1 ?m or less when observed in a cross section parallel to a rolling direction.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: May 21, 2013
    Assignee: JX Nippon Mining & Metals Co., Ltd.
    Inventors: Naohiko Era, Hiroshi Kuwagaki
  • Patent number: 8404035
    Abstract: An electroless copper plating solution that is favorable to improve the adhesion of a plating film and realizes uniform plating at a low temperature is characterized by containing a water-soluble nitrogen-containing polymer in an electroless copper plating solution, and preferably the above-mentioned electroless copper plating solution contains glyoxylic acid and phosphinic acid as reducing agents. The water-soluble nitrogen-containing polymer is preferably a polyacrylamide or a polyethyleneimine and, preferably, its weight average molecular weight (Mw) is at least 100,000 and Mw/Mn is 10.0 or less.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 26, 2013
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Atsushi Yabe, Junnosuke Sekiguchi, Toru Imori, Yoshihisa Fujihira
  • Patent number: 8394508
    Abstract: A plated article has an alloy thin film formed on a substrate and having a catalytically active metal (A) for electroless plating and a metal (B) capable of undergoing displacement plating with a metal ion contained in an electroless plating solution, and a metal thin film formed on the alloy thin film by electroless displacement and reduction plating. The alloy thin film of the catalytically active metal (A) and the metal (B) capable of displacement plating has a composition comprising 5 at % to 40 at % of the metal (A). The metal thin film formed by electroless displacement and reduction plating is a metal thin film having a thickness no greater than 10 nm and a resistivity no greater than 10 ??·cm. Preferably, the metal (B) has a barrier function with respect to a metal of the metal thin film.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: March 12, 2013
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Atsushi Yabe, Junichi Ito, Yoshiyuki Hisumi, Junnosuke Sekiguchi, Toru Imori
  • Patent number: 8390123
    Abstract: A ULSI micro-interconnect member having a substrate and a ULSI micro-interconnect formed on the substrate, wherein the ULSI micro-interconnect includes a barrier layer formed on the substrate and a ruthenium electroplating layer formed on the barrier layer; the ULSI micro-interconnect member further including a copper electroplating layer formed using the ruthenium electroplating layer as a seed layer; and a process for fabricating the ULSI micro-interconnect members.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: March 5, 2013
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Junnosuke Sekiguchi, Toru Imori, Takashi Kinase
  • Patent number: 8247301
    Abstract: A substrate having, on a base material, a barrier film for preventing copper diffusion containing one or more metal elements selected from tungsten, molybdenum and niobium, a metal element having a catalytic function in electroless plating such as ruthenium, rhodium, and iridium, and nitrogen contained in the form of a nitride of the aforementioned one or more metal elements selected from tungsten, molybdenum and niobium. The barrier film for preventing copper diffusion is manufactured by sputtering in a nitrogen atmosphere using a target containing one or more metal elements selected from tungsten, molybdenum and niobium and the aforementioned metal element having a catalytic function in electroless plating.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: August 21, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Junichi Ito, Atsushi Yabe, Junnosuke Sekiguchi, Toru Imori
  • Patent number: 8231728
    Abstract: An epitaxial growth method forming a semiconductor thin film including a heterojunction of a group III-V compound semiconductor by means of molecular beam epitaxy. The method is configured to include: a first step of irradiating a molecular beam of at least one of group III elements and a molecular beam of a first group V element to form a first compound semiconductor layer; a second step of stopping the irradiation of the molecular beam of the group III element and the molecular beam of the first group V element to halt growth until an amount of the first group V element supplied is reduced to 1/10 or less of a supply of the first group V element in the first step; and a third step of irradiating a molecular beam of at least one of the group III elements and a molecular beam of a second group V element to form a second compound semiconductor layer, which is different from the first compound semiconductor, on the first compound semiconductor layer.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: July 31, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Misao Takakusaki, Susumu Kanai
  • Patent number: 8182873
    Abstract: A method for metal plating with good adhesion to materials that are difficult to plate wherein a material to be plated is surface-treated with a silane coupling agent having in a molecule thereof a functional group with a metal-capturing capability, is heat treated at a high temperature of at least 150° C. in air or an inert gas atmosphere, surface treatment is performed with a solution containing a noble metal compound, and electroless plating is performed. Alternatively, a metal plating method is provided wherein a material to be plated is surface-treated with a liquid in which a noble metal compound and a silane coupling agent having in a molecule thereof a functional group with a metal-capturing capability have already been mixed or reacted, is heat treated at a high temperature of at least 150° C. in air or an inert gas atmosphere, and electroless plating is performed.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: May 22, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Toru Imori, Junnosuke Sekiguchi, Atsushi Yabe, Yoshihisa Fujihira
  • Patent number: 8182594
    Abstract: An electroless nickel plating liquid capable of forming an underbarrier metal for metal bumps or solder bumps by electroless nickel plating with a uniform film thickness on silicon wafers composed of multiple IC chips contains a water-soluble nickel salt, a reducing agent, a complexing agent, and a pH buffer, wherein_lead ion is contained at 0.01-1 ppm, cobalt ion is contained at 0.01-1 ppm, and a sulfur compound is contained at 0.01-1 ppm.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: May 22, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Eiji Hino, Masashi Kumagai
  • Patent number: 8163400
    Abstract: The present invention provides a plated article that has a thin seed layer having a uniform thickness, formed by electroless plating and allowing formation of ultrafine wiring, and that avoids the complicated formation of a bilayer of a barrier layer and a catalytic metal layer prior to forming the seed layer. The present invention also provides a method for manufacturing the plated article. The plated article has an alloy thin film formed on a substrate and containing a catalytically active metal (A) for electroless plating and a metal (B) capable of undergoing displacement plating with a metal ion contained in an electroless plating solution, and a metal thin film formed on the alloy thin film by electroless displacement and reduction plating. The alloy thin film of the catalytically active metal (A) and the metal (B) capable of displacement plating has a composition comprising 5at% to 40at% of the metal (A).
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: April 24, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Atsushi Yabe, Junichi Ito, Yoshiyuki Hisumi, Junnosuke Sekiguchi, Toru Imori
  • Patent number: 8137460
    Abstract: Provided are a manufacturing method of a GaN single crystal in which the film thickness of the GaN single crystal can be controlled accurately, even when a hydride vapor phase epitaxy is applied; a GaN thin film template substrate which is suitable for growing a GaN thick film with a fine property; and a GaN single crystal growing apparatus. Provided is a manufacturing method of a GaN single crystal by a hydride vapor phase epitaxy, wherein the hydride vapor phase epitaxy comprises: spraying HCl (hydrogen chloride) onto Ga (gallium) which is heated and fused in a predetermined temperature to generate GaCl (gallium chloride); and forming a GaN thin film by a reaction of the generated GaCl (gallium chloride) with NH3 (ammonia) gas which is hydroxide gas on a substrate, the manufacturing method comprising supplying the NH3 gas in a vicinity of the substrate (for example, at a position which is separated from the substrate by a distance of 0.7-4.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: March 20, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Satoru Morioka, Misao Takakusaki, Takayuki Shimizu
  • Publication number: 20120009374
    Abstract: Provided is a hybrid silicon wafer in which molten state polycrystalline silicon and solid state single-crystal silicon are mutually integrated, comprising fine crystals having an average crystal grain size of 8 mm or less at a polycrystalline portion within 10 mm from a boundary with a single-crystal portion. Additionally provided is a method of manufacturing a hybrid silicon wafer, wherein a columnar single-crystal silicon ingot is sent in a mold in advance, molten silicon is cast around and integrated with the single-crystal ingot to prepare an ingot complex of single-crystal silicon and polycrystalline silicon, and a wafer shape is cut out therefrom. The provided hybrid silicon wafer comprises the functions of both a polycrystalline silicon wafer and a single-crystal wafer.
    Type: Application
    Filed: July 8, 2010
    Publication date: January 12, 2012
    Applicant: NIPPON MINING & METALS CO., LTD.
    Inventors: Hiroshi Takamura, Ryo Suzuki
  • Publication number: 20120009373
    Abstract: Provided is a hybrid silicon wafer made of a wafer comprised primarily of two or more types of concentric single-crystal silicon or polycrystalline silicon prepared by mutually integrating one in a molten state and another in a solid state, and having specific resistances that differ by two orders of magnitude or more. Additionally provided is a method of manufacturing a hybrid silicon wafer, wherein high specific resistance silicon or an ingot comprised primarily of silicon is disposed at a central portion or a decentered position in a crucible, a nugget or powdered silicon having a specific resistance that is lower by two orders of magnitude or more than the ingot is filled in a void part around the ingot in the crucible, the nugget or powdered silicon is selectively melted and integrated with the ingot to form a complex, and a wafer shape is cut out therefrom.
    Type: Application
    Filed: July 8, 2010
    Publication date: January 12, 2012
    Applicant: NIPPON MINING & METALS CO., LTD.
    Inventors: Hiroshi Takamura, Ryo Suzuki
  • Patent number: 8089154
    Abstract: It is an object of the present invention to provide a technology for forming an ULSI fine copper wiring by a simpler method. An electronic component in which a thin alloy film of tungsten and a noble metal used as a barrier-seed layer for an ULSI fine copper wiring is formed on a base material, wherein the thin alloy film has a composition comprising tungsten at a ratio equal to or greater than 50 at. % and the noble metal at a ratio of equal to or greater than 5 at. % and equal to or less than 50 at. %. The noble metal is preferably one or more kinds of metals selected from the group consisting of ruthenium, rhodium, and iridium.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: January 3, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Junnosuke Sekiguchi, Toru Imori
  • Publication number: 20110306165
    Abstract: There is provided a method for producing an a-IGZO oxide thin film by sputtering, which can control the carrier density of the film to a given value with high reproducibility. The method is an amorphous In—Ga—Zn—O based oxide thin film production method including: providing a sintered oxide material consisting essentially of indium (In), gallium (Ga), zinc (Zn), and oxygen (O) as constituent elements, wherein the ratio [In]/([In]+[Ga]) of the number of indium atoms to the total number of indium and gallium atoms is from 20% to 80%, the ratio [Zn]/([In]+[Ga]+[Zn]) of the number of zinc atoms to the total number of indium, gallium and zinc atoms is from 10% to 50%, and the sintered oxide material has a specific resistance of 1.0×10?1 ?cm or less; and producing a film on a substrate by direct current sputtering at a sputtering power density of 2.5 to 5.5 W/cm2 using the sintered oxide material as a sputtering target.
    Type: Application
    Filed: December 24, 2008
    Publication date: December 15, 2011
    Applicant: NIPPON MINING & METALS CO., LTD.
    Inventors: Masakatsu Ikisawa, Masataka Yahagi