Abstract: Material is removed from a substrate surface (e.g., from a bottom portion of a recessed feature on a partially fabricated semiconductor substrate) by subjecting the surface to a plurality of profiling cycles, wherein each profiling cycle includes a net etching operation and a net depositing operation. An etching operation removes a greater amount of material than is being deposited by a depositing operation, thereby resulting in a net material etch-back per profiling cycle. About 2-10 profiling cycles are performed. The profiling cycles are used for removing metal-containing materials, such as diffusion barrier materials, copper line materials, and metal seed materials by PVD deposition and resputter. Profiling with a plurality of cycles removes metal-containing materials without causing microtrenching in an exposed dielectric. Further, overhang is reduced at the openings of the recessed features and sidewall material coverage is improved. Integrated circuit devices having higher reliability are fabricated.

Abstract: Rotational hardstop assemblies that provide greater than 360 degrees of non-continuous rotation for rotating mechanisms are provided. In certain embodiments, an assembly is used to provide 630 or more degrees of rotation for the shoulder axis of a robot, such as a wafer transfer robot. The rotational hardstop assemblies include opposing magnets as springs. According to various embodiments, the opposing magnets provide non-contact engagement and produce no contact noise nor have any wear over time. The rotational hardstop assemblies provide the ability to location from either direction of rotation of a robot cylindrical coordinate system.

Abstract: A heat shield employed in semiconductor processing apparatus comprises a high performance insulation that has low thermal conductivity, such as, below the thermal conductivity of still air over a wide range of temperatures utilized in operation of the apparatus. As an example, the thermal conductivity of the insulation may be in the range of about 0.004 W/m·h to about 0.4 W/m·h over a temperature range of about 0° C. to about 600° C. or more. The deployment of the high performance heat shield reduces the power consumption necessary for the heater by as much as 20% to reach a desired processing temperature as compared to a case of heater power consumption required to reach the same desired temperature without the shield.

Abstract: Disclosed methods cap exposed surfaces of copper lines with a layer of metal or metal-containing compound combined with silicon. In some cases, the metal or metal-containing compound forms an atomic layer. In certain embodiments, the methods involve exposing the copper surface first to a metal containing precursor to form an atomic layer of adsorbed precursor or metal atoms, which may optionally be converted to an oxide, nitride, carbide, or the like by, e.g., a pinning treatment. Subsequent exposure to a silicon-containing precursor may proceed with or without metallic atoms being converted.

Abstract: A temperature controlled showerhead for chemical vapor deposition (CVD) chambers enhances heat dissipation to enable accurate temperature control with an electric heater. Heat dissipates by conduction through a showerhead stem and fluid passageway and radiation from a back plate. A temperature control system includes one or more temperature controlled showerheads in a CVD chamber with fluid passageways serially connected to a heat exchanger.

Abstract: Provided are methods of void-free tungsten fill of high aspect ratio features. According to various embodiments, the methods involve a reduced temperature chemical vapor deposition (CVD) process to fill the features with tungsten. In certain embodiments, the process temperature is maintained at less than about 350° C. during the chemical vapor deposition to fill the feature. The reduced-temperature CVD tungsten fill provides improved tungsten fill in high aspect ratio features, provides improved barriers to fluorine migration into underlying layers, while achieving similar thin film resistivity as standard CVD fill. Also provided are methods of depositing thin tungsten films having low-resistivity. According to various embodiments, the methods involve performing a reduced temperature low resistivity treatment on a deposited nucleation layer prior to depositing a tungsten bulk layer and/or depositing a bulk layer via a reduced temperature CVD process followed by a high temperature CVD process.

Abstract: Systems, methods, and apparatus for depositing a tantalum layer on a wafer substrate are disclosed. In one aspect, a tantalum layer may be deposited on a surface of a wafer substrate using an ion-induced atomic layer deposition process with a tantalum precursor. A copper layer may be deposited on the tantalum layer.

Abstract: Methods for depositing film stacks by plasma enhanced chemical vapor deposition are described. In one example, a method for depositing a film stack on a substrate, wherein the film stack includes films of different compositions and the deposition is performed in a process station in-situ, is provided. The method includes, in a first plasma-activated film deposition phase, depositing a first layer of film having a first film composition on the substrate; in a second plasma-activated deposition phase, depositing a second layer of film having a second film composition on the first layer of film; and sustaining the plasma while transitioning a composition of the plasma from the first plasma-activated film deposition phase to the second plasma-activated film deposition phase.

Abstract: A method for removing species from a substrate includes arranging a purge ring in a chamber proximate to a pedestal. The purge ring includes an inlet portion and an exhaust portion. The inlet portion defines an inlet plenum and an inlet baffle. The inlet baffle includes a continuous slit that is substantially continuous around a peripheral arc not less than about 270°. The exhaust portion includes an exhaust channel that is located substantially opposite the inlet baffle. The method further includes supplying ozone to the inlet plenum; at least partially defining a ring hole space having a periphery using the inlet portion and the exhaust portion; conveying gas from the inlet plenum into the ring hole space using the inlet baffle; conveying gas and other matter out of a purge space using the exhaust portion; and inhibiting deposition of material evolved from the substrate during curing using the purge ring.

Abstract: Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments, methods involve forming a bilayer film on a sensitive substrate that both protects the underlying substrate from damage and possesses desired electrical properties. Also provided are methods and apparatus for evaluating and optimizing the films, including methods to evaluate the amount of substrate damage resulting from a particular deposition process and methods to determine the minimum thickness of a protective layer. The methods and apparatus described herein may be used to deposit films on a variety of sensitive materials such as silicon, cobalt, germanium-antimony-tellerium, silicon-germanium, silicon nitride, silicon carbide, tungsten, titanium, tantalum, chromium, nickel, palladium, ruthenium, or silicon oxide.

Abstract: A method of depositing a film on a substrate surface includes providing a substrate in a reaction chamber; selecting a silicon-containing reactant from a precursor group consisting of di-tert-butyl diazidosilane, bis(ethylmethylamido)silane, bis(diisopropylamino)silane, bis(tert-butylhydrazido)diethylsilane, tris(dimethylamido)silylazide, tris(dimethylamido)silylamide, ethylsilicon triazide, diisopropylaminosilane, and hexakis(dimethylamido)disilazane; introducing the silicon-containing reactant in vapor phase into the reaction chamber under conditions allowing the silicon-containing reactant to adsorb onto the substrate surface; introducing a second reactant in vapor phase into the reaction chamber while the silicon-containing reactant is adsorbed on the substrate surface, and wherein the second reactant is introduced without first sweeping the silicon-containing reactant out of the reaction chamber; and exposing the substrate surface to plasma to drive a reaction between the silicon-containing reactant and

Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by the following operations: (a) exposing the substrate surface to a first reactant in vapor phase under conditions allowing the first reactant to adsorb onto the substrate surface; (b) exposing the substrate surface to a second reactant in vapor phase while the first reactant is adsorbed on the substrate surface; and (c) exposing the substrate surface to plasma to drive a reaction between the first and second reactants adsorbed on the substrate surface to form the film.

Abstract: Novel gap fill schemes involving depositing both flowable oxide films and high density plasma chemical vapor deposition oxide (HDP oxide) films are provided. According to various embodiments, the flowable oxide films may be used as a sacrificial layer and/or as a material for bottom up gap fill. In certain embodiments, the top surface of the filled gap is an HDP oxide film. The resulting filled gap may be filled only with HDP oxide film or a combination of HDP oxide and flowable oxide films. The methods provide improved top hat reduction and avoid clipping of the structures defining the gaps.

Abstract: An electrolyte, and particularly anolyte, may be circulated via an open loop having a pressure regulator, so that the pressure in the plating chamber is maintained at a constant (or substantially constant) value with respect to atmospheric pressure. In these embodiments, a pressure regulator is in fluid communication with the anode chamber.

Abstract: A method and apparatus for conformally depositing a dielectric oxide in high aspect ratio gaps in a substrate is disclosed. A substrate is provided with one or more gaps into a reaction chamber where each gap has a depth to width aspect ratio of greater than about 5:1. A first dielectric oxide layer is deposited in the one or more gaps by CFD. A portion of the first dielectric oxide layer is etched using a plasma etch, where etching the portion of the first dielectric oxide layer occurs at a faster rate near a top surface than near a bottom surface of each gap so that the first dielectric oxide layer has a tapered profile from the top surface to the bottom surface of each gap. A second dielectric oxide layer is deposited in the one or more gaps over the first dielectric oxide layer via CFD.

Abstract: A semiconductor electroplating process deposits copper into the through silicon via hole to completely fill the through silicon via in a substantially void free is disclosed. The through silicon via may be more than about 3 micrometers in diameter and more that about 20 micrometers deep. High copper concentration and low acidity electroplating solution is used for deposition copper into the through silicon vias.

Abstract: Improved methods and apparatus for stripping photoresist and removing ion implant related residues from a work piece surface are provided. According to various embodiments, the workpiece is exposed to a passivation plasma, allowed to cool for a period of time, and then exposed to an oxygen-based or hydrogen-based plasma to remove the photoresist and ion implant related residues. Aspects of the invention include reducing silicon loss, leaving little or no residue while maintaining an acceptable strip rate. In certain embodiments, methods and apparatus remove photoresist material after high-dose ion implantation processes.

Abstract: Novel methods for extending electrostatic chuck lifetimes are provided. The methods involve providing a chuck having a metal cooling plate attached to a ceramic top plate, and after a period of use, disassembling the chuck, and providing a new chuck including the used metal cooling plate. In certain embodiments, the use of a low temperature bond material uniquely allows the described disassembly and reassembly without damage to other parts of the chuck.

Abstract: A method of cleaning a low dielectric constant film in a lithographic process includes providing a dielectric film having thereover a resist composition, the dielectric film having a dielectric constant no greater than about 4.0, and stripping the resist composition to leave a substantially silicon-containing ash residue on the dielectric film. The method then includes contacting the ash residue with plasma comprising an ionized, essentially pure noble gas such as helium to remove the resist residue without substantially affecting the underlying dielectric film.

Abstract: Methods and apparatus for improving mechanical properties of a dielectric film on a substrate are provided. In some embodiments, the dielectric film is a carbon-doped oxide (CDO). The methods involve the use of modulated ultraviolet radiation to increase the mechanical strength while limiting shrinkage and limiting any increases in the dielectric constant of the film. Methods improve film hardness, modulus and cohesive strength, which provide better integration capability and improved performance in the subsequent device fabrication procedures such as chemical mechanical polishing (CMP) and packaging.