Patents Assigned to Novellus Systems
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Patent number: 7892405Abstract: In one embodiment, a magnetron sputtering apparatus forms a closed plasma loop and an open plasma loop within the closed plasma loop. The open plasma loop allows for relatively uniform erosion on the face of a target by broadening the sputtered area of the target. The open plasma loop may be formed and swirled using a rotating magnetic array to average the target erosion.Type: GrantFiled: January 17, 2007Date of Patent: February 22, 2011Assignee: Novellus Systems, Inc.Inventors: Daniel R. Juliano, Douglas B. Hayden
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Patent number: 7892985Abstract: Improved methods for preparing a low-k dielectric material on a substrate using microwave radiation are provided. The use of microwave radiation allows the preparation of low-k films to be accomplished at low temperatures. According to various embodiments, microwave radiation is used to remove porogen from a precursor film and/or to increase the strength of the resulting porous dielectric layer. In a preferred embodiment, methods involve (a) forming a precursor film that contains a porogen and a structure former on a substrate, (b) exposing the precursor film to microwave radiation to remove the porogen from the precursor film to thereby create voids within the dielectric material and form the porous low-k dielectric layer and (c) exposing the dielectric material to microwave radiation in a manner that increases the mechanical strength of the porous low-k dielectric layer.Type: GrantFiled: November 15, 2005Date of Patent: February 22, 2011Assignee: Novellus Systems, Inc.Inventors: Seon-Mee Cho, George D. Papasouliotis, Mike Barnes
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Patent number: 7887396Abstract: A method and apparatus for ‘through-the-pad’ delivery of slurry polishing agents directly to the land areas of a polishing pad is disclosed. The present invention further provides for improved control of the chemical composition of the slurry to address loss of chemical reactivity of the slurry during the polishing cycle. Additionally, various groove modifications to the polishing surface of the pad are also disclosed for improved slurry retention over substantially the entire surface of the polishing pad and reduction of the slow band effect. The present invention thus provides for a higher degree of planarization and uniformity of material removed from the surface of a processed workpiece in order to eliminate, or otherwise reduce, small-scale roughness and large-scale topographic differentials as well as to reduce the Cost-of-Ownership associated with slurry costs.Type: GrantFiled: March 15, 2006Date of Patent: February 15, 2011Assignee: Novellus Systems, Inc.Inventors: Thomas Laursen, Guangying Zhang
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Patent number: 7887392Abstract: A platen assembly is provided for supporting a polish pad of the type utilized to planarize a wafer. The platen assembly comprises a sensor system and a polish platen having a first surface for supporting the polish pad. The sensor system comprises a flexible sensor and a flexible circuit operatively coupled to the sensor controller. The flexible circuit includes a first flexible sensor disposed proximate the first surface.Type: GrantFiled: June 6, 2007Date of Patent: February 15, 2011Assignee: Novellus Systems, Inc.Inventor: Paul M. Franzen
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Patent number: 7888233Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.Type: GrantFiled: March 25, 2009Date of Patent: February 15, 2011Assignee: Novellus Systems, Inc.Inventors: Vishal Gauri, Raashina Humayun, Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Patent number: 7888273Abstract: Multi-cycle methods result in dense, seamless and void-free dielectric gap fill are provided. The methods involve forming liquid or flowable films that partially fill a gap, followed by a solidification and/or anneal process that uniformly densifies the just-formed film. The thickness of the layer formed is such that the subsequent anneal process creates a film that does not have a density gradient. The process is then repeated as necessary to wholly or partially fill or line the gap as desired. The methods of this invention may be used to line or fill high aspect ratio gaps, including gaps having aspect ratios greater than about 6:1 with widths less than about 0.13 ?m.Type: GrantFiled: August 6, 2007Date of Patent: February 15, 2011Assignee: Novellus Systems, Inc.Inventors: Feng Wang, Victor Y. Lu, Brian Lu, Wai-Fan Yau
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Publication number: 20110025338Abstract: The working electrode in the flow channel of a flow-through electrolytic detection cell is preconditioned by flowing a preconditioning electroplating solution with preconditioner species through the flow channel while applying a negative potential. Flow of liquid through the flow channel is rapidly switched from preconditioning solution to a target solution containing an organic target solute to be measured. The transient response of the system resulting from exposure of the working electrode to organic target solute is detected by measuring current density during an initial transient time period. An unknown concentration of target solute is determined by comparing the transient response with one or more transient responses characteristic of known concentrations. A preferred measuring system is operable to switch flow from preconditioning solution to target solution in about 200 milliseconds or less.Type: ApplicationFiled: August 3, 2009Publication date: February 3, 2011Applicant: Novellus Systems, Inc.Inventors: Mark J. Willey, Lian Guo, Steven T. Mayer
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Patent number: 7879218Abstract: The present invention provides improved methods and devices for electroplating copper on a wafer. Some implementations of the present invention involve the pre-treatment of the wafer with a solution containing accelerator molecules. Preferably, the bath into which the wafer is subsequently placed for electroplating has a reduced concentration of accelerator molecules. The pre-treatment causes a reduction in roughness of the electroplated copper surface, particularly during the initial phases of copper growth.Type: GrantFiled: December 18, 2003Date of Patent: February 1, 2011Assignee: Novellus Systems, Inc.Inventors: Eric Webb, Jon Reid, Yuichi Takada, Timothy Archer
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Patent number: 7871676Abstract: The present invention relates to an enhanced sequential atomic layer deposition (ALD) technique suitable for deposition of barrier layers, adhesion layers, seed layers, low dielectric constant (low-k) films, high dielectric constant (high-k) films, and other conductive, semi-conductive, and non-conductive films. This is accomplished by 1) providing a non-thermal or non-pyrolytic means of triggering the deposition reaction; 2) providing a means of depositing a purer film of higher density at lower temperatures; and, 3) providing a faster and more efficient means of modulating the deposition sequence and hence the overall process rate resulting in an improved deposition method.Type: GrantFiled: November 16, 2006Date of Patent: January 18, 2011Assignee: Novellus Systems, Inc.Inventors: Tony P. Chiang, Karl F. Leeser
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Patent number: 7871678Abstract: The present invention relates to an enhanced cyclic deposition process suitable for deposition of barrier layers, adhesion layers, seed layers, low dielectric constant (low-k) films, high dielectric constant (high-k) films, and other conductive, semi-conductive, and non-conductive films. The technique increases the chemical reactivity of a precursor used in the process.Type: GrantFiled: September 12, 2006Date of Patent: January 18, 2011Assignee: Novellus Systems, Inc.Inventors: Frank Greer, Karl Leeser
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Patent number: 7863190Abstract: Methods for forming thin dielectric films by selectively depositing a conformal film of dielectric material on a high aspect ratio structure have uses in semiconductor processing and other applications. A method for forming a dielectric film involves providing in a deposition reaction chamber a substrate having a gap on the surface. The gap has a top opening and a surface area comprising a bottom and sidewalls running from the top to the bottom. A conformal silicon oxide-based dielectric film is selectively deposited in the gap by first preferentially applying a film formation catalyst or a catalyst precursor on a portion representing less than all of the gap surface area. The substrate surface is then exposed to a silicon-containing precursor gas such that a silicon oxide-based dielectric film layer is preferentially formed on the portion of the gap surface area.Type: GrantFiled: November 20, 2009Date of Patent: January 4, 2011Assignee: Novellus Systems, Inc.Inventors: George D. Papasouliotis, Mihai Buretea, Collin Mui
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Patent number: 7858510Abstract: Protective caps residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Protective caps are formed by depositing a first layer of aluminum-containing material over an exposed copper line by treating an oxide-free copper surface with an organoaluminum compound in an absence of plasma at a substrate temperature of at least about 350° C. The formed aluminum-containing layer is passivated either partially or completely in a chemical conversion which forms Al—N, Al—O or both Al—O and Al—N bonds in the layer. Passivation is performed in some embodiments by contacting the substrate having an exposed first layer with an oxygen-containing reactant and/or nitrogen-containing reactant in the absence of plasma. Protective caps can be formed on substrates comprising exposed ULK dielectric.Type: GrantFiled: January 19, 2010Date of Patent: December 28, 2010Assignee: Novellus Systems, Inc.Inventors: Ananda Banerji, George Andrew Antonelli, Jennifer O'loughlin, Mandyam Sriram, Bart van Schravendijk, Seshasayee Varadarajan
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Patent number: 7854828Abstract: An apparatus for electroplating a layer of metal on the surface of a wafer includes a second cathode located remotely with respect to the wafer. The remotely positioned second cathode allows modulation of current density at the wafer surface during an entire electroplating process. The second cathode diverts a portion of current flow from the near-edge region of the wafer and improves the uniformity of plated layers. The remote position of second cathode allows the insulating shields disposed in the plating bath to shape the current profile experienced by the wafer, and therefore act as a “virtual second cathode”. The second cathode may be positioned outside of the plating vessel and separated from it by a membrane.Type: GrantFiled: August 16, 2006Date of Patent: December 21, 2010Assignee: Novellus Systems, Inc.Inventors: Jonathan Reid, Seshasayee Varadarajan, Bryan Buckalew, Patrick Breiling, Glenn Ibarreta
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Patent number: 7855147Abstract: Copper seed layers are formed on diffusion barrier layers (e.g., on Ta, and TaNx layers) without significant agglomeration of copper, with the use of an engineered barrier layer/seed layer interface. The engineered interface includes an adhesion layer, in which copper atoms are physically trapped and are prevented from migrating and agglomerating. The adhesion layer can include between about 20-80% atomic of copper. The copper atoms of the adhesion layer are exposed during deposition of a copper seed layer and serve as the nucleation sites for the deposited copper. Thin, continuous, and conformal seed layers can be deposited on top of the adhesion layer. The trapping of copper within the adhesion layer is achieved by intermixing diffusion barrier and seed layer materials using PVD and/or ALD.Type: GrantFiled: May 24, 2007Date of Patent: December 21, 2010Assignee: Novellus Systems, Inc.Inventors: Alexander Dulkin, Asit Rairkar, Frank Greer, Anshu A. Pradhan, Robert Rozbicki
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Publication number: 20100317178Abstract: Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus comprises a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, a remote plasma source configured to provide a remote plasma to the load lock, and an ion filter disposed between the remote plasma source and the wafer pedestal.Type: ApplicationFiled: June 12, 2009Publication date: December 16, 2010Applicant: Novellus Systems, Inc.Inventors: George Andrew Antonelli, Jennifer O' Loughlin, Tony Xavier, Mandyam Sriram, Bart Van Schravendijk, Vishwanathan Rangarajan, Seshasayee Varadarajan, Bryan L. Buckalew
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Patent number: 7851232Abstract: A method for the ultraviolet (UV) treatment of carbon-containing low-k dielectric enables process-induced damage repair. The method is particularly applicable in the context of damascene processing. A method provides for forming a semiconductor device by depositing a carbon-containing low-k dielectric layer on a substrate and forming a trench in the low-k dielectric layer, the trench having sidewalls ending at a bottom. The trench is then exposed to UV radiation and, optionally a gas phase source of —CH3 groups, to repair damage to the carbon-containing low-k material of the trench sidewalls and bottom caused by the trench formation process (generally etching, ashing, and wet or dry cleaning). A similar treatment, with or without the gas phase source of —CH3 groups, may be applied to repair damage caused in a subsequent planarization operation.Type: GrantFiled: October 30, 2006Date of Patent: December 14, 2010Assignee: Novellus Systems, Inc.Inventors: Bart van Schravendijk, William Crew
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Patent number: 7842605Abstract: Material is removed from a substrate surface (e.g., from a bottom portion of a recessed feature on a partially fabricated semiconductor substrate) by subjecting the surface to a plurality of profiling cycles, wherein each profiling cycle includes a net etching operation and a net depositing operation. An etching operation removes a greater amount of material than is being deposited by a depositing operation, thereby resulting in a net material etch-back per profiling cycle. About 2-10 profiling cycles are performed. The profiling cycles are used for removing metal-containing materials, such as diffusion barrier materials, copper line materials, and metal seed materials by PVD deposition and resputter. Profiling with a plurality of cycles removes metal-containing materials without causing microtrenching in an exposed dielectric. Further, overhang is reduced at the openings of the recessed features and sidewall material coverage is improved. Integrated circuit devices having higher reliability are fabricated.Type: GrantFiled: May 24, 2007Date of Patent: November 30, 2010Assignee: Novellus Systems, Inc.Inventors: Anshu A. Pradhan, Robert Rozbicki
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Patent number: 7842604Abstract: The present invention provides a low dielectric constant copper diffusion barrier film composed, at least in part, of boron-doped silicon carbide suitable for use in a semiconductor device and methods for fabricating such a film. The copper diffusion barrier maintains a stable dielectric constant of less than 4.5 in the presence of atmospheric moisture.Type: GrantFiled: May 22, 2007Date of Patent: November 30, 2010Assignee: Novellus Systems, Inc.Inventors: Yongsik Yu, Atul Gupta, Karen Billington, Michael Carris, William Crew, Thomas W. Mountsier
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Publication number: 20100278623Abstract: Rotational hardstop assemblies that provide greater than 360 degrees of non-continuous rotation for rotating mechanisms are provided. In certain embodiments, an assembly is used to provide 630 or more degrees of rotation for the shoulder axis of a robot, such as a wafer transfer robot. The rotational hardstop assemblies include opposing magnets as springs. According to various embodiments, the opposing magnets provide non-contact engagement and produce no contact noise nor have any wear over time. The rotational hardstop assemblies provide the ability to location from either direction of rotation of a robot cylindrical coordinate system.Type: ApplicationFiled: April 29, 2009Publication date: November 4, 2010Applicant: Novellus Systems, Inc.Inventors: Rich Blank, Jim Roberts, Wayne Tang, Michael Bergeson
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Patent number: 7820556Abstract: Acetylene is treated to remove some residual storage solvent that may be present with the acetylene in a source of acetylene such as a container. Such treatment may be performed prior to supplying the acetylene to a deposition chamber or other reactor where acetylene is a reactant. After treatment, the acetylene gas stream has a relatively constant concentration of storage solvent, regardless of how much acetylene has been released from the acetylene source. The treatment may involve condensing the storage solvent from the gas stream at a certain temperature and separating the storage solvent from the gas stream.Type: GrantFiled: June 4, 2008Date of Patent: October 26, 2010Assignee: Novellus Systems, Inc.Inventors: Gishun Hsu, Charles Merrill, Scott Stoddard