Patents Assigned to NVidia
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Patent number: 11832416Abstract: Systems and methods for datacenter are disclosed. In at least one embodiment, a system or method herein causes a process for a structure that includes a component tracking system, where such a system includes individual components within individual servers or individual racks, the process being based in part on at least location information and configuration information from one or more of an optical sensor or a radio sensor associated with a motile-support that is adapted for at least three dimensional (3D) movement in a space having the individual servers or the individual racks.Type: GrantFiled: September 6, 2022Date of Patent: November 28, 2023Assignee: NVIDIA CORPORATIONInventors: Ryan Kelsey Albright, William Andrew Mecham, Benjamin Goska, Aaron Richard Carkin, Tahir Cader, William Ryan Weese, Michael Thompson, Jordan Levy, Siddha Ganju, Fred Devoir, Elad Mentovich, Elijah Chen
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Patent number: 11829215Abstract: Systems and methods for cooling a datacenter are disclosed. In at least one embodiment, an alternate cooling loop with its own fluid source and a liquid-to-liquid heat exchanger is used to provide cooling for the at least one computing component alternatively from a secondary cooling loop that is associated with a primary cooling loop and a chilling facility.Type: GrantFiled: November 30, 2020Date of Patent: November 28, 2023Assignee: Nvidia CorporationInventor: Ali Heydari
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Patent number: 11829213Abstract: A cooling system for a datacenter is disclosed. A multiple mode cooling subsystem of the cooling system has a form factor for one or more racks of the datacenter, has two or more different cooling systems, and is adjustable to different cooling requirements of the datacenter within different cooling capacities offered by the two or more different cooling systems.Type: GrantFiled: July 9, 2020Date of Patent: November 28, 2023Assignee: Nvidia CorporationInventor: Ali Heydari
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Patent number: 11831608Abstract: In various examples, firewalls may include machine learning models that are automatically trained and applied to analyze service inputs submitted to input processing services and to identify whether service inputs are desirable (e.g., will result in an undesirable status code if processed by a service). When a service input is determined by a firewall to be desirable, the firewall may push the service input through to the input processing service for normal processing. When a service input is determined by the firewall to be undesirable, the firewall may block or drop the service input before it reaches the input processing service and/or server. This may be used to prevent the service input, which is likely to be undesirable, from touching a server that hosts the input processing service (e.g., preventing a crash).Type: GrantFiled: January 27, 2020Date of Patent: November 28, 2023Assignee: NVIDIA CorporationInventors: Christopher Schneider, William Bartig, Daniel Rohrer, Andrew Woodard
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Patent number: 11830125Abstract: Raytracing can be used to generate high quality, physics-based water caustics patterns in real time. A caustics map is generate to represent locations and normals of points across a water surface. Rays from a light source that are reflected and refracted from these points, as determined by the locations and normals, and can generate hit points on a surface. Neighboring points can be used to help determine the resulting caustics pattern. In one embodiment, information for neighboring points in the caustics map can be used to generate scale factors for geometric regions to be projected onto the surface for each hit point. In another embodiment, these points serve as vertices of a caustic mesh that can be projected onto the surface, where the brightness at a primitive is determined by the size of the primitive area defined by the vertices of the caustics mesh.Type: GrantFiled: June 17, 2022Date of Patent: November 28, 2023Assignee: Nvidia CorporationInventors: Xueqing Yang, Nan Lin
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Publication number: 20230377324Abstract: In various examples, systems and methods are disclosed relating to multi-domain generative adversarial networks with learned warp fields. Input data can be generated according to a noise function and provided as input to a generative machine-learning model. The generative machine-learning model can determine a plurality of output images each corresponding to one of a respective plurality of image domains. The generative machine-learning model can include at least one layer to generate a plurality of morph maps each corresponding to one of the respective plurality of image domains. The output images can be presented using a display device.Type: ApplicationFiled: May 18, 2023Publication date: November 23, 2023Applicant: NVIDIA CorporationInventors: Seung Wook KIM, Karsten Julian KREIS, Daiqing LI, Sanja FIDLER, Antonio TORRALBA BARRIUSO
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Publication number: 20230379746Abstract: Neural network-based structures for action user equipment device detection, estimation of time-of-arrival, and estimation of carrier frequency offset utilized with the narrowband physical random-access channel of wireless communication systems. The structure includes a neural network to generate predictions of active user equipment devices, and a twin neural network to generate time-of-arrival predictions for signals from the user equipment devices and carrier frequency offset predictions for signals from the user equipment devices.Type: ApplicationFiled: March 24, 2023Publication date: November 23, 2023Applicant: NVIDIA Corp.Inventors: Faycal Ait Aoudia, Jakob Hoydis, Sebastian Cammerer, Matthijs Jules Van keirsbilck, Alexander Keller
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Patent number: 11822926Abstract: Apparatuses, systems, and techniques to optimize device communications disclosed. In at least one embodiment, one or more neural networks are used to determine optimal power and frequency states for communication links between processing devices.Type: GrantFiled: September 13, 2019Date of Patent: November 21, 2023Assignee: NVIDIA CorporationInventors: Mitesh Meswani, Kapil Dev
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Patent number: 11824533Abstract: Voltage level conversion circuits include PMOS pull-down devices or NMOS pull-up devices, and inverters with outputs that determine gate voltages of these devices. The inverters are powered by moving supply voltages, for example complementary supply voltages generated from a pair of cross-coupled inverters. The cross-coupled inverters may implement a data storage latch with the moving supply voltages generated from the internal data storage nodes of the latch.Type: GrantFiled: July 25, 2022Date of Patent: November 21, 2023Assignee: NVIDIA CORP.Inventors: Walker Joseph Turner, John Poulton, Sanquan Song
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Patent number: 11823355Abstract: Pixel depth information is used to determine a weight to apply to neighboring pixels when using a sharpening filter. A difference between neighboring pixel depths is evaluated and pixels with pixel depths that exceed a threshold are given less weight than other pixels. A sharpening mask may be generated using adjusted pixel colors.Type: GrantFiled: February 2, 2021Date of Patent: November 21, 2023Assignee: Nvidia CorporationInventor: Pascal Gilcher
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Patent number: 11823320Abstract: In examples, a list of elements may be divided into spans and each span may be allocated a respective memory range for output based on a worst-case compression ratio of a compression algorithm that will be used to compress the span. Worker threads may output compressed versions of the spans to the memory ranges. To ensure placement constraints of a data structure will be satisfied, boundaries of the spans may be adjusted prior to compression. The size allocated to a span (e.g., each span) may be increased (or decreasing) to avoid padding blocks while allowing for the span's compressed data to use a block allocated to an adjacent span. Further aspects of the disclosure provide for compaction of the portions of compressed data in memory in order to free up space which may have been allocated to account for the memory gaps which may result from variable compression ratios.Type: GrantFiled: March 7, 2022Date of Patent: November 21, 2023Assignee: NVIDIA CorporationInventors: Timo Tapani Viitanen, Tero Tapani Karras, Samuli Laine
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Patent number: 11822398Abstract: Systems and methods for cooling a datacenter are disclosed. In at least one embodiment, an alternate cooling loop with its own fluid source and a liquid-to-air heat exchanger is used to provide cooling for the at least one computing component alternatively from a secondary cooling loop that is associated with a primary cooling loop and a chilling facility.Type: GrantFiled: November 30, 2020Date of Patent: November 21, 2023Assignee: NVIDIA CorporationInventor: Ali Heydari
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Patent number: 11823415Abstract: An autoencoder may be trained to predict 3D pose labels using simulation data extracted from a simulated environment, which may be configured to represent an environment in which the 3D pose estimator is to be deployed. Assets may be used to mimic the deployment environment such as 3D models or textures and parameters used to define deployment scenarios and/or conditions that the 3D pose estimator will operate under in the environment. The autoencoder may be trained to predict a segmentation image from an input image that is invariant to occlusions. Further, the autoencoder may be trained to exclude areas of the input image from the object that correspond to one or more appendages of the object. The 3D pose may be adapted to unlabeled real-world data using a GAN, which predicts whether output of the 3D pose estimator was generated from real-world data or simulated data.Type: GrantFiled: March 3, 2021Date of Patent: November 21, 2023Assignee: NVIDIA CorporationInventors: Sravya Nimmagadda, David Weikersdorfer
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Patent number: 11822541Abstract: Various techniques for accelerating Smith-Waterman sequence alignments are provided. For example, threads in a group of threads are employed to use an interleaved cell layout to store relevant data in registers while computing sub-alignment data for one or more local alignment problems. In another example, specialized instructions that reduce the number of cycles required to compute each sub-alignment score are utilized. In another example, threads are employed to compute sub-alignment data for a subset of columns of one or more local alignment problems while other threads begin computing sub-alignment data based on partial result data received from the preceding threads. After computing a maximum sub-alignment score, a thread stores the maximum sub-alignment score and the corresponding position in global memory.Type: GrantFiled: September 30, 2021Date of Patent: November 21, 2023Assignee: NVIDIA CORPORATIONInventors: Maciej Piotr Tyrlik, Ajay Sudarshan Tirumala, Shirish Gadre
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Patent number: 11823318Abstract: Techniques are disclosed herein for interleaving textures. In the disclosed techniques, multiple textures that would otherwise be accessed separately are interleaved into a single, interleaved texture that can be used to access the multiple textures together. The interleaved texture can include alternating blocks from the multiple textures. The interleaved texture can be generated when the multiple textures are being loaded into memory. Further, the interleaved texture can be accessed using multiple texture headers that are associated with different textures in the interleaved texture. Each of texture headers includes a stride indicating the distance between two blocks from a same texture in the interleaved texture.Type: GrantFiled: June 4, 2021Date of Patent: November 21, 2023Assignee: NVIDIA CORPORATIONInventors: Tomas Akenine-Moller, Michael Fetterman, Steven James Heinrich
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Patent number: 11822491Abstract: Fabric Attached Memory (FAM) provides a pool of memory that can be accessed by one or more processors, such as a graphics processing unit(s) (GPU)(s), over a network fabric. In one instance, a technique is disclosed for using imperfect processors as memory controllers to allow memory, which is local to the imperfect processors, to be accessed by other processors as fabric attached memory. In another instance, memory address compaction is used within the fabric elements to fully utilize the available memory space.Type: GrantFiled: October 20, 2021Date of Patent: November 21, 2023Assignee: NVIDIA CorporationInventors: John Feehrer, Denis Foley, Mark Hummel, Vyas Venkataraman, Ram Gummadi, Samuel H. Duncan, Glenn Dearth, Brian Kelleher
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Patent number: 11824791Abstract: A switching system having input ports and output ports and comprising an input queued (IQ) switch with virtual channels. Typically, only one virtual channel can, at a given time, access a given output port. Typically, the IQ switch includes an arbiter apparatus that controls the input ports and output ports to ensure that an input port transmits at most one cell at a time, and/or that an output port receives a cell over only one virtual channel, and/or an output port receives at most one cell at a time.Type: GrantFiled: October 22, 2021Date of Patent: November 21, 2023Assignee: NVIDIA CORPORATIONInventors: Anil Mugu, Srijith Haridas
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Patent number: 11823319Abstract: One embodiment of a method for rendering one or more graphics images includes tracing one or more rays through a graphics scene; computing one or more surface normals associated with intersections of the one or more rays with one or more surfaces, where computing each surface normal includes: computing a plurality of intermediate surface normals associated with a plurality of adjacent voxels of a grid, and interpolating the plurality of intermediate surface normals; and rendering one or more graphics images based on the one or more surface normals.Type: GrantFiled: February 17, 2022Date of Patent: November 21, 2023Assignee: NVIDIA CorporationInventors: Herman Hansson Soederlund, Alex Evans, Tomas Akenine-Moller
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Patent number: 11823321Abstract: Recurrent blurring may be used to render frames of a virtual environment, where the radius of a filter for a pixel is based on a number of successfully accumulated frames that correspond to that pixel. To account for rejections of accumulated samples for the pixel, ray-traced samples from a lower resolution version of a ray-traced render may be used to increase the effective sample count for the pixel. Parallax may be used to control the accumulation speed along with an angle between a view vector that corresponds to the pixel. A magnitude of one or more dimensions of a filter applied to the pixel may be based on an angle of a view vector that corresponds to the pixel to cause reflections to elongate along an axis under glancing angles. The dimension(s) may be based on a direction of a reflected specular lobe associated with the pixel.Type: GrantFiled: September 12, 2022Date of Patent: November 21, 2023Assignee: NVIDIA CorporationInventors: Dmitriy Zhdan, Evgeny Makarov
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Patent number: 11816890Abstract: In various examples, one or more Machine Learning Models (MLMs) are used to identify content items in a video stream and present information associated with the content items to viewers of the video stream. Video streamed to a user(s) may be applied to an MLM(s) trained to detect an object(s) therein. The MLM may directly detect particular content items or detect object types, where a detection may be narrowed to a particular content item using a twin neural network, and/or an algorithm. Metadata of an identified content item may be used to display a graphical element selectable to acquire the content item in the game or otherwise. In some examples, object detection coordinates from an object detector used to identify the content item may be used to determine properties of an interactive element overlaid on the video and presented on or in association with a frame of the video.Type: GrantFiled: August 20, 2021Date of Patent: November 14, 2023Assignee: NVIDIA CorporationInventors: Alexander Hropak, Andrew Fear
