Patents Assigned to NVidia
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Patent number: 10715817Abstract: A method and apparatus for enhancing motion estimation based on user input are provided. The motion estimation apparatus used for video encoding comprises a receiver operable to receive a user based input and an input analysis module operable to analyzed the user based input. The apparatus also comprises an encoder that is operable to compute displacement coordinates from the analyzed user based input for a current block in a target frame of a video stream and operable to determine a search area in a reference frame to search for a best match for the current block using the displacement coordinates. The encoder can also comprise a block match module operable to find a best match block for the current block in the search area of the reference frame using a block matching procedure.Type: GrantFiled: December 19, 2012Date of Patent: July 14, 2020Assignee: NVIDIA CORPORATIONInventor: Helix He
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Patent number: 10713838Abstract: The present invention facilitates efficient and effective image processing. A network can comprise: a first system configured to perform a first portion of lighting calculations for an image and combing results of the first portion of lighting calculations for the image with results of a second portion of lighting calculations; and a second system configured to perform the second portion of lighting calculations and forward the results of the second portion of the lighting calculations to the first system. The first and second portion of lighting calculations can be associated with indirect lighting calculations and direct lighting calculations respectively. The first system can be a client in a local location and the second system can be a server in a remote location (e.g., a cloud computing environment). The first system and second system can be in a cloud and a video is transmitted to a local system.Type: GrantFiled: May 5, 2014Date of Patent: July 14, 2020Assignee: NVIDIA CorporationInventors: Morgan McGuire, David Luebke, Cyril Crassin, Peter-Pike Sloan, Peter Shirley, Brent Oster, Christopher Wyman, Michael Mara
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Patent number: 10713756Abstract: One aspect of the current disclosure provides a method of upscaling an image. The method includes: rendering an image, wherein the rendering includes generating color samples of the image at a first resolution and depth samples of the image at a second resolution, which is higher than the first resolution; and upscaling the image to an upscaled image at a third resolution, which is higher than the first resolution, using the color samples and the depth samples.Type: GrantFiled: May 1, 2018Date of Patent: July 14, 2020Assignee: Nvidia CorporationInventors: Rouslan Dimitrov, Lei Yang, Chris Amsinck, Walter Donovan, Eric Lum, Rui Bastos
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Patent number: 10705994Abstract: A unified cache subsystem includes a data memory configured as both a shared memory and a local cache memory. The unified cache subsystem processes different types of memory transactions using different data pathways. To process memory transactions that target shared memory, the unified cache subsystem includes a direct pathway to the data memory. To process memory transactions that do not target shared memory, the unified cache subsystem includes a tag processing pipeline configured to identify cache hits and cache misses. When the tag processing pipeline identifies a cache hit for a given memory transaction, the transaction is rerouted to the direct pathway to data memory. When the tag processing pipeline identifies a cache miss for a given memory transaction, the transaction is pushed into a first-in first-out (FIFO) until miss data is returned from external memory. The tag processing pipeline is also configured to process texture-oriented memory transactions.Type: GrantFiled: May 4, 2017Date of Patent: July 7, 2020Assignee: NVIDIA CorporationInventors: Xiaogang Qiu, Ronny Krashinsky, Steven Heinrich, Shirish Gadre, John Edmondson, Jack Choquette, Mark Gebhart, Ramesh Jandhyala, Poornachandra Rao, Omkar Paranjape, Michael Siu
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Patent number: 10705525Abstract: A method, computer readable medium, and system are disclosed for performing autonomous path navigation using deep neural networks. The method includes the steps of receiving image data at a deep neural network (DNN), determining, by the DNN, both an orientation of a vehicle with respect to a path and a lateral position of the vehicle with respect to the path, utilizing the image data, and controlling a location of the vehicle, utilizing the orientation of the vehicle with respect to the path and the lateral position of the vehicle with respect to the path.Type: GrantFiled: March 28, 2018Date of Patent: July 7, 2020Assignee: NVIDIA CorporationInventors: Nikolai Smolyanskiy, Alexey Kamenev, Jeffrey David Smith, Stanley Thomas Birchfield
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Patent number: 10705790Abstract: A virtual reality (VR) audio rendering system and method include spatializing microphone-captured real-world sounds according to a VR setting. In a game streaming system, when a player speaks through a microphone, the voice is processed by geometrical acoustic (GA) simulation configured for a virtual scene, and thereby spatialized audio effects specific to the scene are added. The GA simulation may include generating an impulse response using sound propagation simulation and dynamic HRTF-based listener directivity. When the GA-processed voice of the player is played, the local player or other fellow players can hear it as if the sound travels in the scenery and according to the geometries in the virtual scene. This mechanism can advantageously place the players' chatting in the same virtual world like built-in game audio, thereby advantageously providing enhanced immersive VR experience to users.Type: GrantFiled: November 7, 2018Date of Patent: July 7, 2020Assignee: NVIDIA CORPORATIONInventors: Ambrish Dantrey, Anshul Gupta
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Patent number: 10706608Abstract: A method, computer readable medium, and system are disclosed for performing tree traversal with backtracking in constant time. The method includes the steps of traversing a tree, maintaining a bit trail variable and a current key variable during the traversing, where the bit trail variable includes a first plurality of bits indicating tree levels on which a node has been postponed along a path from the root of the tree during the traversing, and the current key variable includes a second plurality of bits indicating a number of a current node within the tree, and performing backtracking within the tree during the traversing, utilizing the bit trail variable and the current key variable.Type: GrantFiled: January 18, 2017Date of Patent: July 7, 2020Assignee: NVIDIA CorporationInventors: Nikolaus Binder, Alexander Keller
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Publication number: 20200211674Abstract: The present invention provides methods, systems, computer program products that use deep learning with neural networks to denoise ATAC-seq datasets. The methods, systems, and programs provide for increased efficiency, accuracy, and speed in identifying genomic sites of chromatin accessibility in a wide range of tissue and cell types.Type: ApplicationFiled: December 31, 2018Publication date: July 2, 2020Applicant: NVIDIA CorporationInventors: Johnny ISRAELI, Nikolai YAKOVENKO
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Publication number: 20200210276Abstract: An error reporting system utilizes a parity checker to receive data results from execution of an original instruction and a parity bit for the data. A decoder receives an error correcting code (ECC) for data resulting from execution of a shadow instruction of the original instruction, and data error correction is initiated on the original instruction result on condition of a mismatch between the parity bit and the original instruction result, and the decoder asserting a correctable error in the original instruction result.Type: ApplicationFiled: March 6, 2020Publication date: July 2, 2020Applicant: NVIDIA Corp.Inventors: Michael Sullivan, Siva Hari, Brian Zimmer, Timothy Tsai, Stephen W. Keckler
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Patent number: 10699383Abstract: Methods are disclosed herein to blur an image to be displayed on a stereo display (such as virtual or augmented reality displays) based on the focus and convergence of the user. The methods approximate the complex effect of chromatic aberration on focus, utilizing three (R/G/B) simple Gaussian blurs. For transparency the methods utilize buffers for levels of blur rather than depth. The methods enable real-time chromatic-based blurring effects for VR/AR displays.Type: GrantFiled: December 10, 2018Date of Patent: June 30, 2020Assignee: NVIDIA Corp.Inventors: Morgan McGuire, Kaan Aksit, Pete Shirley, David Luebke
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Patent number: 10700846Abstract: A system for data and clock recovery includes a timing error detector, a phase detector, and a phase increment injector. The phase increment injector may be used to determine an increment to affect an output of the phase detector or a clocking element. A sign of the increment is determined from a sign or direction of an accumulated version of a clock and data recovery gradient value.Type: GrantFiled: April 16, 2019Date of Patent: June 30, 2020Assignee: NVIDIA Corp.Inventors: Pervez Mirza Aziz, Vishnu Balan, Viswanath Annampedu
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Patent number: 10699447Abstract: A plurality of processors with logic units to train one or more neural networks for image construction, at least in part, using established one or more levels of compression for image data from a region of interest (ROI).Type: GrantFiled: September 13, 2019Date of Patent: June 30, 2020Assignee: Nvidia CorporationInventor: Shekhar Dwivedi
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Patent number: 10699427Abstract: Methods and apparatuses are disclosed for reporting texture footprint information. A texture footprint identifies the portion of a texture that will be utilized in rendering a pixel in a scene. The disclosed methods and apparatuses advantageously improve system efficiency in decoupled shading systems by first identifying which texels in a given texture map are needed for subsequently rendering a scene. Therefore, the number of texels that are generated and stored may be reduced to include the identified texels. Texels that are not identified need not be rendered and/or stored.Type: GrantFiled: August 12, 2019Date of Patent: June 30, 2020Assignee: NVIDIA CorporationInventors: Yury Uralsky, Henry Packard Moreton, Eric Brian Lum, Jonathan J. Dunaisky, Steven James Heinrich, Stefano Pescador, Shirish Gadre, Michael Alan Fetterman
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Patent number: 10694164Abstract: The disclosure is directed to a method to generate a stereoscopic video image stream of a zenith or nadir view perspective of a scene. In another aspect, a system is disclosed for generating a zenith or nadir view perspective utilizing a relative user view orientation. In yet another aspect, a video processing computer is disclosed operable to generate a zenith or nadir view perspective utilizing a user view orientation.Type: GrantFiled: July 31, 2019Date of Patent: June 23, 2020Assignee: Nvidia CorporationInventor: David Cook
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Patent number: 10692244Abstract: A deep neural network (DNN) system learns a map representation for estimating a camera position and orientation (pose). The DNN is trained to learn a map representation corresponding to the environment, defining positions and attributes of structures, trees, walls, vehicles, etc. The DNN system learns a map representation that is versatile and performs well for many different environments (indoor, outdoor, natural, synthetic, etc.). The DNN system receives images of an environment captured by a camera (observations) and outputs an estimated camera pose within the environment. The estimated camera pose is used to perform camera localization, i.e., recover the three-dimensional (3D) position and orientation of a moving camera, which is a fundamental task in computer vision with a wide variety of applications in robot navigation, car localization for autonomous driving, device localization for mobile navigation, and augmented/virtual reality.Type: GrantFiled: September 20, 2018Date of Patent: June 23, 2020Assignee: NVIDIA CorporationInventors: Jinwei Gu, Samarth Manoj Brahmbhatt, Kihwan Kim, Jan Kautz
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Patent number: 10691572Abstract: Memory, used by a computer to store data, is generally prone to faults, including permanent faults (i.e. relating to a lifetime of the memory hardware), and also transient faults (i.e. relating to some external cause) which are otherwise known as soft errors. Since soft errors can change the state of the data in the memory and thus cause errors in applications reading and processing the data, there is a desire to characterize the degree of vulnerability of the memory to soft errors. In particular, once the vulnerability for a particular memory to soft errors has been characterized, cost/reliability trade-offs can be determined, or soft error detection mechanisms (e.g. parity) may be selectively employed for the memory. A method, computer readable medium, and system are provided for using liveness as a factor to evaluate memory vulnerability to soft errors.Type: GrantFiled: August 28, 2018Date of Patent: June 23, 2020Assignee: NVIDIA CorporationInventors: Richard Gavin Bramley, Philip Payman Shirvani, Nirmal R. Saxena
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Patent number: 10685925Abstract: Systems and methods that facilitate resistance and capacitance balancing are presented. In one embodiment, a system comprises: a plurality of ground lines configured to ground components; and a plurality of signal bus lines interleaved with the plurality of ground lines, wherein the interleaving is configured so that plurality of signal bus lines and plurality of ground lines are substantially evenly spaced and the plurality of signal bus lines convey a respective plurality of signals have similar resistance and capacitance constants that are balanced. The plurality of signals can see a substantially equal amount ground surface and have similar amounts of capacitance. The plurality of signal bus lines can have similar cross sections and lengths with similar resistances. The plurality of signal bus lines interleaved with the plurality of ground lines can be included in a two copper layer interposer design with one redistribution layer (RDL).Type: GrantFiled: January 26, 2018Date of Patent: June 16, 2020Assignee: NVIDIA CORPORATIONInventors: Jim Dobbins, Sheetal Jain, Don Templeton, Yaping Zhou, Wenjun Shi, Sunil Sudhakaran
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Patent number: 10684824Abstract: A method, computer readable medium, and system are disclosed for rounding numerical values. A set of bits from an input value is identified as a rounding value. A second set of bits representing a second value is extracted from the input value and added with the rounding value to produce a sum. The sum is truncated to produce the rounded output value. Thus, the present invention provides a stochastic rounding technique that rounds up an input value as a function of a second value and a rounding value, both of which were obtained from the input value. When the second value and rounding value are obtained from consistent bit locations of the input value, the resulting output value is deterministic. Stochastic rounding, which is deterministic, is advantageously applicable in deep learning applications.Type: GrantFiled: June 6, 2018Date of Patent: June 16, 2020Assignee: NVIDIA CorporationInventors: Jonah M. Alben, Paulius Micikevicius, Hao Wu, Ming Yiu Siu
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Patent number: 10681321Abstract: The present disclosure is directed to a process to partially or fully suppress, or limit, pixel coloration errors. These pixel coloration errors, represented by small noise values, can be introduced during signal processing of high dynamic range (HDR) video signals. Converting visual content to a half precision floating point representation, for example, FP16, can introduce small amounts of signal noise due to value rounding. The noise can be multiplied and accumulated during HDR signal processing resulting in visual artifacts and degraded image quality. The disclosure can detect these noise amounts in pixel color component values, and suppress, or partially suppress, the noise to prevent the noise from accumulating during subsequent HDR signal processing.Type: GrantFiled: October 10, 2018Date of Patent: June 9, 2020Assignee: Nvidia CorporationInventors: Yanbo Sun, Gennady Petrov, Lauri Hyvarinen, Weiwan Liu, Dong Han Ryu
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Publication number: 20200177521Abstract: A switch architecture enables ports to stash packets in unused buffers on other ports, exploiting excess internal bandwidth that may exist, for example, in a tiled switch. This architecture leverages unused port buffer memory to improve features such as congestion handling and error recovery.Type: ApplicationFiled: December 4, 2019Publication date: June 4, 2020Applicant: NVIDIA Corp.Inventors: Matthias Augustin Blumrich, Nan Jiang, Larry Robert Dennison