Abstract: A low power frequency synthesizer circuit for a radio transceiver, the synthesizer circuit comprising: a digital controlled oscillator configured to generate an output signal (Fo) having a frequency controlled by an input digital control word (DCW); a feedback loop connected between an output and an input of the digital controlled oscillator, the feedback loop configured to provide the digital control word to the input of the digital controlled oscillator from an error derived from an input frequency control word (FCW) and the output signal; and a duty cycle module connected to the digital controlled oscillator and the feedback loop, the duty cycle module configured to generate a plurality of control signals to periodically enable and disable the digital controlled oscillator for a set fraction of clock cycles of an input reference clock signal (RefClock).

Abstract: Embodiments of a voltage reference circuit are described. In one embodiment, a voltage reference circuit includes a startup circuit configured to generate a startup current and to be turned off in response to a comparison between the startup current and a current threshold, an amplifier connected to the startup circuit and configured to generate an amplified current using a positive current feedback loop in response to the startup current, and a proportional to absolute temperature (PTAT) current generator configured to generate a temperature-independent reference voltage in response to the startup current and the amplified current. Other embodiments are also described.

Abstract: According to an aspect of the invention, an NFC device for communicating with an NFC reader is conceived, the NFC device comprising an NFC integrated circuit, an antenna unit connected to said NFC integrated circuit, and a detuning circuit, wherein the detuning circuit is arranged to cause a periodic detuning of the antenna unit to a detuned state, such that data transmission between the NFC device and the NFC reader may take place periodically while the NFC device and the NFC reader remain within communication range of each other.

Abstract: Controllers (360, 360?), lighting circuits and methods are disclosed, for a dimmable LED lighting circuit having a series arrangement of two types of LED, the controller comprising a control circuit (330), a bypass circuit (340) and optionally a further bypass circuit and being operable for controlling a current, the current (Idriver) being separable into first and second parts (IW, IB), and into further first and second parts, wherein the controller is configured to direct the (further) first part through the LED or LEDs of the second (first) type and direct the (further) second part through the (further) bypass circuit (respectively), and wherein the control circuit is configured to adjust the ratio between the first, or further first, part and the second, or further second respectively, part in dependence on a dimming level of the LED lighting circuit.

Abstract: The invention provides a method of forming an electric field gap device, such as a lateral field emission ESD protection structure, in which a cathode layer is formed between dielectric layers. Anode channels are formed and they are lined with a sacrificial dielectric layer. Conductive anode pillars are formed in the anode channels, and then the sacrificial dielectric layer is etched away in the vicinity of the anode pillars. The etching leaves a suspended portion of the cathode layer which defines a lateral gap to an adjacent anode pillar. This portion has a sharp end face defined by the corners of the cathode layer and the lateral gap can be defined accurately as it corresponds to the thickness of the sacrificial dielectric layer.

Abstract: Presented is radio frequency antenna circuit for portable and/or compact electronic devices. Embodiments comprise an antenna connected to an unbalanced current feeding arrangement. The unbalanced feeding arrangement may generate common mode currents which increase the overall radiation resistance and efficiency of the antenna circuit.

Abstract: A semiconductor ESD protection device comprising a vertical arrangement of alternating conductivity type layers, wherein the layers are arranged as silicon controlled rectifier and wherein the silicon controlled rectifier is arranged as vertical device and having top and bottom opposing contacts.

Abstract: An embedded device (1) having a memory (2) that is organized to store both data objects (DO1-DOx) and meta data (MD) which describes the locations at which the data objects are stored in the memory (2), the embedded device (1) which is connectable to a remote defragmentation device (3) is disclosed. The embedded device (1) is adapted to transmit, at the request of the defragmentation device (3), the meta data (MD) and optionally the data objects (DO1-DOx) stored in the memory (2) to the defragmentation device (3) and, in accordance with instructions and data received from the defragmentation device (3), to update in its memory (2) the meta data (MD) and to store the data objects (DO1-DOx) at locations as defined in the updated meta data (MD).

Abstract: A reference output device includes a low side selector configured to select a first voltage level as an output signal. The output signal is a reference voltage. The reference output device also includes a high side selector configured to select a second voltage level as the output signal. The reference output device also includes a slew rate control configured to switch the output signal between the first voltage level and the second voltage level at a constant slew rate.

Abstract: The electric device (100) according to the invention comprises a layer (107) of a memory material which has an electrical resistivity switchable between a first value and a second value. The memory material may be a phase change material. The electric device (100) further comprises a set of nanowires (NW) electrically connecting a first terminal (172) of the electric device and the layer (107) of memory material thereby enabling conduction of an electric current from the first terminal via the nanowires (NW) and the layer (107) of memory material to a second terminal (272) of the electric device. Each nanowire (NW) electrically contacts the layer (107) of memory material in a respective contact area. All contact areas are substantially identical. The method according to the invention is suited to manufacture the electric device (100) according to the invention.

Abstract: Embodiments of variable gain transimpedance amplifiers are described. In an embodiment, the variable gain transimpedance amplifier may include an amplifier coupled to an adjustable gain feedback network, the adjustable gain feedback network including a selectable set of Resistor-Capacitor (RC) branches, each RC branch having one or more unit RC elements, each unit RC element being comprised of a unit resistor and a unit capacitor arranged in parallel.

Abstract: There is described a method of controlling application access to predetermined functions of a mobile device (240), the method comprising (a) providing a set of keys, each key corresponding to one of the predetermined functions, (b) receiving (225) an application from an application provider (220, 221, 222, 223) together with information identifying a set of needed functions, (c) generating a signed application by signing the received application with each of the keys that correspond to one of the needed functions identified by the received information, and (d) transmitting (227) information identifying the needed functions and the signed application and a set of access rules to a Secure Element of the mobile device (240). There is also described a device for controlling application access and a system for controlling and authenticating application access. Furthermore, there is described a computer program and a computer program product.

Abstract: A device includes a transmission circuit that is configured and arranged to transmit data in accordance with a signal bus protocol that uses passive bias to set a signal bus to a recessive value in the absence of an actively-driven signal value. The transmission circuit includes a first driver circuit that is configured and arranged to actively drive the signal bus to a dominant value that is different from the recessive value. The transmission circuit also includes a second driver circuit that is configured and arranged to actively drive the signal bus to the recessive value. A control circuit is configured and arranged to disable the second driver circuit in response to the device operating in a first data transmission mode, and to enable the second driver circuit in response to the device entering a second transmission mode.

Abstract: Various aspects of the present disclosure are directed to detecting crossings such as zero crossings that can pose problems to circuit operation. In accordance with an example embodiment, two or more circuits are implemented for detecting signal crossings of an electrical signal during respective time cycles, such that at least one of the circuits is operating to detect such a crossing at all times. Each circuit undergoes a reset condition, which is controlled to ensure that at least one circuit remains operating for detecting zero crossing.

Abstract: A method of manufacturing a semiconductor device includes forming trench isolation structures, exposing some of the trench isolation structures 28 to leave others 30 masked, and then selectively etching a buried layer to form a cavity 32 under an active device region 34. The active device region 34 is supported by support regions in the exposed trenches 28. The buried layer may be a SiGe layer on a Si substrate.

Abstract: An automatic gain control (AGC) circuit based on a cascade of a step automatic gain control unit and a second automatic gain control unit connected to adjust their gain in a synchronized manner to result in a combined impulsive gain variation. Hereby it is possible, e.g. to use a step automatic gain control unit instead of a continuous automatic gain control unit in an RF part of a TV tuner without resulting in visual artifacts—this applies both for digital and analog TV tuners. According to a preferred embodiment, the synchronization between the two automatic gain control units may be achieved by the first automatic gain control unit generating a control signal upon gain adjustment, this control signal serving to speed up a loop bandwidth controlling gain change of the second automatic gain control unit. In another embodiment, the control signal generated by the first automatic gain control unit is used to control a gain step of the second automatic gain control unit.

Abstract: A sensor package includes a lead frame with a first portion extending and a second portion extending in a direction inclined with respect to the first potion. The sensor package also includes an application specific integrated circuit and a magneto resistive sensor and a ferrite provided with a molding body.

Abstract: Embodiments of an apparatus are disclosed. In an embodiment, a power receiver unit is disclosed. The power receiver unit includes a power pick-up unit, a communication modulator, and a filter. The power pick-up unit receives a wireless power signal. The communication modulator applies a modulation to the received wireless power signal. The filter suppresses a load signal from a load of the wireless charge receiver to prevent interference with the modulation.

Abstract: Embodiments of systems and methods for blending multi-channel signals are described. In one embodiment, a method for blending multi-channel signals involves computing component signals from the multi-channel signals, cross-fading the component signals based on different temporal rates to generate cross-faded component signals and generating a blended multi-channel signal based on the cross-faded component signals. Other embodiments are also described.

Abstract: An electronic ballast for lighting applications is disclosed. The electronic ballast comprises a first charge pump having an input capacitor (13) charged with a supply current drawn from a power source by application of a charging voltage to the input capacitor (13), the magnitude of the supply current being proportional to the magnitude of the charging voltage; and a voltage booster (16, 17) for generating a boost voltage, which is used to augment the charging voltage, thereby increasing the current drawn from the power source.