Abstract: Embodiments of systems and methods for performing channel estimation on Orthogonal frequency-division multiplexing (OFDM) signals are described. In one embodiment, a method for performing channel estimation on an OFDM signal involves performing blind channel phase estimation on an OFDM signal to obtain channel phase information and performing blind channel magnitude estimation on the OFDM signal to obtain channel magnitude information. Each of performing blind channel phase estimation on the OFDM signal and performing blind channel magnitude estimation on the OFDM signal involves detecting and suppressing a signal path of the OFDM signal. Other embodiments are also described.

Abstract: An LED control circuit for controlling a current supplied to an LED unit is disclosed. A sense resistor is included for sensing an output current provided from an output node. A comparator circuit is provided for detecting upper and lower thresholds in the output current based on the voltages at ends of the sense resistor, and for controlling a current supply to maintain the current between the thresholds. The comparator circuit comprises a reference current source and reference resistors, for generating upper and lower threshold references. The comparator circuit further comprises a comparator for detecting a mid-range voltage dependent on the output current and deriving a control signal which indicates if the detected voltage is above or below the mid-range voltage. The control signal is used to adjust the reference current source, thereby to vary the upper and lower threshold references to maintain a constant median or average output current.

Abstract: A radio frequency communication device has data transmission means and data receiving means. The data transmission means comprise load modulating means being adapted to receive a radio frequency carrier signal emitted by another RF communication device and to modulate the RF carrier signal by means of load modulation in accordance with data to be sent. The data receiving means comprise a RF frequency carrier signal generator being adapted to emit a radio frequency carrier signal and load demodulating means being connected to an emission path of the radio frequency carrier signal and demodulating the radio frequency carrier signal when it has been load modulated by another RF communication device.

Abstract: Disclosed is a ROM memory device including a plurality of rows and columns of memory cells, each memory cell including a bit line pair and a transistor to store two bits of data therein, and a virtual ground line disposed between adjacent pairs of bit line pairs, wherein the bit line pair and virtual ground line are used to read data stored in the memory cells.

Abstract: A FlexRay network guardian including: a resetting leading coldstart node (RLCN) detector configured to detect a RLCN failure; a deaf coldstart node (DCN) detector configured to detect a DCN failure; a babbling idiot (BI) detector configured to detect a BI failure; and a FlexRay network decoder configured to output a signal regarding the status of the FlexRay network to the RLCN detector, DCN detector, and BI detector, wherein the RLCN detector, DCN detector, and BI detector are configured to send an indication of a failure to a containment module.

Abstract: A wireless charging apparatus and method utilizing a secure element is disclosed. Illustratively, a receiver containing a secure element securely communicates with a charging pad also equipped with a secure element. The communication can be used to establish the identity of the receiver and facilitate billing for the wireless charging. The charging pad may further communicate in a secure manner with a server to authenticate the identity and other information about the receiver before providing wireless charging. Direct communication between the receiver and server is also contemplated.

Abstract: A method is described for manufacturing a magnetic sensor module (100, 200, 300, 400) having magnetic sensor elements (130, 330, 430) monolithically integrated at a semiconductor chip (110) which comprises an integrated circuit.

Abstract: A method of transmitting routing information within a network is disclosed. In an embodiment, the method involves providing a message including a digital word in which at least each node in the mesh network other than the one node and the another node is represented by a single binary bit. The binary bit associated with each node is set to one value if the node is in the preferred route and the other value if the node is not in the preferred route.

Abstract: Circuit protection is provided. In accordance with one or more example embodiments, a thyristor-based circuit and a diode-based circuit are connected in series between an internal circuit terminal and reference terminal, for protecting the internal circuit terminal against circuit stresses such as overvoltage and/or overcurrent, as may be associated with electrostatic discharge. The thyristor and diode-based circuits operate in a first mode at which leakage current is limited by the thyristor, and in a second (protection) mode in which a voltage at the internal terminal exceeds a threshold level at which the thyristor-based circuit operates in a forward-biased mode and the diode operates in a breakdown mode, for shunting current between the internal circuit terminal and reference terminal.

Abstract: Embodiments of a method for providing electrostatic discharge (ESD) protection for an Input/Output (I/O) device, an ESD protection device for an I/O device, and an I/O device are described. In one embodiment, a method for providing ESD protection for an I/O device involves activating a switch device to turn off the I/O device during an ESD event and deactivating the switch device to turn on the I/O device in the absence of an ESD event. Other embodiments are also described.

Abstract: Aspects of the present disclosure are directed to addressing impedance-matching issues. As may be implemented in connection with one or more embodiments, an apparatus includes an integrated circuit (IC) chip having a signal-connection terminal and processing circuitry that passes signals along a communication path that is within the IC chip and connected to the signal-connection terminal. Impedance-matching circuitry operates to provide impedance-matching for the communication path, therein mitigating signal loss due to impedance-mismatching. A chip-mounting structure secures the IC chip and electrically connects thereto at the signal-connection terminal.

Abstract: Various aspects of the present disclosure include a controlled current path having a load that draws current from the controlled current path. In response to a modulating voltage signal, current is controlled through the load which causes a transistor circuit, including a transistor, to switch between two current modes. Switching will subject the transistor to voltage stresses due to current in the controlled current path spiking towards a breakdown threshold of the transistor. In response to a first aspect of the modulating voltage signal and in one of the current modes, the current in the controlled current path is directed through the first current branch. In response to a second aspect of the modulating voltage signal and in the other current mode, the current in the controlled current path is diverted from the first current branch to a second current branch.

Abstract: A electromagnetic induction wireless communication system including: a magnetic antenna; an electric antenna; a tuning capacitor coupled to the magnetic antenna configured to tune the magnetic antenna; a controller configured to control the operation of the communication system; a signal source coupled to the controller configured to produce a communication signal used to drive the magnetic antenna and the electric antenna; a voltage control unit coupled to the signal source configured to produce one of an amplitude difference, phase difference, and an amplitude and a phase difference between the communication signal used to drive the magnetic antenna and electric antenna.

Abstract: In order to reduce the inter-path capacitance of an inductor, an integrated circuit inductor design is provided in which the path crossings are designed such that the voltage differences between the adjacent paths in the loops are (in total) minimized.

Abstract: Consistent with an example embodiment, there is a method for assembling a wafer level chip scale processed (WLCSP) wafer; The wafer has a topside surface and an back-side surface, and a plurality of device die having electrical contacts on the topside surface. The method comprises back-grinding, to a thickness, the back-side surface the wafer. A protective layer of a thickness is molded onto the backside of the wafer. The wafer is mounted onto a sawing foil; along saw lanes of the plurality of device die, the wafer is sawed, the sawing occurring with a blade of a first kerf and to a depth of the thickness of the back-ground wafer. Again, the wafer is sawed along the saw lanes of the plurality of device die, the sawing occurring with a blade of a second kerf, the second kerf narrower than the first kerf, and sawing to a depth of the thickness of the protective layer. The plurality of device die are separated into individual device die.

Abstract: A method of obscuring software code including a plurality of instructions, comprising: determining, by a processor, a number N prior instructions to a current instruction; encoding the current instruction based upon a first function, a second function, and the N prior instructions, wherein the second function is based upon the N prior instructions, and wherein the first function is based upon the current instruction and an output of the second function.

Abstract: A time manager controls one or more timing functions on a circuit. The time manager includes a data storage and a time calculator. The data storage device stores a first indication of a performance characteristic of a memory cell at a first time. The data storage device also stores a second indication of the performance characteristic of the memory cell at a second time. The time calculator is coupled to the data storage device. The time calculator calculates a time duration between the first time and the second time based on a change in the performance characteristic of the memory cell from the first indication to the second indication.

Abstract: According to an example embodiment of the present disclosure, a method is provided for controlling a light-emitting-diode (LED) circuit. The method includes receiving a direct current to direct current (DC-to-DC) control signal at a DC-to-DC converter. A DC voltage is generated from an input DC voltage source. The DC voltage has a voltage level that is set according to the DC-to-DC control signal. The DC voltage is provided to an LED circuit output. The DC voltage level from the DC-to-DC converter is determined. The DC-to-DC converter control signal is generated in response to the determined DC voltage level. The LED circuit is determined to have a short circuit based upon the determined DC voltage. In response to determining that the LED circuit has a short circuit, the DC-to-DC converter is disabled from providing the DC voltage to the output for powering an LED circuit.

Abstract: The present invention relates to an electronic device for driving a light emitting diode, which includes a switch (Ts) being adapted to switch a switch-mode power converter, and controlling means (CNTL) being adapted for controlling the switch (Ts) in response to a sensing value (Vs) indicative of a current of the switch-mode power converter and for controlling by the switch (Ts) the output voltage of the switched power converter and a current (Iout) through the light emitting diode.

Abstract: For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.