Patents Assigned to NXP
  • Patent number: 8682273
    Abstract: Digital spur reduction in which spurs are kept outside selected channels of interest, with illustrative embodiments relating to an integrated radiofrequency transceiver circuit having digital and analogue components, the circuit having a radiofrequency signal receiver with a local oscillator signal generator configured to provide a local oscillator signal at a frequency fLO and a mixer configured to combine an input radiofrequency signal with the local oscillator signal to produce an intermediate frequency signal; and a clock signal generator configured to generate a digital clock signal at a frequency fDIG for operation of the digital components, where the local oscillator signal and/or a reference signal from which the local oscillator signal is derived are generated such that digital spurs lie outside a band selected by the receiver.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: March 25, 2014
    Assignee: NXP, B.V.
    Inventors: Vincent Fillatre, Jean-Robert Tourret
  • Patent number: 8679963
    Abstract: A chip scale package has a semiconductor die having an array of die bond pads arranged with a bond pad density per unit area, embedded in a molded die support body having a surface supporting an array of conducting contacts, each of the contacts connected by an electrical lead to a corresponding one of the die bond pads.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: March 25, 2014
    Assignee: NXP B.V.
    Inventors: Jan Gulpen, Tonny Kamphuis, Pieter Hochstenbach, Leo Van Gemert, Eric Van Grunsven, Marc De Samber
  • Patent number: 8679355
    Abstract: A method of manufacturing an electronic device that comprises a microelectromechanical (MEMS) element, the method comprising the steps of: providing a material layer (34) on a first side of a substrate (32); providing a trench (40) in the material later (34); etching material from the trench (40) such as to also etch the substrate (32) from the first side of the substrate (32); grinding the substrate (32) from a second side of the substrate to expose the trench (40); and using the exposed trench (40) as an etch hole. The exposed trench (40) is used as an etch hole for releasing a portion of the material layer (34), for example a beam resonator (12), from the substrate (32). An input electrode (6), an output electrode (8), and a top electrode (10) are provided.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: March 25, 2014
    Assignee: NXP, B.V.
    Inventors: Hauke Pohlmann, Ronald Dekker, Joerg Mueller, Martin Duemling
  • Patent number: 8680868
    Abstract: A battery cell measurement system comprising a signal generator coupled to a pulse density modulation circuit generating a control signal which drives a switch connected between a first terminal of a battery cell and a first terminal of a bleeding impedance, a second terminal of the bleeding impedance being coupled to a second battery cell terminal. The first terminal is coupled to a first terminal of a second switch. The second terminal is coupled to a first terminal of a third switch. A second terminal of the second switch and second terminal of the third switch are coupled and are further coupled to a low-pass filter. A signal generated by the low-pass filter is inputted into an analog to digital converter, which provides a signal representative of either a signal across the bleeding impedance, or a signal between the battery cell terminals.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: March 25, 2014
    Assignee: NXP B.V.
    Inventors: Johannes Petrus Maria van Lammeren, Matheus Johannus Gerardus Lammers
  • Patent number: 8681853
    Abstract: A pulse density modulation, PDM, driver, outputs a PDM stream and can be switched to a control token. The switch takes place when the first integral of the PDM stream has a magnitude less than or equal to a first predetermined value and the second integral of the PDM stream has a magnitude less than or equal to a second predetermined value.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: March 25, 2014
    Assignee: NXP B.V.
    Inventor: Lûtsen Ludgerus Albertus Hendrikus Dooper
  • Patent number: 8680850
    Abstract: A magnetoresistive angular sensing method is disclosed. In a first mode, a first dc external magnetic field in a predetermined direction is applied to an angular sensor arrangement in which the external magnetic field dominates over a magnetic field generated by an input device an angular position of which is to be sensed. In a second mode, a second external magnetic field is applied to the angular sensor. Outputs of the angular sensor arrangement in the two modes are processed to determine an angular orientation of the input device with offset voltage compensation.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: March 25, 2014
    Assignee: NXP B.V.
    Inventors: Victor Zieren, Robert Hendrikus Margaretha van Veldhoven
  • Patent number: 8681416
    Abstract: A single-segment drive scheme for an electronic paper display (EPD) is replaced by a multiplexed drive scheme that reduces the number of driver pins to the number of display segments per digit or alphanumeric character plus one input/output (I/O) line per digit or alphanumeric character. In accordance with the invention, a passive digit selection mechanism enables a multiplex display drive scheme when the EPD material used typically has a stable threshold combined with a small hysteresis. Typically, display operation is better the smaller the hysteresis and the more stable the threshold of the EPD material that is used.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: March 25, 2014
    Assignee: NXP B.V.
    Inventor: Thomas Suwald
  • Patent number: 8682559
    Abstract: The application of braking force to drive components that move a vehicle is controlled. As consistent with one or more example embodiments, an integrated circuit chip is located at each of two or more drive components (e.g., wheels) of a vehicle for controlling the application of a braking force to the drive component independently of the application of braking force to other drive components. Each of the integrated circuit chips communicate with one another over a vehicle network, with brake control (e.g., using an algorithm to limit wheel slip) being carried out separately at each drive component.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: March 25, 2014
    Assignee: NXP B.V.
    Inventors: Nils Kolbe, Marcus Prochaska
  • Patent number: 8680677
    Abstract: Electrical connection in an integrated circuit arrangement is facilitated with carbon nanotubes. According to various example embodiments, a carbon nanotube material (120, 135) is associated with another material (130, 125) such as a metal. The carbon nanotube material facilitates the electrical connection between different circuit components.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: March 25, 2014
    Assignee: NXP B.V.
    Inventor: Christopher Wyland
  • Publication number: 20140077877
    Abstract: An amplifier circuit comprising a driver (204, 304) configured to provide a switched mode input signal, a switching mode power amplifier (206, 306) configured to receive the switched mode input signal and provide an output signal for an external load (210, 310); and a sensor (208, 308) configured to sense the impedance of the external load (210, 310) The driver is configured to set the duty cycle of the switched mode input signal in accordance with the sensed impedance of the external load (210, 310).
    Type: Application
    Filed: September 13, 2013
    Publication date: March 20, 2014
    Applicant: NXP B.V.
    Inventors: Koen Buisman, Mark Pieter van der Heijden, Mustafa Acar, Leo de Vreede
  • Publication number: 20140077842
    Abstract: Embodiments of a power-on and brown-out detector are described. In an embodiment, a power-on and brown-out detector for a power supply includes a power-on detection module, a brown-out detection module, and a logic module. The power-on detection module is connected to the power supply and is configured to generate a power-on signal in response to a voltage increase of the power supply. The brown-out detection module is connected to the power supply and is configured to generate a brown-out signal in response to a voltage charge by the power supply and a subsequent voltage decrease of the power supply. The logic module is configured to generate a control signal in response to the power-on signal and the brown-out signal. The power-on detection module is further configured to be activated or deactivated by the control signal. Other embodiments are also described.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: NXP B.V.
    Inventors: JUNMOU ZHANG, JIAN QING
  • Publication number: 20140082373
    Abstract: Embodiments of a method are disclosed. One embodiment is a method for securely updating firmware in a computing device, in which the computing device includes a host processor and a non-volatile memory. The method involves receiving a double-encrypted firmware image from an external firmware source, wherein the double-encrypted firmware image is generated from firmware that is encrypted a first time using a first crypto-key and then encrypted a second time using a second crypto-key. The method also involves receiving the second crypto-key from an external key source, decrypting the double-encrypted firmware image using the second crypto-key to produce an encrypted firmware image, storing the encrypted firmware image in the non-volatile memory of the computing device, reading the encrypted firmware image from the non-volatile memory of the computing device, decrypting the encrypted firmware image using the first crypto-key, and executing the firmware on the computing device.
    Type: Application
    Filed: September 19, 2012
    Publication date: March 20, 2014
    Applicant: NXP B.V.
    Inventor: VINCENT CEDRIC COLNOT
  • Publication number: 20140077791
    Abstract: Embodiments of a voltage reference circuit are described. In one embodiment, a voltage reference circuit includes a startup circuit configured to generate a startup current and to be turned off in response to a comparison between the startup current and a current threshold, an amplifier connected to the startup circuit and configured to generate an amplified current using a positive current feedback loop in response to the startup current, and a proportional to absolute temperature (PTAT) current generator configured to generate a temperature-independent reference voltage in response to the startup current and the amplified current. Other embodiments are also described.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: NXP B.V.
    Inventor: JUNMOU ZHANG
  • Publication number: 20140079109
    Abstract: A channel frequency response estimator for estimating the channel frequency response of a wireless RF channel having a time or frequency varying channel frequency response is disclosed. The channel frequency response estimator includes a wireless receiver. An ambiguous channel frequency response estimator is also included and configured to establish multiple channel frequency response estimate candidates for the channel frequency response of the channel. An ambiguity resolver is configured to select a channel frequency response estimate from the multiple channel frequency response estimate candidates that maximizes a goodness of fit of the selected first channel frequency response estimate, and at least two further channel frequency response estimates to a channel model. The channel model models the time or frequency dependent variance of the channel frequency response.
    Type: Application
    Filed: August 20, 2013
    Publication date: March 20, 2014
    Applicant: NXP B.V.
    Inventor: Semih SERBETLI
  • Publication number: 20140078626
    Abstract: Conditions such as overvoltage/overcurrent (e.g., electrostatic discharge (ESD)) are addressed via a current-shunting approach. As may be consistent with one or more embodiments, an apparatus includes a transistor that couples an output signal, and a thyristor-based shunt circuit having a p-type anode connected to an n-type base including a highly-doped region that forms a drain of the transistor, a p-type base connected to the n-type base and including a channel of the transistor, and an n-type cathode connected to the p-type base. A resistor is coupled to pass current presented at the p-type anode directly to the drain, and to forward-bias a p-n junction between the p-type anode and the n-type base in response to an overvoltage type condition, therein shunting current via the shunt circuit.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: NXP B.V.
    Inventor: Gijs de Raad
  • Publication number: 20140082429
    Abstract: According to an aspect of the invention, a method for monitoring the state of health of an electronic data carrier is conceived, wherein a reader device operable to read data from said electronic data carrier determines the state of health of the electronic data carrier by reading a parameter value indicative of said state of health from the electronic data carrier. According to a further aspect of the invention, a system for monitoring the state of health of an electronic data carrier is provided, the system comprising a reader device operable to read data from said electronic data carrier, wherein said reader device is arranged to determine the state of health of the electronic data carrier by reading a parameter value indicative of said state of health from the electronic data carrier.
    Type: Application
    Filed: September 13, 2013
    Publication date: March 20, 2014
    Applicant: NXP B.V.
    Inventors: Klaas Brink, Manvi Agarwal, Ghiath Al-kadi
  • Patent number: 8673772
    Abstract: A method of forming a biosensor chip enables a bond pad and detector electrode to be formed of different materials (one is formed of a connection layer such as copper and the other is formed of a diffusion barrier layer such as tantalum or tantalum nitride). A single planarizing operation is used for both the bond pad and the detector electrode. By using the same processing, resist patterning on an already-planarized surface is avoided, and the cleanliness of both the bond pad and detector electrode is ensured. Self-aligned nanoelectrodes and bond pads are obtained.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: March 18, 2014
    Assignee: NXP B.V.
    Inventor: Frans Widdershoven
  • Patent number: 8675132
    Abstract: A system, apparatus, and method are provided for a video detector that computes a measure of how much a given video content resembles one of a de-interlaced video content or a progressive video content. More particularly, the present invention determines the position of original and interpolated lines and the scaling factor of an input content whenever that content was scaled after de-interlacing.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: March 18, 2014
    Assignee: NXP B.V.
    Inventors: Dmitry Znamenskiy, Claus Nico Cordes
  • Patent number: 8674559
    Abstract: Consistent with example embodiment, a DC-DC converter is adapted to supply a MEMS device comprising an input for receiving a DC voltage (Vs), an output for transmitting a supplied voltage (V1) to the MEMS device. The DC-DC converter further comprises a biasing circuit (MNBC) for biasing a first node (Vmi) and a second node (Vme) with a first biasing voltage (Vm1) and a second biasing voltage (Vm2).
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: March 18, 2014
    Assignee: NXP B.V.
    Inventor: Jagdip Singh
  • Patent number: 8674726
    Abstract: Aspects of the instant disclosure are directed toward apparatuses that generate a power-related adjustment signal in response to the power signal. Digital-input-signal pads are included to communicate digital signals with a circuit external to the apparatus. Further, digital-input processing circuitry receives the digital signals from the digital-input-signal pad, and processes the received digital signals. Additionally, configuration circuitry applies the power-related adjustment signal to signals received at the digital-input-signal pad and, in response, detects the digital signals received.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: March 18, 2014
    Assignee: NXP B.V.
    Inventor: Sharad Murari