Abstract: An exemplary memory device has at least one memory chip that stores data and error correcting information. An error detecting circuit in the memory chip performs a calculation on the data and error correcting information to obtain error detection information indicating the locations of bit errors in the data. The uncorrected data and the error detection information are output from the memory chip. The uncorrected data and error detection information may also be output from the memory device, or the memory device may include a memory controller chip with an error correcting circuit that uses the error detection information to correct the bit errors and outputs corrected data from the memory device.

Abstract: An interference wave detecting apparatus includes a first Fourier transformer for frequency-converting a received signal; an extractor for extracting a known information signal from the frequency-converted received signal; an interpolator for performing interpolation to the known information signal in frequency domain, generating a first transmission path estimation signal as a frequency-domain information signal; an inverse Fourier transformer for inverse-Fourier-transforming the known information signal, generating a time-domain information signal; a waveform shaping section for shaping a waveform of the time-domain information signal; a second Fourier transformer for Fourier-transforming the shaped time-domain information signal, generating a second transmission path estimation signal as a frequency-domain information signal; and a comparing-computing section for comparing the first and second transmission path estimation signals, generating an interference wave detection result which indicates a ratio of

Abstract: The present disclosure provides a brushless motor driving circuit capable of clamping an output voltage at a proper voltage, even when a power source voltage changes. Namely, a pre-driver circuit generates a voltage for driving a brushless motor from a source voltage by turning on/off first and second PMOS transistors and first and second NMOS transistors in an H bridge circuit of a drive voltage generating circuit, and applies the voltage to a coil of the brushless motor. A first clamp circuit turns on/off the first NMOS transistor on the ground side so that the output voltage at a first output terminal becomes equal to or lower than the source voltage. A second clamp circuit turns on/off the second NMOS transistor on the ground side so that output voltage at a second output terminal becomes equal to or lower than the source voltage.

Abstract: A frequency synthesizer device that includes two modulation paths and suitably adjusts the amplitude of a control voltage that is outputted from a digital-to-analog converter (DAC) to a voltage-controlled oscillator. The frequency synthesizer device is provided with a voltage-controlled oscillator, a programmable frequency divider, a frequency phase comparator, a DAC, a switch and a modulation frequency displacement correction circuit. The voltage-controlled oscillator oscillates at an oscillation frequency depending on an input voltage. The programmable frequency divider frequency-divides a signal from the voltage-controlled oscillator. The frequency phase comparator outputs a phase difference between the frequency-divided signal and a reference clock. The DAC outputs an adjustment voltage. The switch connects the voltage-controlled oscillator to a reference voltage power source at a time of correction of the adjustment voltage.

Abstract: A drive circuit for driving a display panel includes a first operation amplifier for operating using a first power source voltage and a second power source voltage; a second operation amplifier for operating using a third power source voltage and a fourth power source voltage; a control unit for supplying a first control voltage and a second control voltage; and a switch circuit for switching the first operation amplifier and the second operation amplifier. The switch circuit includes an n-channel type field effect transistor. The control unit applies the first control voltage to the n-channel type field effect transistor, so that the n-channel type field effect transistor transits from a non-conductive state to a conductive state.

Abstract: A circuit board has an embedded electronic component such as an integrated circuit chip with a wafer level chip size package. A via hole extends through the electronic component. Another via hole extends through the substrate or prepreg on which the electronic component is mounted inside the circuit board. Conductors in the via holes enable a terminal on the surface of the electronic component to be electrically connected to a wiring pattern or another electronic component on the opposite side of the substrate or prepreg. Routing the connection through the electronic component itself saves space and reduces the length of the connection.

Abstract: A detecting device has: a detecting element to which a first constant voltage is applied; a resistance element connected to the detecting element; a switching element having a first terminal to the resistance element, a second terminal controlled to a second constant voltage lower than the first constant voltage, and a control terminal sets the first terminal and the second terminal in a conducting state; a control unit, according to a conducting/non-conducting state, controls voltage to the control terminal to maintain a potential difference between the detecting element and the resistance element; and an AD converter converting, into a digital value, a potential of a potential difference between the first constant voltage and the first terminal being voltage-divided at the detecting element and the resistance element to the detecting element, a first reference potential is the first constant voltage, and a second reference potential is voltage to the first terminal.

Abstract: A method of printing on a semiconductor wafer, a manufacturing method of a semiconductor device, and a semiconductor device which enable to easily perform positioning in the direction perpendicular to the top of the wafer and to easily identify the type of the wafer. The manufacturing method includes preparing a semiconductor wafer having a structure in which an element forming film is stacked on the top of an insulative transparent substrate, forming a light reflection film to reflect light for positioning on the bottom of the transparent substrate, irradiating a laser from the side at which the element forming film is disposed so as to form printed letters at the light reflection film, forming a semiconductor element at the element forming film, forming an interlayer dielectric film to cover the element forming film and the semiconductor element, forming a contact wire, and forming a metal wire on the interlayer dielectric film.

Abstract: A semiconductor device includes a semiconductor chip having a plurality of electrode pads, and a rewiring pattern having a plurality of interconnects connected to the electrode pads and extending over insulation film. The semiconductor device includes a plurality of columnar electrodes each having a main body section and a protrusion section, and a sealing section having a top face having a height the same as the top faces of the protrusion sections. The semiconductor device includes solder balls formed on the protrusion sections and has a plurality of trenches in the sealing section. Each trench has a depth which reaches the boundary between the main body and protrusion of the electrode. The side faces of the protrusion section are exposed by the trenches. Each solder ball is electrically connected to the top and side faces of the protrusion section of each electrode.

Abstract: There is provided a channel estimating method of performing frequency conversion by a first fast Fourier transformation on a reception signal and extracting a desired signal after demodulating the reception signal, and deriving electrical energy against time delay of a channel by inverse fast Fourier transformation of the extracted result, wherein: values of a low pass filter, having an output from oversampling the input to the first fast Fourier transformation, are thinned by a plurality of thinning circuits with the same synchronization and different discrete times, and based on the outputs of the plurality of thinning circuits, the electrical energy against time delay related to the reception signal arrival time position is derived by respectively performing the first fast Fourier transformation and the inverse fast Fourier transformation.

Abstract: A semiconductor memory circuit includes a memory cell array having a plurality of memory cells arranged in a row direction and a column direction; a row selecting unit for selecting the memory cells of the memory cell array aligned in the row direction; a column selecting unit for selecting the memory cells of the memory cell array aligned in the column direction; a plurality of main bit lines for outputting data of the memory cells; a data reading unit for reading data of one of the memory cells selected with the row selecting unit and the column selecting unit; a first multiplexer for connecting one of the main bit lines connected to the memory cell to the data reading unit; and a second multiplexer for connecting an adjacent main bit line situated adjacently outside the main bit line to a charging/discharging voltage source for setting at a specific voltage.

Abstract: A method of producing a semiconductor device includes: a dicing step of dicing a wafer member using a dicing blade to form a cut portion in the wafer member, in which the wafer member is formed of a wafer portion, a glass substrate, and an adhesive layer for bonding the wafer portion and the glass substrate in a thickness direction of the wafer member so that the cut portion penetrates the wafer portion and the adhesive layer and reaches a part of the glass substrate; and an individual piece dividing step of dividing the wafer member into a plurality of semiconductor devices with the cut portion as a fracture initiation portion.

Abstract: Disclosed is a means for stabilizing quality of a semiconductor device by preventing projections from being formed in the bottom of a through hole. A method of manufacturing a semiconductor device includes a process of forming a through hole reaching a metal nitride layer through an interlayer insulating layer on a semiconductor wafer on which the wiring layer, the metal nitride layer formed on the wiring layer, and the interlayer insulating layer covering the wiring layer and the metal nitride layer are formed. The through hole forming process includes: a first etching step of etching the interlayer insulating layer by an anisotropic etching method with the semiconductor wafer set to a first temperature; and a second etching step of etching an upper surface of metal nitride layer by an anisotropic etching method with the semiconductor wafer set to a second temperature higher than the first temperature.

Abstract: There is provided a semiconductor device including: plural first output pads formed along one edge of an outer periphery of a substrate; plural second output pads formed along at least one of an edge at an opposite side of the substrate from the one edge, and an edge adjoining the one edge; plural internal circuits, each of which is provided with an output terminal connected with an output pad of one of the first output pads and the second output pads; plural first lines, each of which connects one of the output terminals of the internal circuits with one of the plurality of first output pads; and plural second lines, each of which connects one of the output terminals of the internal circuits with one of the plural second output pads, resistance values per unit of wiring length being lower in the second lines than in the first lines.

Abstract: A wireless key system and location detection method determine whether a wireless key is located inside or outside a main body. A communication device in the main body transmits a wireless signal using an inner antenna and an outer antenna outside the main body having a different directivity. A wireless key measures direction of movement of the wireless key when the wireless signal is received by one of antennas having different directivities, detects one of the antennas receiving the highest signal level of the wireless signal as a first antenna, selects one of the antennas having the same directivity as the inner antenna as a second antenna according to the measured direction of movement and detected directivity of the antenna, and decides that the wireless key is inside the main body based on the signal levels of the wireless signals received by the first and second antennas.

Abstract: A data transfer system which can surely transfer data between two function circuits which operate synchronously with different clock frequencies. A data loading signal is generated just before timing when edges of two clocks of different frequencies coincide. Only information data received by the function circuit on a transfer data reception side within an existence period of the data loading signal is determined to be valid.

Abstract: A driving voltage output circuit for a matrix display panel includes high-side voltage followers and low-side voltage followers. Each voltage follower includes a differential input stage, a control stage, and an output stage. First and second transistors in the differential input stage receive non-inverting and inverting inputs and produce first and second potentials that control the control stage. Third and fourth transistors of different channel types in the control stage are connected in a push-pull configuration between high-side and low-side power supply potentials to generate a control potential. Fifth and sixth transistors of identical channel types in the output stage are connected in series between an intermediate reference potential and one of the power supply potentials, and are controlled by the first potential and the control potential to generate an output potential. The output potential is fed back as the inverting input.

Abstract: A chip forming position specifying method for applying chip IDs indicative of positions on a wafer where semiconductor chips are formed, and thereby specifying their positions. In the chip forming position specifying method, different marks are formed for every chip in a transfer mask (hereinafter called “mark forming mask”) used to form a wiring layer, in addition to normal functional wirings. The positions of the chips on the wafer are respectively specified according to combinations of the marks of a plurality of the mark forming masks, which have been transferred onto the wafer.

Abstract: An improved manufacturing method for semiconductor devices is provided. This method can prevent chips and cracks from being generated when the rear face of the semiconductor substrate is polished. The manufacturing method includes preparing a semiconductor substrate having a front face and a rear face. The front face has an inner surface area and a peripheral surface area. Circuit elements are provided in the inner surface area of the semiconductor substrate. The manufacturing method also includes sealing the circuit elements with circuit sealing resin. The manufacturing method also includes providing cured resin in the peripheral surface area of the semiconductor substrate. The manufacturing method also includes polishing the rear face of the semiconductor substrate after the circuit sealing step. The manufacturing method also includes cutting the semiconductor substrate after the substrate polishing step so as to obtain semiconductor devices.

Abstract: A sound effect circuit and processing method are disclosed. An input audio signal is input to a digital sound effect unit, an output signal is generated and output with a sound effect in accordance with an effect amount of a certain value from the input audio signal using the digital sound effect unit, the input audio signal is also input to a silence state detection unit, a silence detect signal is generated and output when detecting that the current state of the input audio signal is a silence state using the silence state detection unit, the output signal is input to a sound effect amount control unit, and an output audio signal is output using the sound effect amount control unit, wherein the sound effect amount control unit changes the effect amount to be smaller than the certain value when the silence detect signal is generated.