Patents Assigned to PACT XPP Technologies AG
  • Patent number: 6859869
    Abstract: A data processing system, wherein a data flow processor (DFP) integrated circuit chip is provided which comprises a plurality of orthogonally arranged homogeneously structured cells, each cell having a plurality of logically same and structurally identically arranged modules. The cells are combined and facultatively grouped using lines and columns and connected to the input/output ports of the DFP. A compiler programs and configures the cells, each by itself and facultatively-grouped, such that random logic functions and/or linkages among the cells can be realized. The manipulation of the DFP configuration is performed during DFP operation such that modification of function parts (MACROs) of the DFP can take place without requiring other function parts to be deactivated or being impaired.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: February 22, 2005
    Assignee: PACT XPP Technologies AG
    Inventor: Martin Vorbach
  • Patent number: 6728871
    Abstract: A cascadable arithmetic and logic unit (ALU) which is configurable in function and interconnection. No decoding of commands is needed during execution of the algorithm. The ALU can be reconfigured at run time without any effect on surrounding ALUs, processing units or data streams. The volume of configuration data is very small, which has positive effects on the space required and the configuration speed. Broadcasting is supported through the internal bus systems in order to distribute large volumes of data rapidly and efficiently. The ALU is equipped with a power-saving mode to shut down power consumption completely. There is also a clock rate divider which makes it possible to operate the ALU at a slower clock rate. Special mechanisms are available for feedback on the internal states to the external controllers.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: April 27, 2004
    Assignee: PACT XPP Technologies AG
    Inventors: Martin Vorbach, Robert Münch
  • Patent number: 6721830
    Abstract: A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (for cascading).
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: April 13, 2004
    Assignee: PACT XPP Technologies AG
    Inventors: Martin Vorbach, Robert Münch
  • Patent number: 6697979
    Abstract: An arrangement and a method are provided for replacing defective units, which can be any desired unit of a chip (e.g., arithmetic and logic units), with a function unit. The arrangement and the method provide for performing self-tests more easily, less expensively and before or during a running of an application program. Fault tolerance is greatly enhanced during operation, which is advantageous for failure-critical applications such as in power plants, aviation, space travel or the military, for example.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: February 24, 2004
    Assignee: Pact XPP Technologies AG
    Inventors: Martin Vorbach, Robert Münch
  • Patent number: 6687788
    Abstract: A method of caching commands in microprocessors having a plurality of arithmetic units and in modules having a two- or multidimensional cell arrangement is provided. The method includes combining a plurality of cells and arithmetic units to form a plurality of groups, assigning a cache unit to a group, and connecting the cache unit to a higher level unit via a tree structure. The cache unit may send requests for required commands to the higher level cache unit, which may return a command sequence including the required command, if the higher level cache unit holds the first command sequence including the required command in the higher level cache unit's local memory.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: February 3, 2004
    Assignee: Pact XPP Technologies AG
    Inventors: Martin Vorbach, Robert Münch
  • Patent number: 6571381
    Abstract: A method of deadlock-free, automatic configuration and reconfiguration of modules having a two- or multidimensional cell arrangement, in which a unit for controlling the configuration and reconfiguration manages a set of associated configurable elements, the set being a subset or the total set of all configurable elements, and the management takes place as follows: reconfiguration requests from the associated configurable elements are sent to the unit; the unit processes the requests; the unit processes the configuration data of the command sequence; and after the configuration data has been fully processed, new requests are accepted again, the configuration data still to be loaded of the existing previous requests being loaded from a buffer memory (FILMO) into the configurable elements until a new request occurs.
    Type: Grant
    Filed: January 9, 2001
    Date of Patent: May 27, 2003
    Assignee: PACT XPP Technologies AG
    Inventors: Martin Vorbach, Robert Münch