Patents Assigned to Phison Electronics Corp.
-
Publication number: 20240201857Abstract: A decoding method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending at least one read command sequence instructing to read a first physical unit in a rewritable non-volatile memory module; receiving response data from the rewritable non-volatile memory module, wherein the response data includes a plurality of identification bits, and the plurality of identification bits reflect a voltage variation of a first bit line where a first memory cell in the first physical unit is located during a discharge process; determining a decoding parameter corresponding to the first memory cell according to the plurality of identification bits; and decoding data read from the first memory cell according to the decoding parameter.Type: ApplicationFiled: February 14, 2023Publication date: June 20, 2024Applicant: Phison Electronics Corp.Inventors: Po-Cheng Su, Yu-Cheng Hsu, Wei Lin
-
Publication number: 20150234692Abstract: A memory management method, a memory control circuit unit using the method, and a memory storage apparatus using the method are provided. The memory management method includes determining whether a use count of the rewritable non-volatile memory module is greater than a use count threshold; based on a result of the determination, sorting each physical erasing unit in a spare area in an ascending manner according to an erasing count of each physical erasing unit in the spare area or according to the number of maximum bit errors of the physical erasing units in the spare area, so as to form a plurality of sorted physical erasing units; and selecting the foremost physical erasing unit from the spare area to write data according to the sorted physical erasing units. By applying the memory management method, the lifespan of the rewritable non-volatile memory module may be effectively prolonged.Type: ApplicationFiled: April 28, 2014Publication date: August 20, 2015Applicant: Phison Electronics Corp.Inventor: Chien-Hua Chu
-
Publication number: 20150149701Abstract: A time estimating method, a memory storage device, and a memory controlling circuit unit are provided for a rewritable non-volatile memory module having memory cells. The method includes: writing first data into first memory cells of the memory cells; reading the first memory cells according to a reading voltage, so as to determine whether each of the first memory cells belongs to a first state or a second state; and calculating a quantity of the first memory cells belonging to the first state, and obtaining a time information of the rewritable non-volatile memory module according to the quantity.Type: ApplicationFiled: January 16, 2014Publication date: May 28, 2015Applicant: Phison Electronics Corp.Inventors: Wei Lin, Yu-Cheng Hsu
-
Patent number: 9037782Abstract: A method of programming memory cells for a rewritable non-volatile memory module is provided. The method includes: receiving a command which indicates performing an update operation to a logical page; and identifying valid logical access addresses and invalid logical access addresses in the logical page according to the command. The method also includes: selecting a physical page; setting flags corresponding to the valid logical access addresses in a valid state, setting flags corresponding to the invalid logical access in an invalid state; programming the flags and data belonging to the valid logical access addresses to the selected physical page based on the update operation; and mapping the selected physical page to the logical page. Accordingly, the method can effectively increase the speed of programming the memory cells.Type: GrantFiled: June 21, 2012Date of Patent: May 19, 2015Assignee: Phison Electronics Corp.Inventors: Kian-Fui Seng, Ming-Hui Tseng, Ching-Hsien Wang
-
Patent number: 9032135Abstract: A data protecting method for a rewritable non-volatile memory module having physical blocks is provided, a plurality of logical block addresses is mapped to a part of the physical blocks. The method includes, configuring a plurality of virtual block addresses to map to the logical block addresses, grouping at least one virtual block address into a virtual block address area, and allocating the virtual block address area to an application. The method also includes, receiving an access command which is configured to instruct accessing a first virtual block address from the application. The method also includes: determining whether the first virtual block address belongs to the virtual block address area, if not, sending an error message to the application. Accordingly, the method can effectively prevent an application from accessing the data which can not be accessed by the application program.Type: GrantFiled: June 8, 2012Date of Patent: May 12, 2015Assignee: Phison Electronics Corp.Inventor: Ching-Wen Chang
-
Patent number: 9020086Abstract: A clock data recovery circuit module including a clock recovery circuit, a frequency comparison circuit and a signal detecting circuit is provided. The clock recovery circuit is configured to output a data recovery stream and a data recovery clock based on an input signal and a clock signal. The frequency comparison circuit is coupled to the clock recovery circuit. The frequency comparison circuit is configured to compare a frequency difference between the data recovery clock and the clock signal to adjust the frequency of the clock signal based on a comparison result. The signal detecting circuit is coupled to the frequency comparison circuit. The signal detecting circuit is configured to receive and detect the input signal, and the signal detecting circuit determines whether to enable the frequency comparison circuit according to the detection result. Furthermore, a method for generating a data recovery clock is also provided.Type: GrantFiled: March 28, 2013Date of Patent: April 28, 2015Assignee: Phison Electronics Corp.Inventors: Chih-Ming Chen, An-Chung Chen
-
Patent number: 9021218Abstract: A method for writing updated data into a flash memory module having a plurality of physical pages is provided, wherein each physical page is the smallest writing unit of the flash memory module. The method includes partitioning a physical page into storage segments and configuring a state mark for each storage segment, wherein the state marks indicate the validity of data stored in the storage segments. The method also includes writing the updated data into at least one of the storage segments and changing the state mark corresponding to the storage segment containing the updated data, wherein the state mark corresponding to the storage segment containing the updated data indicates a valid state, and the state marks corresponding to the other storage segments of the physical page not containing the updated data indicate an invalid state. Thereby, the time for writing data into a physical page is effectively shortened.Type: GrantFiled: January 10, 2014Date of Patent: April 28, 2015Assignee: Phison Electronics Corp.Inventor: Chih-Kang Yeh
-
Patent number: 9019770Abstract: A data reading method for a rewritable non-volatile memory module is provided. The method includes applying a test voltage to a word line of the rewritable non-volatile memory module to read a plurality of verification bit data. The method also includes calculating a variation of bit data identified as a first status among the verification bit data, obtaining a new read voltage value set based on the variation, and updating a threshold voltage set for the word line with the new read voltage value set. The method further includes using the updated threshold voltage set to read data from a physical page formed by memory cells connected to the word line. Accordingly, storage states of memory cells in the rewritable non-volatile memory module can be identified correctly, thereby preventing data stored in the memory cells from losing.Type: GrantFiled: May 24, 2013Date of Patent: April 28, 2015Assignee: Phison Electronics Corp.Inventors: Wei Lin, Tien-Ching Wang, Kuo-Hsin Lai, Yu-Cheng Hsu, Kuo-Yi Cheng
-
Patent number: 9009442Abstract: A data writing method and a memory controller and a memory storage apparatus using the same are provided. The method includes selecting physical units as a global random area and building a global random searching table for recording update information corresponding to updated logical pages that data stored in the global random area belongs to. The method also includes receiving updated data belonging to a logical page of a logical unit, assigning an index number for the logical unit, writing the updated data into the global random area, and using the index number to record update information corresponding the logical page in the global random searching table. Accordingly, a global random searching table having smaller size can be used for recording update information corresponding to updated logical pages that data stored in the global random area belongs to.Type: GrantFiled: December 6, 2011Date of Patent: April 14, 2015Assignee: Phison Electronics Corp.Inventor: Chih-Kang Yeh
-
Patent number: 9009389Abstract: A memory management table processing method for storing a plurality of entries belonging to a plurality of memory management tables into a buffer memory of a memory storage apparatus is provided, wherein each of the entries has at least one invalid bit. The present method includes following steps. An area corresponding to each of the memory management tables is configured in the buffer memory. Invalid bit information corresponding to each of the memory management tables is recorded. The invalid bit in each of the entries is removed according to the invalid bit information corresponding to each of the memory management tables, so as to generate a valid data stream corresponding to each of the entries. Each of the valid data streams is written into the corresponding area in the buffer memory. Accordingly, the storage space of the buffer memory can be efficiently utilized.Type: GrantFiled: August 21, 2011Date of Patent: April 14, 2015Assignee: Phison Electronics Corp.Inventors: Wei-Chen Teo, Ming-Jen Liang, Chih-Kang Yeh
-
Patent number: 9007829Abstract: A memory repairing method for a rewritable non-volatile memory module and a memory controller and a memory storage apparatus are provided. The method includes monitoring a wear degree of the rewritable non-volatile memory module; determining whether the wear degree of the rewritable non-volatile memory module is larger than a threshold; and heating the rewritable non-volatile memory module such that the temperature of the rewritable non-volatile memory module lies in between 100° C.˜600° C. if the wear degree of the rewritable non-volatile memory module is larger than the threshold. Accordingly, deteriorated memory cells in the rewritable non-volatile memory module can be repaired, thereby preventing data loss.Type: GrantFiled: February 26, 2013Date of Patent: April 14, 2015Assignee: Phison Electronics Corp.Inventors: Wei Lin, Yu-Cheng Hsu, Kuo-Yi Cheng, Chun-Yen Chang
-
Patent number: 9009399Abstract: A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip.Type: GrantFiled: October 22, 2014Date of Patent: April 14, 2015Assignee: Phison Electronics Corp.Inventors: Lai-Hock Chua, Kheng-Chong Tan
-
Patent number: 9003100Abstract: A reference frequency setting method of a flash memory storage apparatus is provided. The flash memory storage apparatus includes a flash memory module, a storage unit, and an oscillator circuit without a crystal. The reference frequency setting method includes following steps. Whether a setting code is stored in the flash memory module or the storage unit is determined, wherein the setting code includes information of a reference frequency. If the setting code is stored in the flash memory module, the setting code is read to allow the oscillator circuit to generate the reference frequency according to the setting code. A memory controller and a flash memory storage apparatus using the reference frequency setting method are also provided.Type: GrantFiled: May 9, 2011Date of Patent: April 7, 2015Assignee: Phison Electronics Corp.Inventors: Chih-Ming Chen, An-Chung Chen, Wen-Lung Cheng
-
Patent number: 9001585Abstract: A data writing method for a rewritable non-volatile memory module, and a memory control circuit unit and a memory storage apparatus using the same are provided. The method includes partitioning physical erasing units of the rewritable non-volatile memory module into a temporary area and a free area. The method also includes dynamically selecting multiple physical erasing units from the temporary area, the free area, or both the temporary area and the free area as a temporary physical erasing unit group corresponding to a logical unit and using the temporary physical erasing units to write updated data to be stored into the logical unit via a single-page mode. Accordingly, the method can effectively prevent the data error occurring due to continuously using old physical erasing units of the temporary area for temporarily storing data and the method can improve the speed and the reliability of writing data.Type: GrantFiled: February 25, 2014Date of Patent: April 7, 2015Assignee: Phison Electronics Corp.Inventors: Wei Lin, Cheng-Long Low, Kiang-Giap Lau
-
Patent number: 8979596Abstract: A storage interface module including a substrate and a connecting member is provided. The substrate has a first surface, a second surface and a plurality of first openings. The first surface and the second surface are back to each other. Each of the first openings is connected through the first surface and the second surface. The connecting member is disposed on the first surface of the substrate. The connecting member has a first terminal set and a second terminal set, in which a first end of each of the terminals is connected to the first surface, and a second end of each of the terminals passes through the corresponding first opening and protrudes out of the second surface, and a third end of each of the terminals in the second terminal set is connected to the first surface.Type: GrantFiled: April 24, 2013Date of Patent: March 17, 2015Assignee: Phison Electronics Corp.Inventor: Wei-Hung Lin
-
Patent number: 8976533Abstract: A storage device including a circuit board, an electronic device package and a terminal module is provided. The circuit board has a first surface and a second surface opposite to each other, a plurality of via-holes connecting the first surface and the second surface, a plurality of first pads on the first surface, and a plurality of first pads on the second surface. The electronic device package is disposed on the first surface. The terminal module disposed on the first surface has a plurality of first and second contact parts, and each of the first contact parts passes through the corresponding via-hole and is protruded out of the second surface, and each of the second contact parts is electrically connected to the corresponding first pad. An orthogonal projection area of the electronic device package on the first surface is smaller than an area of the first surface.Type: GrantFiled: December 9, 2011Date of Patent: March 10, 2015Assignee: Phison Electronics Corp.Inventors: Wei-Hung Lin, Hung-I Chung
-
Patent number: 8972653Abstract: A memory management method and a memory controller and a memory storage apparatus using the same are provided. The method includes applying different detection biases to read data stored in physical pages of a rewritable non-volatile memory module and calculating the number of error bits according the read data. The method further includes estimating a value of a wearing degree of each physical page according to the calculated number of error bits and operating the rewritable non-volatile memory module according to the value of the wearing degree of each physical page. Accordingly, the method can effectively identify the wearing degree of the rewritable non-volatile memory module and operate the rewritable non-volatile memory module by applying a corresponding management mechanism, so as to prevent data errors.Type: GrantFiled: January 25, 2013Date of Patent: March 3, 2015Assignee: Phison Electronics Corp.Inventor: Wei Lin
-
Patent number: 8966344Abstract: A data protecting method, a memory controller, and a memory storage device are provided. The data protecting method includes following steps. A first flush command and a first write command instructing to write a first data are received from a host system. A first error correcting code and a corresponding second error correcting code having different protection capabilities are generated according to the first data. A second write command instructing to write a second data is received. After the first write command is received, a second flush command is received from the host system, and the second error correcting code corresponding to the first data is then written into a rewritable non-volatile memory module. A second error correcting code corresponding to the second data is not generated or is generated but not written into the rewritable non-volatile memory module. Thereby, data from the host system is protected.Type: GrantFiled: August 2, 2013Date of Patent: February 24, 2015Assignee: Phison Electronics Corp.Inventor: Ming-Jen Liang
-
Patent number: 8966161Abstract: A memory storage device and a repairing method thereof are provided. The memory storage device has a rewritable non-volatile memory module having multiple physical units. The physical units include at least one backup physical unit which is configured to be accessed only by a specific command set and stored with at least one customized data. The method includes receiving a specific read command from a host system for reading the backup physical unit and transmitting the customized data therein to the host system when the memory storage device is capable of receiving and processing commands from the host system, the specific read command belongs to the specific command set; and writing the customized data from the host system into a corresponding physical unit to restore the memory storage device to a factory setting when receiving the writing command from the host system for writing the customized data.Type: GrantFiled: October 1, 2012Date of Patent: February 24, 2015Assignee: Phison Electronics Corp.Inventors: Te-Change Tsui, Tzung-Lin Wu
-
Patent number: 8966157Abstract: A data management method, a memory controller and a memory storage apparatus are provided. The method includes grouping a plurality of physical units of a rewritable non-volatile memory module into at least a data area and a free area. The method also includes configuring a plurality of logical units for mapping a part of the physical units. The method further includes receiving at least two pieces of update data, which are corresponding to different logical pages of the logical units. The method further includes getting a physical unit from the physical units. The method further includes writing the at least two pieces of update data into the same one physical page of the gotten physical unit. Accordingly, the use efficiency of the physical units could be improved.Type: GrantFiled: January 14, 2011Date of Patent: February 24, 2015Assignee: Phison Electronics Corp.Inventor: Chih-Kang Yeh