Patents Assigned to Polytechnic University
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Patent number: 8175003Abstract: When it is advantageous to do so, a wireless LAN station sends data packets to a destination station via an intermediate station, instead of to the destination station directly. That is, the intermediate station, which serves as a helper to the source, forwards packets received from the source station to the intended destination station. This cooperative data transmission approach can result in system performance improvement, as long as the total time consumed by two-hop transmission (i.e., transmission via the helper station) is less than direct transmission. Such a determination may be made using rate information stored at each station. Specifically, using the rate information, signaling needed to set up a transmission, the amount of data to be transmitted, etc., transmitting the data directly and via a help station may be compared.Type: GrantFiled: November 9, 2007Date of Patent: May 8, 2012Assignee: Polytechnic UniversityInventors: Shivendra S. Panwar, Pei Liu, Zhifeng Tao
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Patent number: 8005209Abstract: Advanced Encryption Standard (AES) is an encryption algorithm for securing sensitive unclassified material by U.S. Government agencies and, as a consequence the de facto encryption standard for commercial applications worldwide. Performing concurrent error detection (CED) for protection of such a widely deployed algorithm is an issue of paramount importance. We present a low-cost CED method for AES. In this method, we make use of invariance properties of AES to detect errors. For the first time, the invariance properties of the AES, which are for the most part used to attack the algorithm, are being used to protect it from fault attacks. Our preliminary ASIC synthesis of this architecture resulted in an area overhead of 13.8% and a throughput degradation of 16.67%.Type: GrantFiled: January 6, 2006Date of Patent: August 23, 2011Assignee: Polytechnic UniversityInventors: Nikhil Joshi, Ramesh Karri
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Patent number: 7986691Abstract: Packets out-of-sequence problem can be solved by using a window flow control scheme that can dispatch traffic at the cell level, in a round robin fashion, as evenly as possible. Each VOQ at the input port has a sequence head pointer that is used to assign sequence numbers (SN) to the cells. Also a sequence tail pointer is available at each VOQ that is used to acknowledge and limit the amount of cells that can be sent to the output ports based on the window size of the scheme. Each VIQ at the output port has a sequence pointer or sequence number (SN) pointer that indicates to the VIQ which cell to wait for. Once the VIQ receives the cell that the SN pointer indicated, the output port sends an ACK packet back to the input port. By using sequence numbers and the relevant pointers, the packet out-of-sequence problem is solved.Type: GrantFiled: March 12, 2010Date of Patent: July 26, 2011Assignee: Polytechnic UniversityInventors: Jinsoo Park, Hung-Hsiang Jonathan Chao
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Patent number: 7986637Abstract: A peer-to-peer novel video streaming scheme is described in which each peer stores and streams videos to the requesting client peers. Each video is encoded into multiple descriptions and each description is placed on a different node. If a serving peer disconnects in the middle of a streaming session, the system searches for a replacement peer that stores the same video description and has sufficient uplink bandwidth. Employing multiple description coding in a peer-to-peer based network improves the robustness of the distributed streaming content in the event a serving peer is lost. Video quality can be maintained in the presence of server peers being lost. The video codec design and network policies have a significant effect on the streamed video quality. The system performance generally improves as the number of descriptions M for the video increases, which implies that a higher video quality can be obtained with the same network loading.Type: GrantFiled: November 5, 2009Date of Patent: July 26, 2011Assignee: Polytechnic UniversityInventors: Shivendra S. Panwar, Keith W. Ross, Yao Wang
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Patent number: 7965729Abstract: Transferring data (such as files) on an end-to-end, high-speed packet-switched network connection (a “virtual circuit”) or on a circuit. An out-of-band path is used for signaling and status messages (control). The same, or a separate, out-of-band path may be used to retransmit chunks of data that were received with errors or that were not received at all. By simplifying the data being sent over the high-speed (virtual) circuit, the resources of the (virtual) circuit are used efficiently since less overhead is required. Further, since the size of the file to be transferred can be predetermined, and since any retransmissions can be made over a path other than the (virtual) circuit, the (virtual) circuit that best meets the needs of the data transfer can be selected, thereby further increasing the efficiency with which the (virtual) circuit is used.Type: GrantFiled: May 23, 2002Date of Patent: June 21, 2011Assignee: Polytechnic UniversityInventors: Malathi Veeraraghavan, Timothy Christopher Moors
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Patent number: 7951899Abstract: An enzymatic process for preparing aliphatic polycarbonates via terpolymerization or transesterification using a dialkyl carbonate, an aliphatic diester, and an aliphatic diol or triol reactant. A catalyst having an enzyme capable of catalyzing an ester hydrolysis reaction in an aqueous environment is subsequently added to the reaction mixture. Next, polymerization of the reaction proceeds for an allotted time at a temperature ?100° C. Finally, the copolymer is isolated from an the catalyst via filtration.Type: GrantFiled: August 15, 2008Date of Patent: May 31, 2011Assignee: Polytechnic UniversityInventors: Richard A. Gross, Zhaozong Jiang
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Patent number: 7894343Abstract: To avoid packet out-of-sequence problems, while providing good load balancing, each input port of a switch monitors the outstanding number of packets for each flow group. If there is an outstanding packet in the switch fabric, the following packets of the same flow group should follow the same path. If there is no outstanding packet of the same flow group in the switch fabric, the (first, and therefore subsequent) packets of the flow can choose a less congested path to improve load balancing performance without causing an out-of-sequence problem. To avoid HOL blocking without requiring too many queues, an input module may include two stages of buffers. The first buffer stage may be a virtual output queue (VOQ) and second buffer stage may be a virtual path queue (VPQ). At the first stage, the packets may be stored at the VOQs, and the HOL packet of each VOQ may be sent to the VPQ. By allowing each VOQ to send at most one packet to VPQ, HOL blocking can be mitigated dramatically.Type: GrantFiled: February 11, 2004Date of Patent: February 22, 2011Assignee: Polytechnic UniversityInventors: Hung-Hsiang Jonathan Chao, Jinsoo Park
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Patent number: 7852829Abstract: Practical packet reassembly in large, multi-plane, multi-stage switches is possible by using a scheduling technique called dynamic packet interleaving. With dynamic packet interleaving scheduling, if more than one packet is contending for the same output link in a switch module, an arbiter in the switch module gives priority to a partial packet (i.e., to a packet that has had at least one cell sent to the queue). The number of reassembly queues required to ensure reassembly is dramatically reduced (e.g., to the number of paths multiplied by the number of scheduling priorities). Deadlock may be avoided by guaranteeing (e.g., reserving) at least one cell space for all partial packets.Type: GrantFiled: June 18, 2004Date of Patent: December 14, 2010Assignee: Polytechnic UniversityInventors: Hung-Hsiang Jonathan Chao, Jinsoo Park
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Patent number: 7792118Abstract: To use the memory space more effectively, cell memory can be shared by an input link and all output links. To prevent one flow from occupying the entire memory space, a threshold may be provided for the queue. The queue threshold may accommodate the RTT delay of the link. Queue length information about a downstream switch module may be sent to an upstream switch module via cell headers in every credit update period per link. Cell and/or credit loss may be recovered from. Increasing the credit update period reduces the cell header bandwidth but doesn't degrade performance significantly. Sending a credit per link simplifies implementation and eliminates interference between other links.Type: GrantFiled: February 11, 2004Date of Patent: September 7, 2010Assignee: Polytechnic UniversityInventors: Hung-Hsiang Jonathan Chao, Jinsoo Park
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Publication number: 20100202460Abstract: Packets out-of-sequence problem can be solved by using a window flow control scheme that can dispatch traffic at the cell level, in a round robin fashion, as evenly as possible. Each VOQ at the input port has a sequence head pointer that is used to assign sequence numbers (SN) to the cells. Also a sequence tail pointer is available at each VOQ that is used to acknowledge and limit the amount of cells that can be sent to the output ports based on the window size of the scheme. Each VIQ at the output port has a sequence pointer or sequence number (SN) pointer that indicates to the VIQ which cell to wait for. Once the VIQ receives the cell that the SN pointer indicated, the output port sends an ACK packet back to the input port. By using sequence numbers and the relevant pointers, the packet out-of-sequence problem is solved.Type: ApplicationFiled: March 12, 2010Publication date: August 12, 2010Applicant: Polytechnic UniversityInventors: Jinsoo Park, Hung-Hsiang Jonathan Chao
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Patent number: 7462512Abstract: Specific ionic interactions with a sensing material that is electrically coupled with the floating gate of a floating gate-based ion sensitive field effect transistor (FGISFET) may be used to sense a target material. For example, an FGISFET can use (e.g., previously demonstrated) ionic interaction-based sensing techniques with the floating gate of floating gate field effect transistors. The floating gate can serves as a probe and an interface to convert chemical and/or biological signals to electrical signals, which can be measured by monitoring the change in the device's threshold voltage, VT.Type: GrantFiled: January 11, 2005Date of Patent: December 9, 2008Assignee: Polytechnic UniversityInventors: Kalle Levon, Arifur Rahman, Tsunehiro Sai, Ben Zhao
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Publication number: 20080285480Abstract: When it is advantageous to do so, a wireless LAN station sends data packets to a destination station via an intermediate station, instead of to the destination station directly. That is, the intermediate station, which serves as a helper to the source, forwards packets received from the source station to the intended destination station. This cooperative data transmission approach can result in system performance improvement, as long as the total time consumed by two-hop transmission (i.e., transmission via the helper station) is less than direct transmission. Such a determination may be made using rate information stored at each station. Specifically, using the rate information, signaling needed to set up a transmission, the amount of data to be transmitted, etc., transmitting the data directly and via a help station may be compared.Type: ApplicationFiled: November 9, 2007Publication date: November 20, 2008Applicant: POLYTECHNIC UNIVERSITYInventors: Shivendra S. Panwar, Pei Liu, Zhifeng Tao
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Patent number: 7435852Abstract: Methods for preparing an oligomer exhibiting supramolecular extension of ?-conjugation are described. The manipulation of intra-oligomeric properties such as ?-conjugation length and the precise architecture(s) resulting from inter-oligomeric variations resulting from supramolecular chemistry offers great promise in the design of nanoscale devices. As shown, self-assembly of the supramolecular structure can be induced by causing a molecule: dopant molar ratio to go beyond the predicted theoretical fully-doped molar ratio.Type: GrantFiled: April 22, 2005Date of Patent: October 14, 2008Assignee: Polytechnic UniversityInventors: Kalle Levon, Tsunehiro Sai
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Patent number: 7415020Abstract: A packet classification apparatus and method using field level tries includes a main processing part for generating and maintaining the field level tries, which organize a multi-field packet by field in a hierarchical structure for classifications; and classification engines, each of which is provided with a first classification part for performing queries and updates and processing a prefix lookup represented by an IP source/destination address lookup, and a second classification part for proceeding with classifications by corresponding field based on a result of the first classification part in order to process a range lookup belonging to the result. Accordingly, tries in the unit of a field are developed so that packet classifications for high-speed networking with excellent query performance are secured, and wherein approximately a half-million classifier rules can be processed.Type: GrantFiled: February 27, 2004Date of Patent: August 19, 2008Assignees: Samsung Electronics Co., Ltd., Polytechnic UniversityInventors: Jinoo Joung, Woo-jong Park, Guansong Zhang, H. Jonathan Chao
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Publication number: 20080076165Abstract: A method for producing sophorolipids having protein inducer and/or repressor activities having the steps of synthesizing the sophorolipid by fermentation of Candida bombicola in a fermentation media to form a natural mixture of lactonic sophorolipids and non-lactonic sophorolipids and then utilizing the natural mixture as a protein inducing agent, utilizing the natural mixture as a protein repressing agent, and/or utilizing the natural mixture as a combined protein induction/repressor agent. An application of the sophorolipid compound produced according to the method as a microbial media component.Type: ApplicationFiled: December 22, 2005Publication date: March 27, 2008Applicant: POLYTECHNIC UNIVERSITYInventors: Richard Gross, Vishal Shah, Frantisek Nerud, Datta Madamwars
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Patent number: 7330457Abstract: When it is advantageous to do so, a wireless LAN station sends data packets to a destination station via an intermediate station, instead of to the destination station directly. That is, the intermediate station, which serves as a helper to the source, forwards packets received from the source station to the intended destination station. This cooperative data transmission approach can result in system performance improvement, as long as the total time consumed by two-hop transmission (i.e., transmission via the helper station) is less than direct transmission. Such a determination may be made using rate information stored at each station. Specifically, using the rate information, signaling needed to set up a transmission, the amount of data to be transmitted, etc., transmitting the data directly and via a help station may be compared.Type: GrantFiled: October 7, 2005Date of Patent: February 12, 2008Assignee: Polytechnic UniversityInventors: Shivendra S. Panwar, Pei Liu, Zhifeng Tao
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Patent number: 7262178Abstract: A method and composition for the treatment of humans or animals for septic shock and sepsis using a mixture of sophorolipids.Type: GrantFiled: March 24, 2004Date of Patent: August 28, 2007Assignee: Polytechnic UniversityInventor: Richard A. Gross
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Patent number: RE42600Abstract: A pipeline-based matching scheduling approach for input-buffered switches relaxes the timing constraint for arbitration with matching schemes, such as CRRD and CMSD. In the new approach, arbitration may operate in a pipelined manner. Each sub-scheduler is allowed to take more than one time slot for its matching. Every time slot, one of them provides a matching result(s). The sub-scheduler can use a matching scheme such as CRRD and CMSD.Type: GrantFiled: September 6, 2007Date of Patent: August 9, 2011Assignee: Polytechnic UniversityInventors: Eiji Oki, Hung-Hsiang Jonathan Chao, Roberto Rojas-Cessa
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Patent number: RE43110Abstract: A Pipelined-based Maximal-sized Matching (PMM) scheduling approach for input-buffered switches relaxes the timing constraint for arbitration with a maximal matching scheme. In the PMM approach, arbitration may operate in a pipelined manner. Each subscheduler is allowed to take more than one time slot for its matching. Every time slot, one of them provides the matching result. The subscheduler can adopt a pre-existing efficient maximal matching algorithm such as iSLIP and DRRM. PMM maximizes the efficiency of the adopted arbitration scheme by allowing sufficient time for a number of iterations. PMM preserves 100% throughput under uniform traffic and fairness for best-effort traffic.Type: GrantFiled: February 28, 2008Date of Patent: January 17, 2012Assignee: Polytechnic UniversityInventors: Eiji Oki, Roberto Rojas-Cessa, Hung-Hsiang Jonathan Chao
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Patent number: RE43466Abstract: A pipeline-based matching scheduling approach for input-buffered switches relaxes the timing constraint for arbitration with matching schemes, such as CRRD and CMSD. In the new approach, arbitration may operate in a pipelined manner. Each sub-scheduler is allowed to take more than one time slot for its matching. Every time slot, one of them provides a matching result(s). The sub-scheduler can use a matching scheme such as CRRD and CMSD.Type: GrantFiled: May 16, 2008Date of Patent: June 12, 2012Assignee: Polytechnic UniversityInventors: Eiji Oki, Hung-Hsiang Jonathan Chao, Roberto Rojas-Cessa