Abstract: A memory and reading, writing and erasing methods thereof. The memory includes: H memory planes arranged in parallel along a first direction, where each memory plane extends in a second direction, and includes M columns of memory strings; each column of memory string extends in a third direction; the first direction, the second direction and the third direction are all different, and H and M are integers greater than zero; each column of memory string includes N rows of memristive memory cells. The memory is also provided with word lines, gating transistors, gating lines, bit lines and a common source line, where memristive memory cells in last rows of all memory strings are connected to the common source line, and the common source line is connected to a reference potential through a reference resistor. Use performance of the memory can be improved.

Abstract: The present invention provides a measurement system and modeling method for radio frequency MOS device modeling. Electrodes that are correspondingly provided in a slave test structure and a master test structure of the measurement system are different, where a source and a drain of a second MOS device are respectively connected to corresponding test ports, and a gate is independently connected out to facilitate setting a corresponding bias voltage. The modeling method configures an initial value of each parasitic element in a subcircuit model by means of a test result of the measurement system, corrects the initial values of at least some parasitic elements, and finally obtains parasitic parameter values of the parasitic elements.

Abstract: A clock circuit comprises an oscillator circuit and a power-on reset circuit, the oscillator circuit comprises a current generating module and a loop oscillation module connected together; the current generating module is used for outputting a control current to the loop oscillation module; the loop oscillation module is used for outputting an oscillation signal with a set frequency under action of the control current; and the power-on reset circuit is connected to the loop oscillation module and is used for providing an enabling control signal to the loop oscillation module after a power supply is powered on to the power-on reset circuit and the oscillator circuit.

Abstract: A razor head includes a frame, elongated blades arranged on an inner side of the frame, and two bridge walls each extending between two points of the frame in an interior of the frame, the bridge walls each including projections arranged in an arrangement direction of the blades. Each of the blades is held between adjacent ones of the projections of the bridge walls. Each of the projections includes a first flat surface and a second flat surface. In each of the bridge walls, the first flat surface and the second flat surface are shifted from each other in a longitudinal direction of the blades so as not to overlap each other, and the first flat surfaces and the second flat surfaces are located on the same position as viewed in the arrangement direction. Each of the projections has a horizontal cross-sectional shape of a parallelogram.

Abstract: The present invention provides a novel process for the preparation of 1-(2-{4-[(4-carbamoyl piperidin-1-yl)methyl]-N-methylbenzamido}ethyl) piperidin-4-yl N-({1, 1?-biphenyl}-2-yl) carbamate of formula (I).

Abstract: The present invention relates to a novel process for the preparation of 2,5-dichloro-3-(5-(3,4-dihydroxy-5-nitrophenyl)-1,2,4-oxadiazol-3-yl)-4,6-dimethylpyridine-1-oxide of formula (I) The present invention also relates to the novel intermediate compounds of formula (V), formula (VII), and their processes for the preparation thereof. The present invention also relates to the use of compounds of formula (V), formula (VII) intermediate in the preparation of 2,5-dichloro-3-(5-(3,4-dihydroxy-5-nitrophenyl)-1, 2, 4-oxadiazol-3-yl)-4, 6-dimethylpyridine-1-oxide of formula (I).

Abstract: The present invention discloses a formation method, comprising: forming a hard mask layer and a photo-lithographic pattern of a fin structure on a the semiconductor substrate; patterning the hard mask layer and the semiconductor substrate to gain the fin structure with a profile of steep sidewalls; forming a protective layer on the sidewall surface of the fin structure; etching the semiconductor substrate located below the fin structure to form isolation structure trenches; performing a modified treatment on the exposed surfaces of the isolation structure trenches to form a modified layer with a certain thickness; removing the protective layer and the modified layer simultaneously; filling a dielectric layer in the isolation structure trenches till to cover the fin structure and then planarizing the dielectric layer; performing a trench etching to the dielectric layer and forming the fin structure and an isolation structure with sloped sidewalls.

Abstract: The present invention relates to an improved process for the preparation of (4R)-1-[(2R, 4R, 5R)-3,3-difluoro-4-hydroxy-5-(hydroxymethyl) oxolan-2-yl]-4-hydroxy-1,3-diazinan-2-one compound of formula-1 and its intermediate compounds. [Formula should be inserted here]. The present invention also relates to the process for the purification of (4R)-1-[(2R, 4R, 5R)-3,3-difluoro-4-hydroxy-5-(hydroxymethyl) oxolan-2-yl]-4-hydroxy-1,3-diazinan-2-one compound of formula-1 to get pure compound of formula-1.

Abstract: The present invention relates to novel crystalline polymorphs of 1-[(3R)-3-[4-amino-3(4-phenoxy phenyl)-1H-pyrazolo[3,4-d]pyrimidin-1-yl]-1-piperidinyl]-2-propen-1-one represented by the following structural formula-1 and process for preparation thereof.

Abstract: The present invention discloses a method for forming an intermetallic air gap, which comprises following steps: S01: forming a trench in a solid dielectric; S02: preparing an insulating sheet-like two-dimensional material, wherein the insulating sheet-like two-dimensional material comprises an insulating nano sheet-like layer, the size of the insulating nano sheet-like layer in the sheet-like two-dimensional direction is greater than the size of the trench; S03: the insulating sheet-like two-dimensional material is deposited on the solid dielectric and the trench; S04: annealing the solid dielectric and the insulating sheet-like two-dimensional material to form a stable thin film composed of insulating sheet-like two-dimensional material on the trench.

Abstract: The present invention disclosures a Tip-to-Tip pattern preparation method, comprising: providing a substrate, and sequentially forming a layer to be etched, a first hard mask layer, a second hard mask layer, a sacrificial layer, a first dielectric layer and a first photoresist layer on the substrate, forming a first patterned photoresist layer which has a first Tip-to-Tip pattern by EUV lithography, and transferring the first Tip-to-Tip pattern to the second hard mask layer by etching; then forming a second patterned photoresist layer which has a second Tip-to-Tip pattern by the EUV lithography, and transferring the second Tip-to-Tip pattern to the second hard mask layer by etching; finally, transferring the first Tip-to-Tip pattern and the second Tip-to-Tip pattern to the layer to be etched.

Abstract: Provided are control method and device of an energy-storage coordinated floating wind turbine, relating to the technical field of wind turbines. The control method of an energy-storage coordinated floating wind turbine can construct a primary frequency regulation model of a floating wind farm based on a frequency response unit, construct a second frequency regulation model according to an energy storage system, further construct, according to the primary frequency regulation model and the second frequency regulation model, a frequency regulation model of a hybrid power system containing the floating wind farm, the energy storage system, and a pre-set thermal power unit, and design an overall frequency regulation control strategy of the hybrid power system based on the frequency regulation model of the hybrid power system.

Abstract: An intimate area thinning razor, in which a comb portion includes comb teeth, a blade edge exposed portion where a blade edge is exposed, and a cover portion where the blade edge is covered. The comb teeth are provided at both ends in the width direction of the cover portion and between both of the ends, and a set of the blade edge exposed portion and the cover portion arranged in a predetermined manner is disposed repeatedly. A ratio of a total of lengths between center portions in the width direction of the comb teeth adjacent to the plurality of blade edge exposed portions, relative to a length between center portions in the width direction of the comb teeth at outermost positions in the width direction of the comb portion, is 1/10 to 4/10. Groove portions are formed on an extended line of a gap between the comb teeth.

Abstract: The present invention discloses a pixel structure of a stacked image sensor and a preparation method thereof, by bonding processes to stack a first silicon wafer to a third silicon wafer up and down; wherein, a first photodiode array is set on the first silicon wafer located in middle, and a second photodiode array is provided on the second silicon wafer located above, and the surface of each the second photodiode in the second photodiode array is aligned and bonded correspondingly with the surface of each the first photodiode in the first photodiode array, so as to form a chip of the pixel structure of the stacked image sensor with a very deep junction depth, which is particularly suitable for near-infrared sensitization, and can effectively improve quantum efficiency in near-infrared wave bands; and by adopting a backlight technology, incident lights irradiating to photodiodes are not affected by the metal interconnect layers, both of sensitive and fill factor are high, especially for small-size pixels, whi

Abstract: The present invention discloses a bonding cavity structure and a bonding method, the bonding cavity structure comprises an upper carrier and a lower carrier, a gas-flow forming mechanism, which comprises multiple open-close integrated arms, the integrated arms are provided with multiple nozzles facing to wafer bonding surfaces, and the nozzles are switched to gas nozzles or vacuum suction nozzles, a closed space is formed by all the integrated arms closed together with the carriers, all the nozzle located on a side of two wafers are set as the gas nozzles, which blow gas parallel to the wafer bonding surfaces, meanwhile, all the nozzles located on the other side of the two wafers are set as the vacuum suction nozzles, which suck the gas blown from the gas nozzle at corresponding position, a high-speed gas-flow is generated between the two wafers, so as to produce a low pressure of Bernoulli effect, the wafers are not only subjected to thrust forces from backsides, but tension forces between the bonding surfac

Abstract: A razor assembled by folding includes a holding part that is held by a user, a head supporting part that is formed integrally with the holding part, and a razor head that is provided on the head supporting part. The entire of the holding part and the head supporting part is formed of paper. The entire of the razor head is formed of metal, and the razor head includes a blade body and a frame body housing the blade body.

Abstract: The present invention relates to a novel process for the preparation of (S)-7-(1-acryloylpiperidin-4-yl)-2-(4-phenoxyphenyl)-4, 5, 6, 7-tetrahydropyrazolo[1,5-a] pyrimidine-3-carboxamide of formula-1 or its salts. The present invention also relates to novel process for the preparation of intermediate compound of Formula-7 and recovery of the intermediate compound of Formula-12, which is used in the preparation of compound of Formula-7. The compounds of formula-1 & formula-7 are represented by following structural formulae.

Abstract: Disclosed is a carbon dioxide absorbent and a carbon dioxide separation method using the same that greatly reduces energy consumption due to a small amount of latent heat required in regeneration of absorbents, enhances CO2 absorption rate, undergoes almost no thermal denaturation even at high temperatures while absorbing carbon dioxide, and results in a considerable reduction of the cost associated with absorption of carbon dioxide.

Abstract: The disclosure discloses a CMOS image sensor, which includes a plurality of image sensor units and a resistance-to-digital converting unit. Each image sensor unit includes a pixel unit and a resistive random access memory unit connected to the pixel unit, the pixel unit is configured to convert a received optical signal into an analog signal and the resistive random access memory unit is configured to convert the analog electrical signal into a resistance value. The resistance-to-digital converting unit is connected to the plurality of the image sensor units, and is configured to convert the resistance value into a digital signal. The resistive random access memory unit is adopted in the present disclosure to replace a transistor device and is configured to convert resistance information of the resistive random access memory unit into a digital signal and output. Thus, digital quantization of image information is completed.

Abstract: The present disclosure relates to an image sensor structure and a manufacturing method thereof. A detection structure layer and a blind pixel structure layer are used. The detection structure layer and the blind pixel structure layer are effectively combined and further formed by ion implantation. Thus, the space ratio of a single pixel is reduced, the integration and device sensitivity are improved, and the blind pixel array and the pixel array are also in the same environment, thereby further improving the detection sensitivity and reducing the detection error.