Abstract: A ferroelectric based capacitor structure and method for making the same. The capacitor includes a bottom electrode having a layer of Pt in contact with a first layer of an ohmic material. The capacitor dielectric is constructed from a layer of lead zirconium titanate doped with an element having an oxidation state greater than +4. The top electrode of the capacitor is constructed from a second layer of ohmic material in contact with a layer of Pt. The preferred ohmic material is LSCO; although RuO.sub.2 may also be utilized. The capacitor is preferably constructed over the drain of an FET such that the bottom electrode of the capacitor is connected to the drain of the FET. The resulting capacitor structure has both low imprint and low fatigue.

Abstract: A sense amplifier for comparing the resistance of a reference cell connected to a reference bit line to the resistance of a data cell connected to a data bit line. The amplifier includes a first terminal for connecting the sense amplifier to the reference bit line and a second terminal for connecting the sense amplifier to the data bit line. A reference current to voltage amplifier is connected to the first terminal for generating a reference voltage related to the current flowing through the reference bit line and for maintaining the first terminal at a reference potential when the current flowing through the reference bit line is less than a first current value. A data current to voltage amplifier is connected to the second terminal for generating a data voltage related to the current flowing through the data bit line and for maintaining the second terminal at the reference potential when the current flowing through the data bit line is less than a second current value.

Abstract: A high density non-volatile ferroelectric-based memory based on a ferroelectric FET operated in a two terminal write mode. Storage words may be constructed either from one or two bit storage cells based on a ferroelectric FET. A memory using either the one or two bit storage cells includes a plurality of word storage cells organized into a rectangular array including a plurality of columns and rows. Each of the word storage cells includes N single bit memory cells. Each of the single bit memory cells includes a pass transistor and a ferroelectric storage element. All of the gate electrodes in the circuit are connected to a common gate electrode, and all of the source electrodes are connected to a common source electrode. If the memory is built from two bit storage cells as described herein, each storage cell is one half of a two bit storage cell.

Abstract: A ferroelectric capacitor and method for making the same are disclosed. The ferroelectric capacitor may be constructed on a silicon substrate such as SiO.sub.2 or Si.sub.3 N.sub.4. The ferroelectric capacitor includes a bottom electrode, a layer of ferroelectric material, and a top electrode. The bottom electrode is constructed from a layer of platinum which is bonded to the silicon substrate by a layer of metallic oxide. The metallic oxide does not diffuse into the platinum; hence, a thinner layer of platinum may be utilized for the electrode. This reduces the vertical height of the capacitor and other problems associated with diffusion of the layer used to bond the bottom electrode to the substrate surface.

Abstract: A method for connecting a silicon substrate to an electrical component via a platinum conductor. The resulting structure may be heated in the presence of oxygen to temperatures in excess of 800.degree. C. without destroying the electrical connection between the silicon substrate and components connected to the platinum conductor. The present invention utilizes a TiN or TiW buffer layer to connect the platinum conductor to the silicon substrate. The buffer layer is deposited as a single crystal on the silicon substrate. The platinum layer is then deposited on the buffer layer. The region of the platinum layer in contact with the buffer layer is also a single crystal.

Abstract: A method for generating platinum features on the surface of a substrate is disclosed. The method provides an inexpensive means for constructing small platinum features. The method utilizes a photoresist mask to define the platinum features. The problems associated with residue from the deposition of the photoresist mask are overcome by utilizing an etching step which removes any such residue. The etching step also allows the platinum features to be recessed into the substrate surface.

Abstract: Devices for converting digital data into a light pulse train and decoding such a pulse train are disclosed. The light pulse generating device generates a train of light pulses having a pattern determined by a numerical value represented by a plurality of binary bits. The light pulse train generating device stores the bits in a register. Each cell of the register is connected to a light switching device that will interrupt a first light beam in response to a light signal if the value stored in the cell is a logical one. If the value is a logical 0, the interruption will not occur. The decoding device utilizes a plurality of light activated switches to route individual pulses in the light pulse train to different photodetectors. The light activated switching devices avoid the delays inherent in electrically activated switching devices.

Abstract: An improved method for making aluminum connections to platinum electrodes is described. The method utilizes an oxide layer to isolate the aluminum from the platinum. The oxide layer is created by ashing the surface of the platinum using an Oxygen plasma.

Abstract: An improved method for constructing integrated circuit structures in which a buffer SiO.sub.2 layer is used to separate various components comprising ferroelectric materials or platinum is disclosed. The invention prevents interactions between the SiO.sub.2 buffer layer and the ferroelectric materials. The invention also prevents the cracking in the SiO.sub.2 which is commonly observed when the SiO.sub.2 layer is deposited directly over a platinum region on the surface of the circuit. The present invention utilizes a buffer layer of material which is substantially inert with respect to the ferroelectric material and which is also an electrical insulator to separate the SiO.sub.2 layer from the ferroelectric material and/or the platinum regions.

Abstract: An improved read/write optical disk is disclosed which is capable of being rewritten more than 10.sup.6 times. The disk utilizes a storage medium in which data is stored by causing a localized region of the storage medium to assume one of two states. The two states can be converted from one to another by the application of electric fields to the localized region of the storage medium. The localized region in question is selected by illuminating an area on an addressing layer directly above the region in question with light. The preferred embodiment utilizes a lead lanthanum zirconate titanate material for the storage medium.

Abstract: An improved ferroelectric structure and the method for making the same is disclosed. The improved structure reduces the fatigue problems encountered in ferroelectric capacitors while providing avoiding problems in depositing the ferroelectric material which have prevented other solutions to the fatigue problem from being effective. The improved ferroelectric structure also provides improved adhesion to the underlying substrate. The ferroelectric structure has a bottom electrode comprising a layer of PtO.sub.2 which is generated by depositing a layer of Platinum on a suitable substrate and then exposing the Platinum layer to an Oxygen plasma. The ferroelectric material is then deposited on the PtO.sub.2 layer.

Abstract: An improved memory device based on a non-volatile variable resistance element is disclosed. The resistive element is based on a semiconductor having a resistivity which is determined by the state of polarization of a ferro-electric layer. The semiconductor forms one plate of a parallel plate capacitor having a dielectric comprising the ferro-electric layer. The state of the memory device is determined by measuring the resistivity of the semiconductor layer between two contacts on the semiconductor layer. The state of polarization of the ferro-electric layer is altered by applying a voltage between one of these contacts and the other plate of the capacitor.

Abstract: An improved non-volatile variable resistance element is disclosed. The resistive element is based on a semiconductor having a resistivity which is determined by the state of polarization of a ferroelectric layer.

Abstract: An improved read/write optical disk is disclosed which is capable of being rewritten more than 10.sup.6 times. The disk utilizes a storage medium in which data is stored as different polarization states in the same phase of the material. The preferred embodiment utilizes a lead lanthanum zirconate titanate material for the storage medium. The state of polarization of the material at the location of a specified data bit is changed by applying a voltage to the bit location in question. The location is specified by illuminating the surface of the disk with light in the infra-red.