Patents Assigned to Radiant Technologies
  • Patent number: 6066868
    Abstract: A ferroelectric memory cell for storing information. The information is stored in the remnant polarization of a ferroelectric dielectric layer by setting the direction of the remnant polarization. The ferroelectric memory cell is designed to store the information at a temperature less than a first temperature. The memory cell includes top and bottom contacts that sandwich the dielectric layer which includes a ferroelectric material having a Curie point greater than the first temperature and less than 400.degree. C. The dielectric layer is encapsulated in an oxygen impermeable material such that the encapsulating layer prevents oxygen from entering or leaving the dielectric layer. The memory also includes a hydrogen barrier layer that inhibits the flow of oxygen to the top and bottom electrodes when the memory cell is placed in a gaseous environment containing hydrogen. In one embodiment of the invention, a hydrogen absorbing layer is included.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: May 23, 2000
    Assignee: Radiant Technologies, Inc.
    Inventor: Joseph T. Evans, Jr.
  • Patent number: 6018144
    Abstract: A method of conveying moieties through an infrared conveyor furnace with controllable point source radiation elements incorporating a clean room internal environment. The method comprises the steps of transporting moieties in an indexed manner through multiple heating zones heated by arrays of lamps; and dividing the lamps of each array into a plurality of groups which are separately controlled to maintain a constant temperature across the surface of the moiety. The method further comprises controlling the lamp groups through the use of a controller utilizing data from FTIR sensors mounted in a fused quartz barrier which is permeable by infrared radiation but which seals the lamp arrays from the heating zones.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: January 25, 2000
    Assignee: Radiant Technology Corporation
    Inventors: Lester H. Vogt, Douglas A. Bolton
  • Patent number: 5977577
    Abstract: A ferroelectric memory cell for storing information. The information is stored in the remnant polarization of a ferroelectric dielectric layer by setting the direction of the remnant polarization. The ferroelectric memory cell is designed to store the information at a temperature less than a first temperature. The memory cell includes top and bottom contacts that sandwich the dielectric layer which includes a ferroelectric material having a Curie point greater than the first temperature and less than 400.degree. C. The dielectric layer is encapsulated in an oxygen impermeable material such that the encapsulating layer prevents oxygen from entering or leaving the dielectric layer. One of the contacts is typically includes a platinum electrode. The other contact may include a similar electrode or a semiconductor layer having electrodes spaced apart thereon.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: November 2, 1999
    Assignee: Radiant Technologies, Inc
    Inventor: Joseph T. Evans, Jr.
  • Patent number: 5963466
    Abstract: A memory for storing a plurality of words of data. The memory is constructed from one or more storage blocks. Each storage block includes a plurality of storage words, each storage word storing one of the words of data. Each storage word includes a plurality of single bit storage cells. The single bit storage cells include a ferroelectric capacitor and a pass transistor having a gate, source, and drain. The ferroelectric capacitor includes a bottom electrode, a layer of ferroelectric material, and a top electrode, the layer of ferroelectric material being sandwiched between the top and bottom electrodes. One bit of data is stored in the direction of polarization of the ferroelectric material in contact with the bottom electrode. The bottom electrode is connected to the source of the pass transistor. The top electrode of each single bit storage cell is part of a continuous conducting layer covering all of the ferroelectric capacitors in the storage block.
    Type: Grant
    Filed: April 13, 1998
    Date of Patent: October 5, 1999
    Assignee: Radiant Technologies, Inc.
    Inventor: Joseph T. Evans, Jr.
  • Patent number: 5892255
    Abstract: A ferroelectric based capacitor structure and method for making the same. The capacitor includes a bottom electrode having a layer of Pt in contact with a first layer of an ohmic material. The capacitor dielectric is constructed from a layer of lead zirconium titanate doped with an element having an oxidation state greater than +4. The top electrode of the capacitor is constructed from a second layer of ohmic material in contact with a layer of Pt. The preferred ohmic material is LSCO; although RuO.sub.2 may also be utilized. The capacitor is preferably constructed over the drain of an FET such that the bottom electrode of the capacitor is connected to the drain of the FET. The resulting capacitor structure has both low imprint and low fatigue.
    Type: Grant
    Filed: October 12, 1997
    Date of Patent: April 6, 1999
    Assignee: Radiant Technologies
    Inventors: Joseph T. Evans, Jr., Richard H. Womack
  • Patent number: 5872739
    Abstract: A sense amplifier for comparing the resistance of a reference cell connected to a reference bit line to the resistance of a data cell connected to a data bit line. The amplifier includes a first terminal for connecting the sense amplifier to the reference bit line and a second terminal for connecting the sense amplifier to the data bit line. A reference current to voltage amplifier is connected to the first terminal for generating a reference voltage related to the current flowing through the reference bit line and for maintaining the first terminal at a reference potential when the current flowing through the reference bit line is less than a first current value. A data current to voltage amplifier is connected to the second terminal for generating a data voltage related to the current flowing through the data bit line and for maintaining the second terminal at the reference potential when the current flowing through the data bit line is less than a second current value.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: February 16, 1999
    Assignee: Radiant Technologies
    Inventor: Richard Womack
  • Patent number: 5864119
    Abstract: An infrared conveyor furnace with controllable point source radiation elements incorporating a clean room internal environment. The conveyor transports moieties in an indexed manner through multiple heating zones heated by arrays of lamps. The lamps of each array are divided into a plurality of groups which are separately controlled to maintain a constant temperature across the surface of the moiety. The control of the lamp groups is accomplished through the use of a controller utilizing data from FTIR sensors mounted in a fused quartz barrier which is permeable by infrared radiation but which seals the lamp arrays from the heating zones.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: January 26, 1999
    Assignee: Radiant Technology Corporation
    Inventors: Lester H. Vogt, Douglas A. Bolton
  • Patent number: 5804850
    Abstract: A ferroelectric based capacitor structure and method for making the same. The capacitor includes a bottom electrode having a layer of Pt in contact with a first layer of an ohmic material. The capacitor dielectric is constructed from a layer of lead zirconium titanate doped with an element having an oxidation state greater than +4. The top electrode of the capacitor is constructed from a second layer of ohmic material in contact with a layer of Pt. The preferred ohmic material is LSCO; although RuO.sub.2 may also be utilized. The capacitor is preferably constructed over the drain of an FET such that the bottom electrode of the capacitor is connected to the drain of the FET. The resulting capacitor structure has both low imprint and low fatigue.
    Type: Grant
    Filed: April 16, 1996
    Date of Patent: September 8, 1998
    Assignee: Radiant Technologies, Inc.
    Inventors: Joseph T. Evans, Jr., Richard Womack
  • Patent number: 5789775
    Abstract: A high density non-volatile ferroelectric-based memory based on a ferroelectric FET operated in a two terminal write mode. Storage words may be constructed either from one or two bit storage cells based on a ferroelectric FET. A memory using either the one or two bit storage cells includes a plurality of word storage cells organized into a rectangular array including a plurality of columns and rows. Each of the word storage cells includes N single bit memory cells. Each of the single bit memory cells includes a pass transistor and a ferroelectric storage element. All of the gate electrodes in the circuit are connected to a common gate electrode, and all of the source electrodes are connected to a common source electrode. If the memory is built from two bit storage cells as described herein, each storage cell is one half of a two bit storage cell.
    Type: Grant
    Filed: January 26, 1996
    Date of Patent: August 4, 1998
    Assignee: Radiant Technologies
    Inventors: Joseph T. Evans, Jr., Richard Womack
  • Patent number: 5757042
    Abstract: A memory based on a ferroelectric FET, the ferroelectric FET includes a gate electrode, a layer of ferroelectric material, layer of semiconducting material, a source electrode and a drain electrode. The layer of ferroelectric material is sandwiched between the gate electrode and the layer of semiconducting material, the source and drain electrodes being in contact with the layer of semiconducting material and spaced apart from one another. The memory includes a circuit for setting the ferroelectric FET to one of two states. The first state is set by applying a first voltage to the source and drain electrodes and a second voltage to the gate electrode. The second state is set by applying a third voltage to the gate and drain electrodes and fourth voltage to the source electrode. This arrangement reduces the number of pass transistors needed per ferroelectric FET to one plus a simple pulsing circuit that must be included with each word of memory.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: May 26, 1998
    Assignee: Radiant Technologies, Inc.
    Inventors: Joseph T. Evans, Jr., Richard Womack
  • Patent number: 5743330
    Abstract: Panels for supporting heat transfer tubing are provided with a tubing-receiving track having a multi-faceted inner surface that enhances reception of the tubing, installation of the panels and ultimately heat transfer effectiveness.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: April 28, 1998
    Assignee: Radiant Technology, Inc.
    Inventors: Frank Bilotta, Todd Shaw
  • Patent number: 5679969
    Abstract: A ferroelectric based capacitor structure and method for making the same. The capacitor includes a bottom electrode having a layer of Pt in contact with a first layer of an ohmic material. The capacitor dielectric is constructed from a layer of lead zirconium titanate doped with an element having an oxidation state greater than +4. The top electrode of the capacitor is constructed from a second layer of ohmic material in contact with a layer of Pt. The preferred ohmic material is LSCO; although RuO.sub.2 may also be utilized. The capacitor is preferably constructed over the drain of an FET such that the bottom electrode of the capacitor is connected to the drain of the FET. The resulting capacitor structure has both low imprint and low fatigue.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: October 21, 1997
    Assignee: Radiant Technologies, Inc.
    Inventors: Joseph T. Evans, Jr., Richard H. Womack
  • Patent number: 5638979
    Abstract: A shipping or transport container system comprises an inner liner for insertion into an inner shipping container, for further insertion into an outer shipping container. The inner liner comprises a layer of single- or double-bubble radiant barrier material within a sealed vinyl pouch. Between the outer container and the inner container there is furnished at least one spacer insert, which may be a spacer tray or the like, for providing a partially-surrounding pocket of air in contact with the exterior surface of the inner container. During sealing of the pouch, a pocket of air is allowed to remain in its interior so that the radiant barrier material floats within the sealed pouch. The pockets of air provided allow for maximization of the thermal insulating properties of the system due primarily to the thermal reflective property of the radiant barrier material. The vinyl construction of the pouch material provides a durable protective cover for the radiant barrier material.
    Type: Grant
    Filed: May 24, 1994
    Date of Patent: June 17, 1997
    Assignee: Radiant Technologies, Inc.
    Inventor: David B. Shea
  • Patent number: 5614438
    Abstract: A method for making an improved LSCO stack in the generation of platinum features on the surface of a substrate. The method provides an inexpensive means for depositing and etching LSCO material in the construction of small platinum features. The method comprises sputtering of the LSCO material and utilizing a photoresist mask to pattern the LSCO in accordance with the platinum features. The problems and expense associated with high-temperature deposition of LSCO on platinum and the etching thereof are overcome by sputtering the LSCO at room temperature.
    Type: Grant
    Filed: March 15, 1995
    Date of Patent: March 25, 1997
    Assignee: Radiant Technologies, Inc.
    Inventors: Joseph T. Evans, Jr., Leonard Boyer
  • Patent number: 5593914
    Abstract: A method for fabricating an integrated circuit having at least one integrated circuit component fabricated in a silicon substrate and a second device that is to be fabricated on a silicon oxide layer that covers the integrated circuit component. The integrated circuit component has a terminal that is to be connected a corresponding terminal on the second device. The second device includes an electrode structure in contact with a dielectric component that includes a layer of ferroelectric material. In the method of the present invention, a boundary layer comprising non-conducting polysilicon is deposited over the silicon oxide layer. The electrode structure is then fabricated by depositing one or more layers over the boundary layer. The ferroelectric layer is then deposited over the electrode structure and etched to provide the dielectric component. The boundary layer is then removed utilizing an etchant that etches silicon oxide much slower than polysilicon.
    Type: Grant
    Filed: March 19, 1996
    Date of Patent: January 14, 1997
    Assignee: Radiant Technologies, Inc.
    Inventors: Joseph T. Evans, Jr., Leonard O. Boyer
  • Patent number: 5453347
    Abstract: A ferroelectric capacitor and method for making the same are disclosed. The ferroelectric capacitor may be constructed on a silicon substrate such as SiO.sub.2 or Si.sub.3 N.sub.4. The ferroelectric capacitor includes a bottom electrode, a layer of ferroelectric material, and a top electrode. The bottom electrode is constructed from a layer of platinum which is bonded to the silicon substrate by a layer of metallic oxide. The metallic oxide does not diffuse into the platinum; hence, a thinner layer of platinum may be utilized for the electrode. This reduces the vertical height of the capacitor and other problems associated with diffusion of the layer used to bond the bottom electrode to the substrate surface.
    Type: Grant
    Filed: June 7, 1994
    Date of Patent: September 26, 1995
    Assignee: Radiant Technologies
    Inventors: Jeff A. Bullington, Carl E. Montross, Jr., Joseph T. Evans, Jr.
  • Patent number: 5440173
    Abstract: A method for connecting a silicon substrate to an electrical component via a platinum conductor. The resulting structure may be heated in the presence of oxygen to temperatures in excess of 800.degree. C. without destroying the electrical connection between the silicon substrate and components connected to the platinum conductor. The present invention utilizes a TiN or TiW buffer layer to connect the platinum conductor to the silicon substrate. The buffer layer is deposited as a single crystal on the silicon substrate. The platinum layer is then deposited on the buffer layer. The region of the platinum layer in contact with the buffer layer is also a single crystal.
    Type: Grant
    Filed: September 17, 1993
    Date of Patent: August 8, 1995
    Assignee: Radiant Technologies
    Inventors: Joseph T. Evans, Jr., Jeff A. Bullington
  • Patent number: 5420428
    Abstract: The sensing array detects an image by measuring the changes in the dielectric constant of individual capacitors in a rectangular array of capacitors. The present invention avoids the use of isolation transistors to eliminate the effects of other capacitors in the array when measuring the capacitance of a given capacitor in the array. During the measurement of any given capacitor in the array, the present invention maintains a zero potential difference across the capacitors that are not being measured, thereby eliminating any interference that might be caused by these capacitors.
    Type: Grant
    Filed: May 5, 1993
    Date of Patent: May 30, 1995
    Assignee: Radiant Technologies, Inc.
    Inventors: Jeff A. Bullington, Joseph T. Evans, Jr., Carl E. Montross, Jr.
  • Patent number: 5314087
    Abstract: A shipping or transport container system comprises an inner liner for insertion into an inner shipping container, for further insertion into an outer shipping container. The inner liner comprises a layer of single- or double-bubble radiant barrier material within a sealed vinyl pouch. Between the outer container and the inner container there is furnished at least one spacer insert, which may be a spacer tray or the like, for providing a partially-surrounding pocket of air in contact with the exterior surface of the inner container. During sealing of the pouch, a pocket of air is allowed to remain in its interior so that the radiant barrier material floats within the sealed pouch. The pockets of air provided allow for maximization of the thermal insulating properties of the system due primarily to the thermal reflective property of the radiant barrier material. The vinyl construction of the pouch material provides a durable protective cover for the radiant barrier material.
    Type: Grant
    Filed: May 26, 1993
    Date of Patent: May 24, 1994
    Assignee: Radiant Technologies, Inc.
    Inventor: David B. Shea
  • Patent number: 5242534
    Abstract: A method for generating platinum features on the surface of a substrate is disclosed. The method provides an inexpensive means for constructing small platinum features. The method utilizes a photoresist mask to define the platinum features. The problems associated with residue from the deposition of the photoresist mask are overcome by utilizing an etching step which removes any such residue. The etching step also allows the platinum features to be recessed into the substrate surface.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: September 7, 1993
    Assignee: Radiant Technologies
    Inventors: Jeff A. Bullington, Carl E. Montross, Jr.