Abstract: In one embodiment, a meta-module having circuitry for two or more modules is formed on a substrate, which is preferably a laminated substrate. The circuitry for the different modules is initially formed on the single meta-module. Each module will have one or more component areas in which the circuitry is formed. A metallic structure is formed on or in the substrate for each component area to be shielded. A single body, such as an overmold body, is then formed over all of the modules on the meta-module. At least a conductive vertical interconnect access structure (vias) associated with each component area to be shielded is then exposed through the body by a cutting, drilling, or similar operation. Next, an electromagnetic shield material is applied to the exterior surface of the body of each of the component areas to be shielded and in contact with the exposed conductive vias.

Abstract: Embodiments disclosed herein relate to programmable duplexers. The frequency pass band of the programmable duplexer is changed according to a selection of a channel-pair selection to control or maximize the transition band between the receiver path and the transmitter path. The programmable duplexer permits selections of desired pass bands without the need for multiple duplexer filters. As an additional advantage, the transmission band requirements become less sensitive to manufacturing tolerances and temperature variations.

Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive.

Abstract: This disclosure relates generally to power amplification devices and methods of operating the same. The power amplification devices are capable of reducing (and possibly cancelling) modulation of a ripple variation of a supply voltage level of a supply voltage onto a radio frequency (RF) signal. In one embodiment, a power amplification device includes a power amplification circuit configured to amplify an RF signal with a supply voltage such that a ripple variation in a supply voltage level of the supply voltage is modulated onto the RF signal in accordance with a conversion gain. However, the power amplification device also includes a plurality of ripple rejection circuits. The plurality of ripple rejection circuits is configured to produce phase shifts and one or more amplitude shifts in the RF signal so as to reduce the conversion gain of the power amplification circuit.

Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure having a first surface and a second surface. A first polymer having a high thermal conductivity and a high electrical resistivity is disposed on the first surface of the semiconductor stack structure. An exemplary method includes providing the semiconductor stack structure with the second surface in direct contact with a wafer handle. A next step involves removing the wafer handle to expose the second surface of the semiconductor stack structure. A following step includes disposing a second polymer having high thermal conductivity and high electrical resistivity directly onto the second surface of the semiconductor stack structure. Additional methods apply silicon nitride layers on the first surface and second surface of the semiconductor stack structure before disposing the first polymer and second polymer to realize the semiconductor device.

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.

Abstract: Self-biasing transistor switching circuitry includes a main transistor, a biasing transistor, a first capacitor, and a second capacitor. The body of the main transistor is isolated from the gate, the drain, and the source of the main transistor by an insulating layer. The first capacitor is coupled between the source and the gate of the main transistor. The second capacitor is coupled between the source and the body of the main transistor. The body and the drain of the main transistor are coupled together. The gate and the drain of the biasing transistor are coupled to the gate of the main transistor. The drain of the biasing transistor is coupled to the drain of the main transistor. The self-biasing transistor switching circuitry is adapted to receive an oscillating signal at the drain of the main transistor, and use the oscillating signal to appropriately bias the main transistor.

Abstract: An in-phase radio frequency (RF) power amplifier (PA) stage and a quadrature-phase RF PA stage are disclosed. The in-phase RF PA stage includes a first group of arrays of amplifying transistor elements and the quadrature-phase RF PA stage includes a second group of arrays of amplifying transistor elements. A group of array bias signals is based on a selected one of a group of DDS operating modes. Each of the group of array bias signals is a current signal. The in-phase RF PA stage biases at least one of the first group of arrays of amplifying transistor elements based on the group of array bias signals. Similarly, the quadrature-phase RF PA stage biases at least one of the second group of arrays of amplifying transistor elements based on the group of array bias signals.

Abstract: Disclosed is a matrix distributed amplifier (DA) having an input transmission line, an intermediate transmission line, and an output transmission line. A first plurality of amplifiers has inputs coupled to and spaced along the input transmission line and has outputs coupled to and spaced along the intermediate transmission line. A second plurality of amplifiers has inputs coupled to and spaced along the intermediate transmission line and has outputs coupled to and spaced along the output transmission line. A termination amplifier has an input coupled to the input transmission line and an output coupled to the intermediate transmission line. In at least one embodiment, a second termination amplifier has an input coupled to the intermediate transmission line and an output coupled to the output transmission line.

Abstract: The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail.

Abstract: The present disclosure relates to a radio frequency (RF) switch that includes multiple body-contacted field effect transistor (FET) elements coupled in series. The FET elements may be formed using a thin-film semiconductor device layer, which is part of a thin-film semiconductor die. Conduction paths between the FET elements through the thin-film semiconductor device layer and through a substrate of the thin-film semiconductor die may be substantially eliminated by using insulating materials. Elimination of the conduction paths allows an RF signal across the RF switch to be divided across the series coupled FET elements, such that each FET element is subjected to only a portion of the RF signal. Further, each FET element is body-contacted and may receive reverse body biasing when the RF switch is in an OFF state, thereby reducing an OFF state drain-to-source capacitance of each FET element.

Abstract: Tank circuitry coupled to the output terminals of a differential power amplifier includes two trap circuits configured to divert harmonic signals away from the output terminals. A tank inductor is provided to form a tank circuit in conjunction with each one of the trap circuits. At certain harmonic frequencies of the input signal to the differential power amplifier, the trap circuits are resonant and present a substantially low impedance path to ground, thereby diverting harmonic signals away from the output terminals of the differential power amplifier. At the fundamental frequency of the input signal to the differential power amplifier, the trap circuits are resonant with the tank inductor and present a substantially high impedance compared to the load impedance presented at the output terminals of the differential power amplifier, thereby reducing the loading effect of the trap circuits at the fundamental frequency.

Abstract: A radio frequency (RF) communications system, which includes power amplifier (PA) control circuitry and PA bias circuitry, is disclosed. The PA control circuitry identifies a selected communications mode of the RF communications system and a target output power from RF PA circuitry. The PA control circuitry selects a PA bias level of a driver stage of the RF PA circuitry and a PA bias level of a final stage of the RF PA circuitry based on the selected communications mode and the target output power. The PA bias circuitry establishes a PA bias level for the driver stage and a PA bias level for the final stage based on the selected PA bias levels of the driver stage and the final stage, respectively.

Abstract: A direct current (DC)-DC converter having a DC-DC converter semiconductor die and an alpha flying capacitive element is disclosed. The DC-DC converter semiconductor die includes a first series alpha switching element, a second series alpha switching element, a first alpha flying capacitor connection node, which is about over the second series alpha switching element, and a second alpha flying capacitor connection node, which is about over the first series alpha switching element. The alpha flying capacitive element is electrically coupled between the first alpha flying capacitor connection node and the second alpha flying capacitor connection node. By locating the first alpha flying capacitor connection node and the second alpha flying capacitor connection node about over the second series alpha switching element and the first series alpha switching element, respectively, lengths of transient current paths may be minimized, thereby reducing noise and potential interference.

Abstract: Circuitry, which includes a linear amplifier, is disclosed. The linear amplifier has a linear amplifier output and includes an input amplifier stage and an output amplifier stage. The output amplifier stage at least partially provides an envelope power supply voltage to a radio frequency (RF) power amplifier (PA) via an envelope power supply output using a selected one of a group of linear amplifier power supply signals. The group of linear amplifier power supply signals includes at least a first bi-directional power supply signal. The input amplifier stage selects the one of the group of linear amplifier power supply signals based on the envelope power supply voltage and a setpoint of the envelope power supply voltage.

Abstract: Antenna tuning switch circuitry includes an input port, a shunt switch, control circuitry, and an integrated ground. The shunt switch is coupled between the input port and the integrated ground. The control circuitry includes a control signal input port, a switch driver output port coupled to the shunt switch, and a ground connection port coupled to the integrated ground. The shunt switches, the RF input ports, the control circuitry, and the integrated ground are monolithically integrated on a single semiconductor die. The antenna tuning switch circuitry is adapted to selectively couple the input port to the integrated ground in order to alter one or more operating parameters of an attached antenna. By monolithically integrating the shunt switch together with the control circuitry and the integrated ground, the ON state impedance and the parasitic OFF state impedance of the antenna tuning switch circuitry can be significantly improved.

Abstract: A multi-stage radio frequency (RF) power amplifier includes a high-power amplifier path and a low-power amplifier path. The low-power amplifier path includes gain synchronization circuitry in order to synchronize the gain response of the high-power amplifier path and the low-power amplifier path. By synchronizing the gain response of the high-power amplifier path and the low-power amplifier path, the gain linearity of the multi-stage RF amplifier is improved.

Abstract: A micro-electrical-mechanical system (MEMS) vibrating structure includes a carrier substrate, a first anchor, a second anchor, a single crystal piezoelectric body, and a conducting layer. The first anchor and the second anchor are provided on the surface of the carrier substrate. The single-crystal piezoelectric body is suspended between the first anchor and the second anchor, and includes a uniform crystalline orientation defined by a set of Euler angles. The single-crystal piezoelectric body includes a first surface parallel to and facing the surface of the carrier substrate on which the first anchor and the second anchor are formed and a second surface opposite the first surface. The conducting layer is inter-digitally dispersed, and is formed on the second surface of the single-crystal piezoelectric body. The first surface of the single-crystal piezoelectric body is left exposed.

Abstract: A micro-electrical-mechanical system (MEMS) vibrating structure includes a carrier substrate, a first anchor, a second anchor, a single crystal piezoelectric body, a first conducting layer, and a second conducting layer. The first anchor and the second anchor are provided on the surface of the carrier substrate. The single-crystal piezoelectric body is suspended between the first anchor and the second anchor, and includes a uniform crystalline orientation defined by a set of Euler angles. The single-crystal piezoelectric body includes a first surface parallel to and facing the surface of the carrier substrate on which the first anchor and the second anchor are formed and a second surface opposite the first surface. The first conducting layer is inter-digitally dispersed on the second surface of the single-crystal piezoelectric body. The second conducting layer is inter-digitally dispersed on the first surface of the single-crystal piezoelectric body.

Abstract: This disclosure relates to radio frequency (RF) amplification devices and methods for amplifying an RF input signal. To set the quiescent operating level of the RF output signal, a bias signal to be applied to the RF input signal is received prior to amplifying the RF input signal. The bias signal is amplified to generate the RF output signal at the quiescent operating level and a feedback signal is received that is indicative of the quiescent operating level of the RF output signal. Prior to amplifying the RF input signal, the bias signal level of the bias signal is adjusted such that the quiescent operating level is set to a reference signal level based on the feedback signal level. This allows for adjustments to be made to the quiescent operating level and maintain the quiescent operating level at a desired value.