Abstract: DC to DC converter circuitry includes a dual phase charge pump and at least one pair of multiplier phase circuits. The dual phase charge pump is coupled to each one of the at least one pair of multiplier circuits and adapted to receive a DC input voltage and only four control signals, and produce a stepped-up output voltage. Each one of the at least one pair of multiplier phase circuits are adapted to receive the stepped-up output voltage, a cross-coupled control signal from the other multiplier phase circuit in the pair of multiplier phase circuits, and a different one of the control signals and further multiply the stepped-up output voltage to produce a multiplied stepped-up output voltage with a magnitude that is approximately three times that of the DC input voltage or greater.

Abstract: Circuitry, which includes a linear amplifier and a linear amplifier power supply, is disclosed. The linear amplifier at least partially provides an envelope power supply signal to a radio frequency (RF) power amplifier (PA) using a selected one of a group of linear amplifier supply voltages. The linear amplifier power supply provides at least one of the group of linear amplifier supply voltages. Selection of the selected one of the group of linear amplifier supply voltages is based on a desired voltage of the envelope power supply signal.

Abstract: A first radio frequency (RF) power amplifier (PA) stage, a second RF PA stage, and an alpha RF switch are disclosed. The first RF PA stage provides a first RF output signal. During a first alpha mode, the alpha RF switch forwards the first RF output signal to the second RF PA stage, such that the first RF PA stage functions as a driver stage and the second RF PA stage functions as a final stage. However, during one of a group of alpha modes, the alpha RF switch forwards the first RF output signal to provide a corresponding one of a group of alpha transmit signals, such that the first RF PA stage functions as a final stage. Further, the first alpha mode is not one of the group of alpha modes.

Abstract: An envelope tracking power supply and transmitter control circuitry are disclosed. The transmitter control circuitry receives a first envelope power supply control signal and a second envelope power supply control signal. The envelope tracking power supply operates in one of a group of operating modes, which includes a first operating mode and a second operating mode. During both the first operating mode and the second operating mode, a first envelope power supply signal is provided to a driver stage based on the first envelope power supply control signal. During the first operating mode, a second envelope power supply signal is provided to a final stage based on the first envelope power supply control signal. However, during the second operating mode, the second envelope power supply signal is provided to the final stage based on the second envelope power supply control signal.

Abstract: A power amplifier (PA) envelope power supply, radio frequency (RF) PA circuitry, and a process to select a converter operating mode of the PA envelope power supply based on linearity requirements of the RF PA circuitry is disclosed. The PA envelope power supply operates in one of a first converter operating mode and a second converter operating mode. The process for selecting the converter operating mode is based on a required degree of linearity of the RF PA circuitry. The PA envelope power supply provides an envelope power supply signal to the RF PA circuitry. Selection of the converter operating mode may provide efficient operation of the PA envelope power supply and the envelope power supply signal needed for proper operation of the RF PA circuitry.

Abstract: An open loop envelope tracking system calibration technique and circuitry are proposed. A radio frequency power amplifier receives a modulated signal. An envelope tracker power converter generates a modulated power amplifier supply voltage for the radio frequency power amplifier based on a control signal derived from the modulated signal. A first output power and a second output power of the radio frequency power amplifier are measured when the control signal is respectively delayed by a first delay period and a second delay period. A sensitivity of the output power of the radio frequency power amplifier is near a maximum near the first delay period and the second delay period. The first delay period and/or the second delay period are adjusted until the first output power substantially equals the second output power. The first delay period and the second delay period are used to obtain a calibrated fine tuning delay offset.

Abstract: The present disclosure relates to a hybrid transformer duplexer apparatus. The hybrid transformer duplexer apparatus includes an autotransformer having a first port, a second port and a tap coupled to a first antenna port. A step-down transformer has a primary winding with a first terminal coupled to the first port of the autotransformer and a second terminal coupled to the second port of the autotransformer, and a secondary winding having a third terminal coupled to a second antenna port and a fourth terminal coupled to a common node.

Abstract: A protection system and method for protecting a direct current to direct current voltage converter (DC-DC converter) from a potentially damaging excessive output current due to exposure to a relatively strong magnetic field is disclosed. The system includes a detector circuit configured to monitor a signal characteristic of the DC-DC converter, and a linear regulator having an output coupled to the load output of the DC-DC converter. The system further includes a control system configured to disable a load output of the DC-DC converter and enable the output of the linear regulator when the detector detects that the signal characteristic has moved outside a predetermined threshold range. Moreover, the control system is further configured to disable the output of the linear regulator after a predetermined time period, and enable the load output of the DC-DC converter after the predetermined time period.

Abstract: A phase shifting stage is disclosed. The phase shifting stage includes first and second transistors. Second terminals of the first transistor and the second transistor are coupled to a first current tail node. A third transistor and a fourth transistor have second terminals that are coupled to a second current tail node. Also included is a first transformer having a primary winding with first and second inputs and a secondary winding. The first input is coupled to the first terminals of the first and third transistors, and the second input is coupled to the first terminals of the second and the fourth transistors. A common input stage having high power gain and phase commutating cascode stages in asymmetrical transformer output demultiplexing (ATODEM) branches is also provided. The common input stage limits the noise generated at an input stage by substantially canceling out the noise at an output transformer of the ATODEM.

Abstract: At least a first shunt switching element and switching control circuitry of a first switching power supply are disclosed. At least the first shunt switching element is coupled between a ground and an output inductance node of the first switching power supply. The first switching power supply provides a buck output signal from the output inductance node. The switching control circuitry selects one of an ON state and an OFF state of the first shunt switching element. When the buck output signal is above a first threshold, the switching control circuitry is inhibited from selecting the ON state. The first switching power supply provides a first switching power supply output signal based on the buck output signal. By using feedback based on the buck output signal, the switching control circuitry may refine the timing of switching between series switching elements and shunt switching elements to increase efficiency.

Abstract: Power amplifier (PA) control circuitry and PA bias circuitry are disclosed. During one slot of a multislot transmit burst from radio frequency (RF) PA circuitry, the PA control circuitry selects one PA bias level of the RF PA circuitry and the RF PA circuitry has one output power level. The RF PA circuitry has a next output power level during an adjacent next slot of the multislot transmit burst. If the one output power level exceeds the next output power level by more than a power drop limit, then the PA control circuitry maintains the one PA bias level during the adjacent next slot. If the one output power level significantly exceeds the next output power level, but by less than the power drop limit, then the PA control circuitry selects a next PA bias level, which is less than the one PA bias level, during the adjacent next slot.

Abstract: The present disclosure relates to amplitude based pre-distortion calibration of an RF communications terminal, such as a cell phone, by transmitting a first standard RF transmit burst from the RF communications terminal to an RF test instrument, which assimilates the first standard RF transmit burst. A calibration control system extracts information regarding the first standard RF transmit burst from the RF test instrument; determines amplitude based distortion of the RF communications terminal using the extracted information; determines amplitude based pre-distortion calibration information using the determined amplitude based distortion; and calibrates the RF communications terminal using the amplitude based pre-distortion calibration information. By using a single-shot transmit burst, calibration times may be minimized.

Abstract: In one embodiment, saturation of the control system of a power amplifier is limited by comparing a control voltage at a first control node against a scaled battery voltage, and then drawing an error current away from the first control node when the control voltage exceeds the scaled battery voltage. The first control node may be located after a trans-conductance amplifier in a feedback control system.

Abstract: An antenna tuner provides a pass band with a transmission resonant frequency and a receive resonant frequency. In this manner, the pass band of the antenna tuner can simultaneously provide matching at both a transmission frequency and a receive frequency, when both transmission signals and receive signals are received on the same antenna. The antenna tuner includes a first capacitive element that is coupled to series resonate with the antenna and a low-pass pi network.

Abstract: Front end circuitry for a mobile terminal includes separate receive paths and filtering elements for different portions of each operating band. Accordingly, the filtering elements for each receive path can be designed with a smaller pass-band, thereby reducing the complexity of filtering circuitry in the front end circuitry and improving the efficiency thereof.

Abstract: A carrier aggregation radio system is provided. The carrier aggregation radio system includes a transceiver having a main receiver, a diversity receiver and a carrier aggregation receiver. The carrier aggregation radio system further includes a control system adapted to command a radio front end to route diversity signals from a diversity antenna to the main and diversity receivers in a first mode and to command the radio front end to route carrier aggregation signals from the diversity antenna to the carrier aggregation receiver in a second mode. The control system may also command a third mode in which diversity signals are routed to the main and diversity receivers while carrier aggregation signals are routed to the carrier aggregation receiver.

Abstract: Embodiments of the present disclosure relate to multi-mode multi-band radio frequency (RF) power amplifier (PA) circuitry, which includes a multi-mode multi-band quadrature RF PA coupled to multi-mode multi-band switching circuitry via a single output. The switching circuitry provides at least one non-linear mode output and multiple linear mode outputs. The non-linear mode output may be associated with at least one non-linear mode RF communications band and each linear mode output may be associated with a corresponding linear mode RF communications band. The outputs from the switching circuitry may be coupled to an antenna port via front-end aggregation circuitry. The quadrature nature of the quadrature PA path may provide tolerance for changes in antenna loading conditions.

Abstract: RF switching circuitry includes an RF switch coupled between an input node and an output node. Distortion compensation circuitry is coupled in parallel with the RF switch between the input node and the output node. The RF switch is configured to selectively pass an RF signal from the input node to the output node based on a first switching control signal. The distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into one of the input node or the output node. Boosting a portion of the RF signal that is being compressed by the RF switch allows a signal passing through the RF switch to remain substantially linear, thereby improving the performance of the RF switching circuitry.

Abstract: Embodiments of electrostatic discharge (ESD) protection circuits are disclosed along with methods of providing ESD protection. In one embodiment, an ESD protection circuit includes a first ESD protection clamp and a second ESD protection clamp operably associated in a dual-polarity ESD protection configuration. The first ESD protection clamp includes a trigger path and a clamped ESD protection path. The first ESD protection clamp is configured to trigger the clamped ESD protection path in response to an input voltage reaching a trigger voltage level. The second ESD protection clamp breaks down in response to the input voltage reaching a clamp breakdown voltage level that has a magnitude equal to or greater than the trigger voltage level. Since the clamp breakdown voltage level is equal to or greater than the trigger voltage level provided by the first ESD protection clamp, the ESD protection circuit can provide better ESD protection performance ratings.

Abstract: Power amplification devices are described, which are configured to amplify a radio frequency (RF) transmission signal. The power amplification device includes a voltage regulation circuit and a power amplification circuit. The voltage regulation circuit is configured to generate a regulated voltage for the power amplification device from a supply voltage and to adjust a regulated voltage level of the regulated voltage in accordance with a voltage adjustment gain. The voltage adjustment gain of the voltage regulation circuit is set by a feedback resistance. To help prevent the voltage regulation circuit from saturating, the voltage regulation circuit adjusts the feedback resistance to reduce the voltage regulation gain.