Abstract: A reference signal generator having high order temperature compensation includes: first and second transistors generating a proportional to absolute temperature (PTAT) signal and at least one complementary to absolute temperature (CTAT) signal according to at least one bandgap related to the first and second transistors; a feedback network coupled to the first and second transistors; an amplifier circuit configured to linearly superimpose the PTAT signal and the CTAT signals via the feedback network, to generate a reference signal; a second order adjustment circuit including a third transistor controlled by a bias voltage, to generate an adjustment current for adjusting the reference signal; and a third order adjustment circuit configured to adjust the bias voltage according to a temperature under test, for adjusting the adjustment current, to adjust the reference signal, such that a variation of the reference signal is smaller than a predetermined variation range within a temperature range.

Abstract: A power path switch circuit includes: a power transistor unit including: a first vertical double-diffused metal oxide semiconductor (VDMOS) device, wherein a first current outflow end of the first VDMOS device is coupled to an output end of a power path; and a second VDMOS device, wherein a first current inflow end of the first VDMOS device and a second current inflow end of the second VDMOS device are coupled with a supply end of the power path; and a voltage locking circuit coupled to the first current outflow end and the second current outflow end, for locking a voltage at the second current outflow end to a voltage at the first current outflow end, so that there is a predetermined ratio between a first conductive current flowing through the first VDMOS device and a second conductive current flowing through the second VDMOS device.

Abstract: A resonant switching power converter includes: a first power stage circuit; a second power stage circuit; a controller; and a current sensing circuit configured to sense a first charging/discharging resonant current flowing through a first charging/discharging inductor of the first power stage circuit and sense a second charging/discharging resonant current flowing through a second charging/discharging inductor of the second power stage circuit, to generate a corresponding first current sensing signal and a corresponding second current sensing signal, respectively. The controller adjusts at least one of a first delay interval, a second delay interval, a third delay interval, a fourth delay interval, and/or input voltages, according to a first current sensing signal and a second current sensing signal, so that a constant ratio between an output current of the first power stage circuit and an output current of the second power stage circuit is achieved.

Abstract: A buck-boost switching regulator includes: a power switch circuit including an input switch unit and an output switch unit which switch a first terminal and a second terminal of an inductor for buck-boost conversion; at least one low dropout regulator correspondingly coupled to at least one output high side switch in the output switch unit to correspondingly convert at least one low dropout voltage into at least one output voltage; and a bypass control circuit configured to operably generate a bypass control signal according to a conversion voltage difference between the input voltage and the corresponding low dropout voltage; wherein when the corresponding conversion voltage difference is lower than a reference voltage, the bypass control signal controls a corresponding bypass switch to electrically connect the input voltage with the corresponding low dropout node.

Abstract: A switched capacitor converter circuit includes: plural capacitors and plural switches which periodically switch the coupling relationships of the plural capacitors. During a first period, the switches control at least two of the capacitors to be electrically connected in series between the first power and the second power, and control a first capacitor of the capacitors to be electrically connected in parallel to the second power. During a second period, the switches control at least two of the capacitors to be electrically connected in series between the second power and a ground voltage level, and control a second capacitor of the capacitors to be electrically connected in parallel with the second power, thereby executing power conversion between the first power and the second power.

Abstract: A resonant switching power converter includes: plural capacitors; plural switches; at least one charging inductor; at least one discharging inductor; a controller which generates a charging operation signal and at least one discharging operation signal; and at least one zero current detection circuit which detects a charging resonant current flowing through the charging inductor in a charging process and/or detect a discharging resonant current flowing through the discharging inductor in a discharging process. When detecting that a level of the charging resonant current or a level of the discharging resonant current is zero, the zero current detection circuit generates at least one zero current detection signal which is sent to the controller. The controller determines start time points and end time points of the charging process and the discharging process according to the zero current detection signal. There can be plural discharging processes.

Abstract: An analog switch circuit includes: a switch unit and a control circuit, wherein the control circuit includes a sensor circuit and a gate-source voltage adjustment circuit. The switch unit operates a first switch therein according to a first gate-source voltage, to convert an input signal of an input terminal to an output signal of an output terminal. The sensor circuit is coupled between the input terminal and the output terminal, and generates a sensing signal according to a voltage difference between the input signal and the output signal. The gate-source voltage adjustment circuit is coupled to the sensor circuit, and adaptively adjusts the first gate-source voltage according to the sensing signal, to maintain the conduction resistance of the switch unit at a constant while the voltage difference changes.

Abstract: A PWM (Pulse Width Modulation) controller includes a current detector, a current emulator, a voltage-to-current converter, and a current adder. The current detector detects a first current, and generates a second current according to the first current. The current detector receives an input voltage and outputs an output voltage. The current emulator obtains the relative information of a lower-gate current. The voltage-to-current converter draws a third current from the current emulator according to the input voltage and the output voltage. The current emulator generates a fourth current according to the relative information and the third current. The current adder adds the fourth current to the second current, so as to generate a sum current.

Abstract: A switching capacitor power conversion circuit includes: a conversion capacitor, plural conversion transistors and an output capacitor connected to an output node. In a switching conversion mode, the switching capacitor power conversion circuit switches connections of the capacitor to convert the input power into an output power on an output node. During a first pre-charging period, a first conversion transistor is controlled to provide a first pre-charging current to pre-charge the conversion capacitor to a predetermined voltage level, and the output capacitor is prevented from being charged. During a second pre-charging period, a second conversion transistor is controlled to provide a second pre-charging current to pre-charge the output capacitor to the predetermined voltage level, and the second pre-charging current supplies a load current to a load circuit.

Abstract: A resonant switching power converter includes: capacitors; switches; at least one charging inductor; at least one discharging inductor; a controller generating a charging operation signal corresponding to charging process and discharging operation signals corresponding to discharging processes, to operate the switches to switch electrical connection relationships of the capacitors. In the charging process, the controller controls the switches via the charging operation signal, so that a series connection of the capacitors and the charging inductor is formed between the input voltage and the output voltage, which forms a charging path. In the discharging processes, the controller controls the switches via the discharging operation signals, so that a series connection of one of the capacitors and the discharging inductor is formed between the output voltage and a ground voltage level, to form plural discharging paths at different periods in a sequential order.

Abstract: A power device which is formed on a semiconductor substrate includes: a lateral insulated gate bipolar transistor (LIGBT), a PN diode and a clamp diode. The PN diode is connected in parallel to the LIGBT. The clamp diode has a clamp forward terminal and a clamp reverse terminal, which are electrically connected to a drain and a gate of the LIGBT, to clamp a gate voltage applied to the gate not to be higher than a predetermined voltage threshold.

Abstract: A BLDC motor driver circuit includes: a driving power stage circuit configured to provide a start-up test signal in a start-up mode to excite a BLDC motor, to drive a rotor of the BLDC motor to rotate for a test; a current unidirectional circuit coupled to the BLDC motor at a reverse end for detecting a BEMF, to generate a detection signal at a forward end of the current unidirectional circuit, wherein when a voltage at the reverse end exceeds a voltage at the forward end, the current unidirectional circuit limits the voltage at the forward end not to be higher than a clamp voltage; a biasing circuit for biasing the current unidirectional circuit in a forward operation state and for providing the clamp voltage; and a sensor circuit for generating a sensing signal according to the detection signal to indicate a test rotation state of the BLDC motor.

Abstract: A multiple output universal serial bus travel adaptor includes: at least one AC-DC converter for converting an AC power to a first DC power; at least one DC-DC converter for providing a second DC power according to the first DC power; plural switches which are coupled to the AC-DC converter and/or the DC-DC converter to provide the first DC power or the second DC power to corresponding connectors according to operation signals; and a protocol controller configured to generate the operation signals according to at least one of the following parameters: a) the types of the connectors; b) whether there is a mobile device connected with the connectors; c) a first command from the mobile device; d) the power consumed by the mobile devices; e) the currents flowing through the connectors; and f) the voltages at the connectors.

Abstract: A resonant switching power converter includes: at least one capacitor; switches coupled to the at least one capacitor; at least one charging inductor; at least one discharging inductor; and a zero current estimation circuit. The switches switch electrical connection relationships of capacitors according to an operation signal. The zero current estimation circuit estimates a time point at which a charging resonant current is zero during a charging process and/or estimate a time point at which a discharging resonant current is zero during at least one discharging process according to voltage differences across two ends of the charging inductor and/or the discharging inductor, so as to correspondingly generate a zero current estimation signal. The zero current estimation signal is adopted to generate the operation signal.

Abstract: A flyback power converter circuit includes a transformer, a blocking switch, a primary side switch, a primary side controller circuit and a secondary side controller circuit. The transformer is coupled between an input voltage and an internal output voltage in an isolated manner. The blocking switch controls the electric connection between the internal output voltage and an external output voltage. In a standby mode, the internal output voltage is regulated to a standby voltage, and the blocking switch is controlled to be OFF; in an operation mode, the internal output voltage is regulated to an operating voltage, and the blocking switch is controlled to be ON, such that the external output voltage has the operating voltage. The standby voltage is smaller than the operating voltage, so that the power consumption of the flyback power converter circuit is reduced in the standby mode.

Abstract: A flyback power converter includes: a power transformer, a primary side control circuit, a secondary side control circuit, and an active clamp snubber including a snubber switch and a control signal generation circuit. The control signal generation circuit controls the snubber switch to be conductive during a soft switching period in an OFF period of a primary side switch within a switching period of the switching signal, whereby the primary side switch achieves soft switching. A starting time point of the soft switching period is determined by a current threshold, so that a secondary side current is not lower than the current threshold at the starting time point, whereby the secondary side control circuit keeps the SR switch conductive at the starting time point. The secondary side control circuit turns OFF the SR switch when the secondary side current is lower than the current threshold.

Abstract: A switch capable of decreasing parasitic inductance includes: a semiconductor device, a first top metal line, and a second top metal line. The second top metal line electrically connects a power supply input end and a current inflow end of the semiconductor device, wherein a first part of the first top metal line is arranged in parallel and adjacent to a second part of the second top metal line. When the semiconductor device is in an ON operation, an input current outflows from the power supply input end, and is divided into a first current and a second current. When the first current and the second current flow through the first part and the second part respectively, the first current and the second current flow opposite to each other, to reduce an total parasitic inductance of the first top metal line and the second top metal line.

Abstract: A multi-stage amplifier circuit includes a pre-stage amplifier circuit and a floating control circuit. The pre-stage amplifier circuit amplifies a voltage difference between its input terminals, to generate plural pre-stage transconductance currents flowing through corresponding plural pre-stage transconductance nodes. The floating control circuit includes: a floating reference transistor configured as a source follower and a floating amplifier. The floating amplifier and the floating reference transistor are coupled to form feedback control and to generate an upper driving signal and a lower driving signal according to a floating reference level in the floating control circuit. The upper driving signal is higher than the lower driving signal with a predetermined voltage difference. The floating control circuit is electrically connected to the plural pre-stage transconductance nodes and is floating in common mode relative to the pre-stage transconductance nodes.

Abstract: The present invention discloses a power converter, a switch control circuit, and a short circuit detection method for current sensing resistor of the power converter. The power converter includes: a transformer, a power switch, a current sensing resistor and a switch control unit. The current sensing resistor has one end coupled to the power switch and another end coupled to ground. The switch control unit generates the operation signal to control the power switch. The switch control unit generates a first sample-and-hold voltage at a first time point and a second sample-and-hold voltage at a second time point according to a voltage across the current sensing resistor. When a voltage difference between the first sample-and-hold voltage and the second sample-and-hold voltage is smaller than a reference voltage, it is determined that a short circuit occurs in the current sensing resistor.

Abstract: A spike suppression circuit includes a wide bandgap transistor, a first transistor, a clamping circuit, and a capacitor. The wide bandgap transistor is depletion-type. The first transistor is coupled in series with the wide bandgap transistor. The clamping circuit provides a voltage difference, and is coupled to a common node between the wide bandgap transistor and the first transistor. The capacitor provides a supply voltage for the clamping circuit. When the first transistor is turned off, the capacitor can recycle spike energy at the common node.