Abstract: The present invention discloses a resonant wireless power transmitter circuit, which has an input impedance. The resonant wireless power transmitter circuit includes: a driver circuit coupled with a power supply, which includes at least a power switch; a switching resonant control circuit coupled with the driver circuit, such that the driver operates at a pre-determined or a variable resonant frequency; an adjustable impedance matching circuit coupled with the driver circuit, which includes at least a varactor; a transmitter circuit coupled with the impedance matching circuit and the driver circuit, which includes at least a transmitter coil; and an impedance control circuit coupled with the adjustable impedance matching circuit and the driver circuit, which provides an impedance control signal to control the reactance of the varactor, such that the input impedance of the resonant wireless power transmitter circuit is matched at the pre-determined or the variable resonant frequency.

Abstract: A charger circuit which supplies a charging power to charge a battery circuit, includes: a conversion switch circuit, at least one capacitor and a conversion control circuit. The conversion switch circuit is coupled between a charging power and a ground level and includes conversion switches connected in series. The conversion switch circuit has battery voltage balancing nodes electrically connected to the battery circuit, such that each battery is electrically connected between two of the battery voltage balancing nodes. The conversion control circuit is coupled to the conversion switch circuit and provides operation signals to the conversion switch circuit, to respectively control the corresponding conversion switches, so that the capacitor is periodically connected in parallel to each battery of the battery circuit, thereby balancing the battery voltages of the batteries.

Abstract: A battery module for use in a battery system is coupled with other battery modules in the battery system in a daisy-chain configuration. And, the battery module communicates with the other battery modules through a daisy chain according to a communication interface protocol which has a predetermined number of clock pulses. The battery module includes a battery unit and a battery control circuit. When the battery module operates in a bottom mode, the battery control circuit generates an upstream clock output signal which includes the predetermined number of clock pulses plus a number of inserted clock pulses, to compensate a clock difference caused by a propagation delay of the daisy chain, such that the battery module is able to synchronously receive a downstream data signal transmitted from a target module via the daisy chain as the battery module is transmitting an upstream clock output signal.

Abstract: The invention provides a bio-detection device, including a carrier, a plurality of spacers, an electronic circuit, and a package layer, wherein an open platform is formed. The carrier includes a test region and a signal transmission wiring, wherein the test region is configured to carry a fluid under test. The spacers are located on the test region and electrically connected to two different voltage levels to form a capacitor for sensing a capacitance of the fluid. The spacers are connected to the signal transmission wiring. The electronic circuit receives and processes a sensing signal corresponding to the capacitance of the fluid. The package layer covers a portion of the carrier but does not cover the test region. The open platform is formed whereby a user can easily put in the fluid. The open platform has a bottom which includes the test region, and an area of the open platform is defined by the spacers and the package layer.

Abstract: A ZVS (zero voltage switching) control circuit for controlling a flyback power converter includes: a primary side controller circuit, for generating a switching signal to control a primary side switch; and a secondary side controller circuit, for generating a synchronous rectifier (SR) control signal to control a synchronous rectifier switch. The SR control signal includes an SR-control pulse and a ZVS pulse. The primary side controller circuit determines a trigger timing point of the switching signal according to a first waveform characteristic of a ringing signal, to control the primary side switch to be ON. The secondary side controller circuit determines a trigger timing point of the ZVS pulse according to a second waveform characteristic of the ringing signal, to control the synchronous rectifier switch to be ON for a predetermined ZVS time period, thereby achieving zero voltage switching of the primary side switch.

Abstract: A high voltage device for use as a lower switch in a power stage of a switching regulator includes at least one lateral diffused metal oxide semiconductor (LDMOS) device and at least one Schottky barrier diode (SBD). The LDMOS device includes: a well, a body region, a gate, a source, and a drain. The SBD includes a Schottky metal layer and a Schottky semiconductor layer. The Schottky metal layer is electrically connected to the source, and the Schottky semiconductor layer is in contact with the well.

Abstract: A current sensing circuit having self-calibration includes two leads, a sensing element having a sensing resistance, and a sensing and calibration circuit. The sensing and calibration circuit senses and calibrates a sensing voltage of the sensing element, and senses a sensing current through the sensing element according to the sensing resistance and the sensing voltage, to generate a current sensing output signal. The sensing and calibration circuit includes two pads, a V2I circuit, a current mirror circuit and an I2V circuit. The sensing element has a first temperature coefficient (TC). The TC and/or the resistance of an adjusting resistor in the V2I circuit and an adjusting resistor in the I2V circuit are determined according to the first TC, such that the TC of the current sensing output signal is equal to 0.

Abstract: A switching regulator having a low start-up voltage includes a power stage and a switch control circuit. The switch control circuit includes a power control switch. The power control switch is formed by a low threshold voltage transistor having a first conductivity type in a semiconductor substrate. The low threshold voltage transistor having the first conductivity type includes a first lightly doped region having a second conductivity type which forms a channel region of the low threshold voltage transistor having the first conductivity type. The semiconductor substrate includes a second lightly doped region having the second conductivity type which is formed by a same manufacturing process as the first lightly doped region having the second conductivity type. The second lightly doped region having the second conductivity type forms adrift region of a high-voltage transistor having the second conductivity type in the semiconductor substrate.

Abstract: A signal amplifier circuit having high power supply rejection ratio includes: a pre-amplifier which generates a driving signal at a driving control node; and a driving circuit which converts an input power to an output power. The driving circuit includes: a driving transistor, having a first terminal coupled to the input power and a second terminal coupled to the output power; and a power rejection circuit which includes a noise selection circuit. When the driving transistor operates in its linear region, the power rejection circuit senses an AC component of a power noise of the input power to generate an operation noise signal. The power rejection circuit generates the power rejection signal in AC form according to the operation noise signal to reject the power noise so as to increase the power supply rejection ratio.

Abstract: An interface control circuit complying with an interface specification includes: an interface signal transceiver circuit and a protection circuit. The interface signal transceiver circuit is coupled to a first interface connection pin and a second interface connection pin of a first interface connector circuit. The interface signal transceiver circuit is for transmitting and/or receiving an interface signal according to the interface specification. When the interface signal transceiver circuit operates under a first state, the protection circuit determines whether a foreign object exists between the first interface connection pin and the second interface connection pin according to a voltage change or a current change at the second interface connection pin. Under the first state, the interface signal transceiver circuit generates a pull-up signal and a pull-down signal which are toggled with each other at the first interface connection pin.

Abstract: A charger circuit with temperature compensation function includes: a power converter, an input voltage sense circuit, an output adjustment circuit and a charging control circuit. The power converter converts an input voltage supplied from a photovoltaic power module to an output voltage. The input voltage sense circuit generates a signal related to the input voltage according to the input voltage. The output adjustment circuit generates an output adjustment signal according to the signal related to the input voltage. The charging control circuit generates a control signal according to the output adjustment signal, thereby adjusting a level of an output current supplied from the power converter. When a level of the input voltage is smaller than a predetermined voltage threshold, the power converter decreases the output current.

Abstract: A flyback power converter includes a primary side controller circuit for controlling a primary side switch; and a secondary side controller circuit for generating an SR (Synchronous Rectification) signal to control an SR switch. The SR signal includes an SR pulse and a ZVS (Zero Voltage Switching) pulse. The SR pulse controls the SR switch for synchronous rectification at the secondary side. The secondary side controller circuit samples and holds a voltage at a first end of the SR switch as a first voltage at a timing between the end of the ZVS pulse and the beginning of the SR pulse, and determines a length of the ZVS pulse so as to control the SR switch to be conductive for a ZVS time period, whereby the primary side switch achieves ZVS. The first voltage is proportional to an input voltage.

Abstract: A power system capable of detecting a foreign object includes a power supplier side, a power receiver side and a cable. The power supplier side includes a power control switch, a power control circuit and a pull-up circuit. The power control circuit controls the power control switch to provide a supply voltage to the power receiver side. The pull-up circuit provides a supplier transmission current to generate a supplier transmission voltage for determining whether the power supplier side and the power receiver side are coupled properly. The power control circuit determines whether a foreign object exists between the power supplier side and the power receiver side according to a voltage difference of the supplier transmission voltage before and after the supply voltage VBUS is provided. The power control circuit adaptively controls the power control switch and adjusts the transmission current according to whether a foreign object exists.

Abstract: A high voltage depletion mode MOS device with adjustable threshold voltage includes: a first conductive type well region; a second conductive type channel region, wherein when the channel region is not depleted, the MOS device is conductive, and when the channel region is depleted, the MOS device is non-conductive; a second conductive type connection region which contacts the channel region; a first conductive type gate, for controlling the conductive condition of the MOS device; a second conductive type lightly doped diffusion region formed under a spacer layer of the gate and contacting the channel region; a second type source region; and a second type drain region contacting the connection region but not contacting the gate; wherein the gate has a first conductive type doping or both a first and a second conductive type doping, and wherein a net doping concentration of the gate is determined by a threshold voltage target.

Abstract: A flyback power converter circuit includes: a transformer; a primary side switch, for controlling a primary winding to convert an input voltage to an output voltage and an internal voltage; a primary side control circuit, which is powered by the internal voltage; the primary side control circuit generates a switching signal according to a feedback signal, to operate the primary side switch; a secondary side control circuit, which generates the feedback signal according the output voltage; and a dummy load circuit, which is coupled to the output voltage, wherein when the output voltage drops to or is lower than a predetermined threshold, the dummy load circuit generates a dummy load current, to determine the feedback signal, so that the internal voltage is not undesirably low. When the output voltage exceeds the predetermined threshold, the dummy load circuit adjusts the dummy load current to zero current.

Abstract: A high voltage device includes: a semiconductor layer, an isolation structure, a first deep well, a second deep well, a drift well, a first well, a second well, a body region, a body contact, a high voltage well, a gate, and a source and a drain. The high voltage well is formed in the second deep well, and the high voltage well is not in contact with any of the first deep well, the first well, and the second well, wherein at least part of the high voltage well is located right below all of a drift region to suppress a latch-up current generated in the high voltage device.

Abstract: AN LED driving apparatus includes a power stage circuit and a dimming control circuit. The power stage circuit drives an LED circuit. The dimming control circuit includes a duty ratio conversion circuit, a digital-to analog conversion (DAC) circuit, an error amplifier (EA) circuit and a modulation control circuit. The duty ratio conversion circuit converts a PWM dimming signal to a digital duty ratio signal. The DAC circuit converts the digital duty ratio signal to an analog reference signal. The EA circuit generates an error amplified signal according to a difference between the analog reference signal and an output current related signal. The modulation control circuit generates a PWM control signal according to the error amplified signal, to control the power switch, such that the output current relates to a dimming duty ratio, whereby the dimming control circuit dims the LED circuit according to the PWM dimming signal.

Abstract: An output stage circuit for transmitting data via a bus includes a high side switch, a high side diode structure, a high side clamp circuit, a low side switch, and a low side diode structure. An impedance circuit of the bus is coupled between the high side switch and the low side switch, for generating a differential output signal according to high and low side output signals. A high side N-type region of the high side diode structure encompasses a high side P-type region thereof, and a low side N-type region of the low side diode structure encompasses a low side P-type region thereof. The high side clamp circuit is connected to the high side N-type region in series, for clamping a voltage of the high side N-type region to be not lower than a predetermined voltage, to prevent a parasitic PNP bipolar junction transistor from being turned ON.

Abstract: A multi-level switching power converter includes a multi-level power stage circuit which converts an input power to an output power. The power stage circuit includes an inductor, a conversion capacitor and plural power switches. The controller circuit controls the multi-level power stage circuit and includes: a feedback pulse generator circuit which generates a trigger pulse; a first timer circuit and a second timer circuit which determine a first time period and a second time period respectively according to the trigger pulse; and an adjusting circuit which adjusts the first time period according to a difference between the voltage across the conversion capacitor and a reference voltage such that an average of the voltage across the conversion capacitor is substantially equal to a level of the reference voltage.

Abstract: An N-type high voltage device includes: a semiconductor layer, a well region, a floating region, a bias region, a body region, a body contact, a gate, a source and a drain. The floating region and the bias region both have P-type conductivity, and both are formed in a drift region in the well region. The bias region is electrically connected with a predetermined bias voltage, and the floating region is electrically floating, to increase a breakdown voltage of the high voltage device and to suppress turning-ON a parasitic transistor in the high voltage device.