Patents Assigned to RJ Mears, LLC
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Publication number: 20050031247Abstract: An integrated circuit may include at least one active optical device and a waveguide coupled thereto. The waveguide may include a superlattice including a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.Type: ApplicationFiled: September 9, 2004Publication date: February 10, 2005Applicant: RJ MEARS, LLCInventors: Robert Mears, Robert Stephenson
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Integrated circuit comprising an active optical device having an energy band engineered superlattice
Publication number: 20050029511Abstract: An integrated circuit may include at least one active optical device including a superlattice including a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The integrated circuit may further include a waveguide coupled to the at least one active optical device.Type: ApplicationFiled: September 9, 2004Publication date: February 10, 2005Applicant: RJ MEARS, LLCInventors: Robert Mears, Robert Stephenson -
Publication number: 20040266116Abstract: The present invention relates to controlling the properties of semiconductor materials at the atomic or molecular level to achieve improved performance within semiconductor devices. Further, the invention relates to the identification, creation, and use of improved materials for use in the conduction paths of semiconductor devices. More specifically, the inventors have identified materials or structures having energy band structures in which the average curvature of the conduction and valence bands and band edges is substantially greater than the average curvature of conduction and valence bands in single crystal silicon. This substantially greater curvature corresponds to lower effective mass and, hence, greater carrier mobility.Type: ApplicationFiled: June 26, 2003Publication date: December 30, 2004Applicant: RJ Mears, LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha
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Publication number: 20040261695Abstract: A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.Type: ApplicationFiled: November 19, 2003Publication date: December 30, 2004Applicant: RJ Mears, LLC.Inventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Publication number: 20040262628Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.Type: ApplicationFiled: November 19, 2003Publication date: December 30, 2004Applicant: RJ Mears, LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Publication number: 20040262594Abstract: The present invention relates to controlling the properties of semiconductor materials at the atomic or molecular level to achieve improved performance within semiconductor devices. Further, the invention relates to the identification, creation, and use of improved materials for use in the conduction paths of semiconductor devices. More specifically, the inventors have identified materials or structures having energy band structures in which the average curvature of the conduction and valence bands and band edges is substantially greater than the average curvature of conduction and valence bands in single crystal silicon. This substantially greater curvature corresponds to lower effective mass and, hence, greater carrier mobility.Type: ApplicationFiled: June 26, 2003Publication date: December 30, 2004Applicant: RJ Mears, LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Ilija Dukovski
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Publication number: 20040262595Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.Type: ApplicationFiled: August 22, 2003Publication date: December 30, 2004Applicant: RJ Mears LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Publication number: 20040262596Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.Type: ApplicationFiled: November 19, 2003Publication date: December 30, 2004Applicant: RJ Mears, LLC.Inventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Publication number: 20040266046Abstract: A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.Type: ApplicationFiled: November 19, 2003Publication date: December 30, 2004Applicant: RJ Mears, LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Publication number: 20040262597Abstract: A semiconductor device includes a substrate, and at least one MOSFET adjacent the substrate. The MOSFET may include a superlattice channel that, in turn, includes a plurality of stacked groups of layers. The MOSFET may also include source and drain regions laterally adjacent the superlattice channel, and a gate overlying the superlattice channel for causing transport of charge carriers through the superlattice channel in a parallel direction relative to the stacked groups of layers. Each group of the superlattice channel may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice channel may have a higher charge carrier mobility in the parallel direction than would otherwise occur.Type: ApplicationFiled: August 22, 2003Publication date: December 30, 2004Applicant: RJ Mears, LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Publication number: 20040266045Abstract: A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.Type: ApplicationFiled: August 22, 2003Publication date: December 30, 2004Applicant: RJ Mears LLC.Inventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Patent number: 6833294Abstract: A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.Type: GrantFiled: November 19, 2003Date of Patent: December 21, 2004Assignee: RJ Mears, LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Patent number: 6830964Abstract: A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.Type: GrantFiled: August 22, 2003Date of Patent: December 14, 2004Assignee: RJ Mears, LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Publication number: 20040208445Abstract: A method for producing aperiodic gratings and waveguides with aperiodic gratings uses a simulated annealing process that starts with a random configuration of grating elements and iteratively computes a spectral response from a Fourier transform of the configuration of grating elements obtained in successive iterations. A cost function is computed as a convergence criterion. The aperiodic grating can be used, for example, as a filter in WDM applications.Type: ApplicationFiled: October 10, 2003Publication date: October 21, 2004Applicant: RJ MEARS LLCInventors: Robert J. Mears, Michael Charles Parker